You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-03-03 - 22:32
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rackbslot4.osadl.org (updated Tue Mar 03, 2026 12:43:35)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
742099624,52cyclictest0-21swapper/208:36:352
740999624,51cyclictest0-21swapper/011:07:210
742099603,51cyclictest0-21swapper/210:42:042
742099594,50cyclictest0-21swapper/207:34:082
742099594,50cyclictest0-21swapper/207:34:082
740999585,46cyclictest0-21swapper/010:56:510
742099574,48cyclictest0-21swapper/210:41:062
740999574,46cyclictest0-21swapper/008:43:540
742699565,8cyclictest0-21swapper/309:40:333
742699565,8cyclictest0-21swapper/309:40:333
742099564,6cyclictest0-21swapper/208:31:362
742099564,45cyclictest0-21swapper/211:03:512
740999563,47cyclictest1182-21memory09:26:530
742699554,45cyclictest0-21swapper/309:44:523
742099553,46cyclictest0-21swapper/207:56:362
740999557,6cyclictest0-21swapper/009:21:330
740999554,7cyclictest0-21swapper/011:32:200
742099544,44cyclictest0-21swapper/211:00:512
740999545,42cyclictest0-21swapper/009:37:030
740999545,42cyclictest0-21swapper/009:37:030
7409995414,35cyclictest3808-21missed_timers08:46:550
7409995414,35cyclictest3808-21missed_timers08:46:550
693925410,15sleep10-21swapper/106:23:531
742099534,43cyclictest0-21swapper/209:57:142
742099534,42cyclictest0-21swapper/210:20:322
742099534,10cyclictest0-21swapper/211:23:202
742099533,45cyclictest0-21swapper/210:46:432
742099533,44cyclictest0-21swapper/209:26:332
741399534,43cyclictest0-21swapper/110:23:421
741399534,43cyclictest0-21swapper/110:23:421
741399534,42cyclictest0-21swapper/109:58:221
742099527,19cyclictest0-21swapper/210:28:162
742099525,41cyclictest0-21swapper/207:17:022
742099524,42cyclictest0-21swapper/208:57:342
742099523,5cyclictest0-21swapper/209:36:452
742099523,5cyclictest0-21swapper/209:36:452
742099523,44cyclictest0-21swapper/208:53:542
742099523,44cyclictest0-21swapper/208:53:542
742099523,43cyclictest0-21swapper/209:08:232
742099522,43cyclictest11741-21fschecks_count11:06:452
741399524,42cyclictest0-21swapper/108:44:411
740999524,9cyclictest0-21swapper/008:30:540
740999524,42cyclictest0-21swapper/011:51:200
740999524,41cyclictest0-21swapper/010:40:320
740999524,41cyclictest0-21swapper/010:25:090
740999524,41cyclictest0-21swapper/010:25:090
742699513,42cyclictest21704-21cat10:36:513
742699513,42cyclictest0-21swapper/309:29:303
742099514,42cyclictest0-21swapper/210:52:252
742099514,40cyclictest0-21swapper/208:16:532
7420995113,33cyclictest26489-21latency_hist07:16:372
7420995112,32cyclictest5296-21sshd10:16:042
740999515,39cyclictest0-21swapper/006:27:010
740999514,42cyclictest0-21swapper/011:31:000
740999514,41cyclictest0-21swapper/010:12:220
742699504,41cyclictest0-21swapper/310:56:313
742699504,41cyclictest0-21swapper/310:41:383
742099504,40cyclictest0-21swapper/207:46:532
742099504,40cyclictest0-21swapper/206:31:492
742099504,39cyclictest0-21swapper/207:37:022
742099503,42cyclictest0-21swapper/209:04:332
742099503,41cyclictest0-21swapper/211:13:532
742099503,41cyclictest0-21swapper/211:13:532
742099503,41cyclictest0-21swapper/209:26:432
742099503,41cyclictest0-21swapper/208:45:342
7420995011,6cyclictest0-21swapper/211:44:552
7420995011,33cyclictest0-21swapper/210:06:342
7420995010,34cyclictest0-21swapper/208:47:042
7420995010,34cyclictest0-21swapper/208:47:042
741399504,9cyclictest0-21swapper/108:30:141
740999504,39cyclictest0-21swapper/010:45:190
740999504,38cyclictest0-21swapper/011:56:310
740999503,41cyclictest0-21swapper/010:56:110
7409995012,32cyclictest0-21swapper/011:41:410
742699493,40cyclictest0-21swapper/309:22:133
742699492,41cyclictest30253-21kworker/3:009:17:033
7426994913,5cyclictest0-21swapper/311:49:143
742099494,40cyclictest0-21swapper/209:18:432
742099494,39cyclictest0-21swapper/208:37:552
742099494,39cyclictest0-21swapper/207:08:262
742099493,40cyclictest0-21swapper/207:56:502
742099493,40cyclictest0-21swapper/207:21:512
7420994916,7cyclictest20311-21diskmemload09:55:512
7420994911,5cyclictest0-21swapper/211:33:472
741399494,40cyclictest0-21swapper/109:53:421
740999498,35cyclictest0-21swapper/009:22:460
740999494,39cyclictest0-21swapper/009:13:400
740999494,38cyclictest0-21swapper/010:29:030
740999493,41cyclictest0-21swapper/008:37:140
740999493,40cyclictest7609-21netstat08:51:550
740999493,40cyclictest7609-21netstat08:51:550
740999493,40cyclictest0-21swapper/010:06:520
742699485,37cyclictest0-21swapper/309:48:383
742699484,38cyclictest0-21swapper/310:29:263
742699484,37cyclictest0-21swapper/311:03:523
742699483,39cyclictest0-21swapper/310:31:423
742699482,40cyclictest32231-21ssh11:32:513
7426994811,31cyclictest0-21swapper/311:23:463
7426994811,31cyclictest0-21swapper/308:51:033
7426994811,31cyclictest0-21swapper/308:51:033
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional