You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-01-30 - 04:30
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: ondemand
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackbslot5.osadl.org (updated Fri Jan 30, 2026 00:43:27)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3055623030sleep50-21swapper19:09:245
1068422827sleep50-21swapper21:32:255
915722727sleep40-21swapper20:31:024
979222625sleep50-21swapper00:34:245
443022625sleep50-21swapper00:23:595
3202522625sleep40-21swapper22:12:184
3143722625sleep20-21swapper00:13:402
313822625sleep50-21swapper21:20:575
2963722625sleep60-21swapper21:06:176
2378622625sleep50-21swapper00:00:475
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional