You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-02-24 - 11:46
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: ondemand
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackbslot5.osadl.org (updated Tue Feb 24, 2026 00:43:27)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1844322929sleep40-21swapper22:08:024
1031622926sleep50-21swapper21:51:145
797022827sleep40-21swapper20:45:594
577922825sleep50-21swapper19:42:465
338222827sleep40-21swapper19:38:534
3200622826sleep50-21swapper21:31:225
1310622827sleep40-21swapper21:58:024
1266222827sleep50-21swapper22:56:375
969922726sleep50-21swapper23:52:075
693522726sleep50-21swapper23:45:515
497122727sleep60-21swapper21:41:076
297122725sleep50-21swapper19:35:585
2723822726sleep50-21swapper19:19:335
2699422727sleep40-21swapper20:21:024
2592022727sleep50-21swapper23:20:305
2063222727sleep40-21swapper23:11:084
1778922726sleep50-21swapper00:08:235
1139522727sleep60-21swapper18:51:496
793322625sleep30-21swapper20:45:263
739722625sleep30-21swapper22:47:383
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional