You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-01-25 - 18:33
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: ondemand
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackbslot5.osadl.org (updated Sun Jan 25, 2026 12:43:28)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2738123534sleep10-21swapper07:39:261
673023433sleep10-21swapper12:06:311
477223433sleep10-21swapper09:59:151
3098723433sleep10-21swapper11:49:511
2668323433sleep10-21swapper08:39:121
2613723433sleep10-21swapper10:40:201
2474323433sleep10-21swapper07:34:461
2135923433sleep10-21swapper08:29:121
1957423433sleep10-21swapper07:26:541
167423433sleep10-21swapper10:54:531
1173423433sleep10-21swapper07:13:491
1173423433sleep10-21swapper07:13:491
1808623329sleep10-21swapper10:24:201
2316823127sleep10-21swapper11:37:101
2281223131sleep10-21swapper12:38:081
2188423131sleep20-21swapper08:33:052
1461023131sleep10-21swapper07:19:021
948823029sleep20-21swapper12:12:482
797923029sleep10-21swapper10:08:591
586423029sleep20-21swapper08:02:162
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional