You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-03-08 - 10:04
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: ondemand
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackbslot5.osadl.org (updated Sun Mar 08, 2026 00:43:27)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3162822727sleep30-21swapper20:14:073
2005322727sleep30-21swapper21:51:553
625622625sleep20-21swapper22:25:472
436222625sleep60-21swapper20:20:506
3078222625sleep20-21swapper22:12:582
2500722625sleep20-21swapper23:02:042
2402622625sleep20-21swapper18:59:162
2349622625sleep20-21swapper19:57:102
232322625sleep60-21swapper19:19:206
1825522625sleep20-21swapper19:48:212
1642922625sleep20-21swapper22:45:402
1532322625sleep30-21swapper20:44:563
1407722625sleep20-21swapper23:43:262
2797222523sleep40-21swapper22:05:564
2777122423sleep40-21swapper23:08:304
2019622423sleep50-21swapper21:53:575
733522321sleep20-21swapper20:30:152
384422319sleep40-21swapper22:24:214
3077422323sleep30-21swapper22:12:513
2653622323sleep30-21swapper19:02:053
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional