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2025-08-21 - 21:33

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #b, slot #5

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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  Phytec
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rackbslot5s.osadl.org (updated Thu Aug 21, 2025 12:44:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3307628995931,24cyclictest0-21swapper/109:55:261
3307628995725,28cyclictest0-21swapper/109:20:011
3307632995044,4cyclictest3376559-21kworker/u8:2+events_unbound10:51:142
3307632995044,4cyclictest3376559-21kworker/u8:2+events_unbound10:51:142
3307632995036,10cyclictest311ktimers/212:00:152
3307628994924,20cyclictest0-21swapper/111:40:251
3307628994917,7cyclictest0-21swapper/111:25:011
3307636994838,7cyclictest3311799-21sendmail07:20:013
3307628994839,6cyclictest3328846-21idleruntime-cro08:10:001
3307628994826,17cyclictest0-21swapper/107:15:171
3307628994738,5cyclictest3393821-21unixbench_multi11:15:261
3307628994331,8cyclictest3336922-21grep08:30:251
3307628994329,11cyclictest231ktimers/108:35:121
3307636994216,10cyclictest3420281-21latency_hist12:35:003
3307628994231,7cyclictest3357638-21grep09:30:261
3307628994228,10cyclictest3358434-21fschecks_count09:35:181
3307636994132,6cyclictest3400901-21grep11:35:243
3307632994134,5cyclictest3342480-21kworker/u8:1+events_unbound08:51:012
3307632994130,6cyclictest3333500-21unixbench_multi08:20:252
3307632994130,5cyclictest3327369-21kworker/u8:0+events_unbound08:10:552
3307628994132,5cyclictest0-21swapper/111:34:591
3307624994132,6cyclictest3406438-21cron11:55:000
3307624994132,6cyclictest3406438-21cron11:55:000
3307636994033,4cyclictest0-21swapper/308:45:183
3307628994030,6cyclictest3417944-21unixbench_multi12:25:271
3307628994029,7cyclictest3361029-21grep09:40:251
3307624994033,4cyclictest3325425-21cron08:00:010
3307624994031,6cyclictest3347211-21grep09:00:250
3307624994030,6cyclictest0-21swapper/011:09:590
3307636993931,5cyclictest3354666-21munin-plugin-st09:25:013
3307632993933,4cyclictest3342480-21kworker/u8:1+events_unbound08:56:022
3307632993930,4cyclictest0-21swapper/209:35:002
3307632993928,7cyclictest3378520-21sh10:35:002
3307632993927,9cyclictest311ktimers/211:40:132
3307628993932,4cyclictest34064482sleep111:55:001
3307628993932,4cyclictest34064482sleep111:54:591
3307624993932,4cyclictest3352942-21munin-run09:20:010
3307624993928,7cyclictest0-21swapper/010:15:010
3307636993828,7cyclictest3383654-21munin-plugin-st10:50:013
3307632993828,4cyclictest3307907-21kworker/u8:0+events_unbound07:10:382
3307632993821,5cyclictest131rcu_preempt12:20:252
3307628993831,4cyclictest3364868-21cron09:55:011
3307624993829,5cyclictest0-21swapper/009:40:000
3307636993727,6cyclictest3319892-21grep07:40:283
3307628993728,5cyclictest0-21swapper/111:10:251
330763699367,11cyclictest3337654-21grep08:35:133
3307632993630,4cyclictest3357719-21kworker/u8:1+events_unbound10:06:062
3307632993629,4cyclictest3356355-21auditctl09:30:002
3307632993629,4cyclictest3356355-21auditctl09:30:002
3307632993626,4cyclictest3344538-21kworker/u8:0+events_unbound09:06:032
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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