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2026-02-08 - 14:07
[ 290.152] (II) VESA: driver for VESA chipsets: vesa

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #b, slot #5

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rackbslot5s.osadl.org (updated Sun Feb 08, 2026 00:44:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
4110785995647,4cyclictest4125423-21munin-plugin-st19:50:013
4110785995241,7cyclictest4135262-21grep20:15:393
4110785995241,7cyclictest4135262-21grep20:15:393
4110785995040,8cyclictest391ktimers/323:15:133
4110785994838,7cyclictest31877-21grep00:35:253
4110785994836,9cyclictest4163274-21sendmail21:40:013
4110781994835,8cyclictest4121562-21grep19:35:252
4110785994739,5cyclictest4121993-21munin-plugin-st19:40:013
4110785994638,5cyclictest7767-21idleruntime-cro23:30:003
4110776994636,7cyclictest4140803-21sh20:34:591
4110781994431,11cyclictest311ktimers/223:55:122
4110781994431,11cyclictest311ktimers/223:55:122
4110772994433,7cyclictest4140805-21cron20:35:000
4110785994326,7cyclictest131rcu_preempt23:50:103
4110781994335,6cyclictest4164631-21kworker/u8:1+events_unbound21:47:242
4110785994129,5cyclictest131rcu_preempt20:00:163
4110781994130,7cyclictest4135263-21unixbench_singl20:15:392
4110781994130,7cyclictest4135263-21unixbench_singl20:15:392
4110776994119,2cyclictest131rcu_preempt23:45:121
4110772994127,10cyclictest121ktimers/019:20:140
4110785994034,4cyclictest4183546-21kworker/u8:0+events_unbound23:02:373
4110785994034,4cyclictest4138924-21kworker/u8:2+events_unbound20:32:093
4110785994028,8cyclictest4169695-21grep21:55:243
4110781994029,7cyclictest4163263-21grep21:40:012
4110772994028,8cyclictest25079-21grep00:15:240
4110785993926,9cyclictest391ktimers/319:30:123
4110776993931,4cyclictest11212-21idleruntime-cro23:40:011
4110776993929,7cyclictest25518-21sendmail00:20:011
4110776993926,9cyclictest231ktimers/123:50:101
4110785993832,4cyclictest4160196-21kworker/u8:0+events_unbound21:52:243
4110785993827,7cyclictest0-21swapper/322:55:253
4110785993824,5cyclictest131rcu_preempt23:40:013
4110785993815,7cyclictest131rcu_preempt22:00:123
4110781993832,4cyclictest4119996-21kworker/u8:1+events_unbound19:31:582
4110781993827,8cyclictest4133542-21grep20:10:262
4110781993827,7cyclictest31880-21unixbench_multi00:35:252
4110772993828,7cyclictest0-21swapper/020:40:000
4110785993730,5cyclictest9199-21kworker/u8:1+events_unbound23:47:443
4110785993730,4cyclictest0-21swapper/323:15:003
4110785993715,10cyclictest131rcu_preempt21:26:513
4110781993718,4cyclictest131rcu_preempt21:05:012
4110776993725,8cyclictest4170120-21sendmail22:00:001
4110785993629,5cyclictest4181819-21kworker/u8:1+events_unbound22:44:423
4110785993628,4cyclictest0-21swapper/320:55:003
4110785993619,10cyclictest4141764-21mailstats20:35:233
4110785993617,11cyclictest131rcu_preempt20:00:013
4110781993625,7cyclictest4142039-21grep20:35:252
4110781993615,5cyclictest131rcu_preempt20:20:242
4110781993615,5cyclictest131rcu_preempt20:20:242
4110776993628,4cyclictest0-21swapper/100:05:161
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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