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2026-02-02 - 20:06
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rackbslot6.osadl.org (updated Mon Feb 02, 2026 12:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2047521770,3sleep3557799cyclictest12:13:123
2047521770,3sleep3557799cyclictest12:13:123
2330021630,5sleep3557799cyclictest10:02:363
106891990,39ptp4l401ktimersoftd/307:35:313
316132670,2sleep20-21swapper/209:38:502
99522640,5sleep3557799cyclictest07:44:093
52832644,10sleep20-21swapper/207:36:412
106891620,1ptp4l401ktimersoftd/312:48:093
255932610,2sleep10-21swapper/111:44:151
33162594,42sleep00-21swapper/007:33:570
106891580,1ptp4l401ktimersoftd/309:48:373
106891570,1ptp4l401ktimersoftd/312:01:103
106891560,1ptp4l401ktimersoftd/309:54:423
5556995542,7cyclictest9-21ksoftirqd/012:14:070
54002554,40sleep10-21swapper/107:38:141
106891550,1ptp4l401ktimersoftd/307:51:213
281282520,1sleep00-21swapper/008:23:480
65832510,2sleep00-21swapper/010:18:510
262422500,4sleep1556599cyclictest12:50:481
5565994840,5cyclictest25-21ksoftirqd/112:24:051
214972480,2sleep10-21swapper/111:05:331
190132480,1sleep00-21swapper/010:30:110
106891480,1ptp4l401ktimersoftd/311:31:483
146292460,1sleep10-21swapper/110:26:061
146292460,1sleep10-21swapper/110:26:061
106891460,14ptp4l2476-21kworker/3:010:26:153
106891460,14ptp4l2476-21kworker/3:010:26:153
289632440,2sleep20-21swapper/212:20:542
106891440,1ptp4l401ktimersoftd/312:21:183
555699435,7cyclictest9-21ksoftirqd/009:38:500
106891430,1ptp4l401ktimersoftd/310:05:183
5556994233,4cyclictest9-21ksoftirqd/012:04:060
118882420,2sleep10-21swapper/109:50:171
106891420,1ptp4l401ktimersoftd/311:54:133
106891410,10ptp4l401ktimersoftd/312:51:273
106891400,1ptp4l401ktimersoftd/312:38:423
106891400,0ptp4l401ktimersoftd/309:19:153
5565993925,8cyclictest25-21ksoftirqd/110:29:031
5556993930,5cyclictest9-21ksoftirqd/008:43:590
106891390,1ptp4l401ktimersoftd/312:54:193
106891390,1ptp4l401ktimersoftd/312:39:563
106891390,1ptp4l401ktimersoftd/312:29:423
106891390,1ptp4l401ktimersoftd/312:13:583
106891390,1ptp4l401ktimersoftd/311:47:103
106891390,1ptp4l401ktimersoftd/311:13:313
106891390,0ptp4l401ktimersoftd/311:38:193
106891380,2ptp4l2476-21kworker/3:011:08:243
106891380,2ptp4l2476-21kworker/3:010:11:233
106891380,1ptp4l401ktimersoftd/312:59:063
106891380,1ptp4l401ktimersoftd/312:05:503
106891380,1ptp4l401ktimersoftd/311:03:413
106891380,1ptp4l401ktimersoftd/310:53:273
106891380,1ptp4l401ktimersoftd/309:50:013
106891380,1ptp4l401ktimersoftd/309:39:403
106891370,1ptp4l401ktimersoftd/313:05:423
106891370,1ptp4l401ktimersoftd/311:49:323
106891370,1ptp4l401ktimersoftd/311:18:313
106891370,1ptp4l401ktimersoftd/310:57:383
106891370,1ptp4l401ktimersoftd/310:35:293
106891370,1ptp4l401ktimersoftd/310:17:503
5556993631,3cyclictest9-21ksoftirqd/011:08:520
5556993623,10cyclictest9-21ksoftirqd/011:34:080
106891360,1ptp4l401ktimersoftd/312:25:203
106891360,1ptp4l401ktimersoftd/311:42:143
106891360,1ptp4l401ktimersoftd/310:30:093
106891360,0ptp4l401ktimersoftd/310:39:553
5556993530,3cyclictest9-21ksoftirqd/009:49:060
5556993526,5cyclictest9-21ksoftirqd/012:39:060
5556993524,9cyclictest9-21ksoftirqd/012:44:230
555699352,3cyclictest9-21ksoftirqd/011:49:100
106891350,1ptp4l401ktimersoftd/310:45:253
555699347,3cyclictest121rcu_preempt10:54:590
5556993429,3cyclictest1055-21runrttasks11:55:180
200622340,2sleep10-21swapper/112:12:301
200622340,2sleep10-21swapper/112:12:301
106891340,1ptp4l401ktimersoftd/311:20:023
106891340,1ptp4l401ktimersoftd/308:09:043
5565993328,3cyclictest25-21ksoftirqd/109:43:501
5565993327,4cyclictest25-21ksoftirqd/112:48:541
5565993321,3cyclictest25-21ksoftirqd/110:14:071
5556993326,3cyclictest9-21ksoftirqd/012:19:060
5556993313,17cyclictest9-21ksoftirqd/009:03:490
106891330,2ptp4l2476-21kworker/3:009:13:013
106891330,1ptp4l401ktimersoftd/311:28:493
106891330,1ptp4l401ktimersoftd/308:34:003
5565993227,3cyclictest25-21ksoftirqd/113:04:091
5565993226,3cyclictest25-21ksoftirqd/109:58:491
555699326,3cyclictest121rcu_preempt10:47:080
5556993226,3cyclictest9-21ksoftirqd/013:08:550
5556993225,4cyclictest9-21ksoftirqd/012:53:540
5556993213,3cyclictest9-21ksoftirqd/008:29:170
2929923224,3sleep233-21ksoftirqd/210:09:022
106891320,1ptp4l401ktimersoftd/310:18:513
106891320,1ptp4l401ktimersoftd/308:21:123
106891320,1ptp4l401ktimersoftd/308:17:013
106891320,10ptp4l401ktimersoftd/309:29:473
106891320,0ptp4l401ktimersoftd/308:27:343
5565993126,3cyclictest25-21ksoftirqd/110:03:501
5565993125,3cyclictest25-21ksoftirqd/112:59:131
5565993116,6cyclictest25-21ksoftirqd/112:01:081
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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