You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-02-15 - 16:09
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackbslot6.osadl.org (updated Sun Feb 15, 2026 12:43:31)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
915022150,3sleep20-21swapper/207:41:292
1068911050,3ptp4l401ktimersoftd/307:45:253
47962770,4sleep2986099cyclictest11:26:262
106891700,1ptp4l401ktimersoftd/310:51:013
96842680,4sleep1985699cyclictest11:31:311
61872670,2sleep30-21swapper/312:36:133
106891670,7ptp4l401ktimersoftd/310:10:563
30422650,2sleep20-21swapper/213:06:192
245982650,2sleep30-21swapper/310:40:583
67952610,3sleep33213-21diskmemload10:56:043
52142600,4sleep35211-21ssh09:46:303
124832600,2sleep10-21swapper/108:56:181
985099584,13cyclictest2306-21sed13:06:070
80512580,1sleep00-21swapper/011:31:060
985099566,11cyclictest4656-21cat09:46:220
985099566,11cyclictest11554-21latency_hist11:01:040
985099556,11cyclictest11341-21grep12:06:350
53202550,4sleep3401ktimersoftd/313:07:413
225492550,2sleep10-21swapper/110:05:391
106891550,1ptp4l401ktimersoftd/311:51:313
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional