You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-02-02 - 18:48
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackbslot6.osadl.org (updated Mon Feb 02, 2026 12:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2047521770,3sleep3557799cyclictest12:13:123
2047521770,3sleep3557799cyclictest12:13:123
2330021630,5sleep3557799cyclictest10:02:363
106891990,39ptp4l401ktimersoftd/307:35:313
316132670,2sleep20-21swapper/209:38:502
99522640,5sleep3557799cyclictest07:44:093
52832644,10sleep20-21swapper/207:36:412
106891620,1ptp4l401ktimersoftd/312:48:093
255932610,2sleep10-21swapper/111:44:151
33162594,42sleep00-21swapper/007:33:570
106891580,1ptp4l401ktimersoftd/309:48:373
106891570,1ptp4l401ktimersoftd/312:01:103
106891560,1ptp4l401ktimersoftd/309:54:423
5556995542,7cyclictest9-21ksoftirqd/012:14:070
54002554,40sleep10-21swapper/107:38:141
106891550,1ptp4l401ktimersoftd/307:51:213
281282520,1sleep00-21swapper/008:23:480
65832510,2sleep00-21swapper/010:18:510
262422500,4sleep1556599cyclictest12:50:481
5565994840,5cyclictest25-21ksoftirqd/112:24:051
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional