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2026-01-30 - 09:42
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rackbslot6.osadl.org (updated Fri Jan 30, 2026 00:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3198721770,3sleep32313199cyclictest22:25:273
1760921570,3sleep02310999cyclictest21:37:140
1068911460,8ptp4l13014-21kworker/3:219:34:093
106891740,1ptp4l401ktimersoftd/300:00:533
106891720,1ptp4l401ktimersoftd/321:57:003
106891700,1ptp4l401ktimersoftd/300:29:003
17152670,2sleep30-21swapper/300:06:563
227252654,10sleep00-21swapper/019:33:120
23109996452,6cyclictest9-21ksoftirqd/023:47:080
85222630,2sleep30-21swapper/300:12:233
226922614,10sleep20-21swapper/219:32:452
23120995948,5cyclictest33-21ksoftirqd/219:37:022
152782590,2sleep30-21swapper/320:27:033
106891580,1ptp4l401ktimersoftd/322:36:423
106891580,1ptp4l401ktimersoftd/301:06:583
201822570,1sleep30-21swapper/321:40:343
132352570,3sleep1241ktimersoftd/100:17:181
23120995624,6cyclictest33-21ksoftirqd/200:42:272
23120995624,6cyclictest33-21ksoftirqd/200:42:272
227432554,10sleep10-21swapper/119:33:251
23109995438,8cyclictest9-21ksoftirqd/020:12:030
31772530,2sleep30-21swapper/321:56:403
23120995325,5cyclictest33-21ksoftirqd/200:36:582
23120995325,5cyclictest33-21ksoftirqd/200:36:582
23120995322,6cyclictest33-21ksoftirqd/200:52:132
23120995322,4cyclictest33-21ksoftirqd/200:37:112
23120995322,4cyclictest33-21ksoftirqd/200:37:112
23120995318,6cyclictest33-21ksoftirqd/200:51:212
23120995225,4cyclictest33-21ksoftirqd/220:47:222
23120995222,6cyclictest33-21ksoftirqd/201:02:162
67042510,4sleep3401ktimersoftd/300:43:343
67042510,4sleep3401ktimersoftd/300:43:343
23120995135,3cyclictest33-21ksoftirqd/220:32:212
23120995124,5cyclictest33-21ksoftirqd/200:57:112
23120995121,5cyclictest33-21ksoftirqd/223:27:082
23120995020,6cyclictest33-21ksoftirqd/221:52:232
23120995016,4cyclictest33-21ksoftirqd/221:32:232
23120994930,3cyclictest33-21ksoftirqd/222:22:042
23120994924,4cyclictest33-21ksoftirqd/222:04:452
23120994922,4cyclictest33-21ksoftirqd/221:47:122
23120994913,4cyclictest33-21ksoftirqd/219:57:092
23109994934,7cyclictest9-21ksoftirqd/021:47:070
23120994823,3cyclictest33-21ksoftirqd/200:17:592
23120994822,4cyclictest33-21ksoftirqd/222:57:062
23120994822,4cyclictest33-21ksoftirqd/222:57:062
23120994822,3cyclictest33-21ksoftirqd/222:49:182
23120994822,10cyclictest33-21ksoftirqd/222:17:062
106891480,1ptp4l401ktimersoftd/323:52:303
2312099477,3cyclictest33-21ksoftirqd/200:27:152
23120994726,7cyclictest33-21ksoftirqd/220:07:102
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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