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2026-01-25 - 00:14
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rackbslot6.osadl.org (updated Sat Jan 24, 2026 12:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2676621610,4sleep1601999cyclictest10:34:091
1777121560,3sleep2602599cyclictest07:54:112
1068911090,4ptp4l401ktimersoftd/307:29:073
57412620,3sleep2311rcuc/212:55:542
6019996053,3cyclictest25-21ksoftirqd/111:14:041
58342594,10sleep10-21swapper/107:32:471
102102590,3sleep1601999cyclictest10:49:181
6019995648,4cyclictest25-21ksoftirqd/112:54:041
56352564,40sleep00-21swapper/007:30:110
6019995543,8cyclictest25-21ksoftirqd/111:35:361
303072550,2sleep20-21swapper/212:48:552
6019995444,4cyclictest25-21ksoftirqd/112:24:051
6019995343,6cyclictest25-21ksoftirqd/108:14:001
6019995242,5cyclictest25-21ksoftirqd/109:29:021
6019995142,5cyclictest25-21ksoftirqd/109:54:031
6019995141,5cyclictest25-21ksoftirqd/112:04:051
6019994837,5cyclictest25-21ksoftirqd/107:44:001
563224727,9sleep20-21swapper/207:30:092
179642470,2sleep30-21swapper/307:54:163
6032994616,7cyclictest41-21ksoftirqd/311:52:143
6032994422,9cyclictest41-21ksoftirqd/312:44:263
6032994419,8cyclictest41-21ksoftirqd/309:51:333
6019994433,6cyclictest25-21ksoftirqd/108:44:011
603299431,7cyclictest38182sleep311:15:503
6019994231,5cyclictest25-21ksoftirqd/108:49:021
6032994016,4cyclictest41-21ksoftirqd/309:59:563
6019994029,5cyclictest25-21ksoftirqd/112:49:061
6019994029,4cyclictest25-21ksoftirqd/109:59:031
603299394,5cyclictest41-21ksoftirqd/309:36:573
603299386,5cyclictest41-21ksoftirqd/311:26:263
603299385,5cyclictest41-21ksoftirqd/312:38:313
603299385,5cyclictest41-21ksoftirqd/311:55:563
603299384,5cyclictest41-21ksoftirqd/312:11:583
601999381,3cyclictest121rcu_preempt11:29:221
106891380,1ptp4l401ktimersoftd/312:56:123
106891380,1ptp4l401ktimersoftd/312:31:413
106891380,1ptp4l401ktimersoftd/312:28:393
106891380,1ptp4l401ktimersoftd/312:19:053
106891380,1ptp4l401ktimersoftd/311:42:393
106891380,1ptp4l401ktimersoftd/311:09:413
106891380,1ptp4l401ktimersoftd/310:35:463
106891380,1ptp4l401ktimersoftd/309:40:363
603299376,5cyclictest41-21ksoftirqd/308:08:483
603299374,5cyclictest41-21ksoftirqd/312:39:013
106891370,1ptp4l401ktimersoftd/313:01:473
106891370,1ptp4l401ktimersoftd/312:17:373
106891370,1ptp4l401ktimersoftd/311:46:013
106891370,1ptp4l401ktimersoftd/311:46:013
106891370,1ptp4l401ktimersoftd/311:34:243
106891370,1ptp4l401ktimersoftd/311:18:583
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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