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2026-03-04 - 14:30
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rackbslot6.osadl.org (updated Wed Mar 04, 2026 00:43:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1313721850,5sleep12565199cyclictest23:26:221
1274921560,4sleep32566299cyclictest22:54:043
2349821530,4sleep02564599cyclictest00:42:570
175021270,2sleep10-21swapper/100:20:341
1068911090,4ptp4l401ktimersoftd/319:54:163
1068911090,4ptp4l401ktimersoftd/319:54:163
186482770,2sleep00-21swapper/023:32:030
206702760,4sleep12565199cyclictest20:50:201
106891700,1ptp4l401ktimersoftd/301:12:553
106891700,1ptp4l401ktimersoftd/301:02:483
106891690,1ptp4l401ktimersoftd/323:06:063
25655996531,4cyclictest33-21ksoftirqd/221:55:272
25655996421,9cyclictest33-21ksoftirqd/200:40:352
81862620,2sleep30-21swapper/323:21:183
128862590,2sleep30-21swapper/320:30:393
106891580,1ptp4l401ktimersoftd/300:45:013
283862570,4sleep02564599cyclictest20:00:090
282272560,2sleep128230-21wc22:35:391
263262560,3sleep02564599cyclictest00:45:340
25651995619,6cyclictest25-21ksoftirqd/122:26:181
106891560,2ptp4l16608-21kworker/3:222:14:393
269562550,2sleep30-21swapper/321:00:383
25655995524,6cyclictest33-21ksoftirqd/200:25:142
312412540,2sleep00-21swapper/001:24:050
25655995424,9cyclictest33-21ksoftirqd/223:25:412
25651995431,8cyclictest25-21ksoftirqd/123:42:491
25651995421,7cyclictest25-21ksoftirqd/122:18:551
25651995420,7cyclictest25-21ksoftirqd/122:46:121
25651995419,4cyclictest25-21ksoftirqd/123:17:121
25651995419,4cyclictest25-21ksoftirqd/123:17:121
121502540,1sleep10-21swapper/123:59:261
25655995323,17cyclictest33-21ksoftirqd/223:00:222
25655995222,17cyclictest33-21ksoftirqd/221:20:252
25651995220,9cyclictest25-21ksoftirqd/100:34:511
253982524,34sleep20-21swapper/219:53:132
253982524,34sleep20-21swapper/219:53:132
106891520,1ptp4l401ktimersoftd/323:01:403
2565599516,9cyclictest33-21ksoftirqd/223:40:132
2565599515,8cyclictest33-21ksoftirqd/222:50:372
2565599514,8cyclictest33-21ksoftirqd/200:00:412
2565199513,9cyclictest25-21ksoftirqd/101:23:351
25651995121,8cyclictest25-21ksoftirqd/123:02:031
25651995119,7cyclictest25-21ksoftirqd/100:09:181
25645995141,5cyclictest9-21ksoftirqd/000:35:250
2565599503,6cyclictest33-21ksoftirqd/223:10:302
2565599503,6cyclictest33-21ksoftirqd/223:10:302
25655995021,5cyclictest33-21ksoftirqd/221:25:282
25655995021,11cyclictest33-21ksoftirqd/222:05:312
25655995021,10cyclictest33-21ksoftirqd/221:15:212
25655995020,10cyclictest33-21ksoftirqd/223:30:312
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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