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2026-02-04 - 19:56
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rackbslot6.osadl.org (updated Wed Feb 04, 2026 12:43:31)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3017221820,5sleep11091699cyclictest11:10:171
1925621620,4sleep11091699cyclictest09:53:171
1925621620,4sleep11091699cyclictest09:53:171
106891960,3ptp4l401ktimersoftd/307:35:363
10922997158,5cyclictest33-21ksoftirqd/211:45:102
106891710,1ptp4l401ktimersoftd/311:04:503
84472704,10sleep20-21swapper/207:34:542
180712700,4sleep21092299cyclictest07:50:172
178372690,2sleep10-21swapper/112:04:091
106891670,1ptp4l401ktimersoftd/312:57:133
106891670,1ptp4l401ktimersoftd/310:43:333
182812630,2sleep20-21swapper/212:04:552
105352634,9sleep00-21swapper/007:36:170
10922996147,7cyclictest33-21ksoftirqd/209:30:082
10910996049,6cyclictest9-21ksoftirqd/011:50:110
143072590,4sleep314309-21fschecks_time12:35:153
10922995944,7cyclictest33-21ksoftirqd/213:05:122
45032580,2sleep10-21swapper/109:35:181
262392580,2sleep30-21swapper/311:05:263
5122570,2sleep30-21swapper/312:54:463
311922570,4sleep1241ktimersoftd/108:19:551
228402570,4sleep01091099cyclictest12:09:220
10916995425,5cyclictest25-21ksoftirqd/111:35:271
10916995425,5cyclictest25-21ksoftirqd/111:35:271
10916995325,5cyclictest25-21ksoftirqd/112:35:181
10916995324,4cyclictest25-21ksoftirqd/110:25:171
10916995224,8cyclictest25-21ksoftirqd/112:55:011
10916995224,5cyclictest25-21ksoftirqd/108:40:161
10916995223,9cyclictest25-21ksoftirqd/113:00:291
10916995223,5cyclictest25-21ksoftirqd/111:00:141
10916995223,4cyclictest25-21ksoftirqd/111:15:301
10916995223,11cyclictest25-21ksoftirqd/110:30:121
10916995222,5cyclictest25-21ksoftirqd/109:10:241
10916995221,7cyclictest25-21ksoftirqd/112:25:391
10916995124,4cyclictest25-21ksoftirqd/108:45:101
10916995124,10cyclictest25-21ksoftirqd/109:55:171
10916995123,4cyclictest25-21ksoftirqd/113:07:441
10916995123,4cyclictest25-21ksoftirqd/111:05:181
10916995121,5cyclictest25-21ksoftirqd/108:30:161
10916995120,8cyclictest25-21ksoftirqd/112:18:361
1091699502,8cyclictest25-21ksoftirqd/111:50:171
10916995022,6cyclictest25-21ksoftirqd/110:55:121
10916995022,4cyclictest25-21ksoftirqd/110:53:141
10916995021,10cyclictest25-21ksoftirqd/111:55:101
10916995020,7cyclictest25-21ksoftirqd/110:36:471
10916995019,8cyclictest25-21ksoftirqd/112:44:181
10916995019,8cyclictest25-21ksoftirqd/110:15:471
10916995019,7cyclictest25-21ksoftirqd/112:45:051
10916994924,4cyclictest25-21ksoftirqd/109:24:551
10916994923,4cyclictest25-21ksoftirqd/111:30:101
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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