You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-02-09 - 10:36
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackbslot7.osadl.org (updated Mon Feb 09, 2026 00:44:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
250321387,78sleep015-21ksoftirqd/019:02:560
37819911558,50cyclictest200-21systemd-journal00:32:280
3781991083,91cyclictest1695-21apt-get23:32:400
3652210521,55sleep13677-21munin-run19:07:291
37949910424,37cyclictest0-21swapper/221:48:592
2335321040,5sleep00-21swapper/022:20:030
37819910240,55cyclictest0-21swapper/020:38:130
3781991013,63cyclictest1241-21rm00:26:120
37819910131,42cyclictest13202-21kworker/u17:022:57:330
3781991012,86cyclictest10278-21ssh22:52:450
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional