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2025-11-19 - 01:01
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackbslot7.osadl.org (updated Tue Nov 18, 2025 12:44:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
22234215313,101sleep222298-21fschecks_time07:05:042
22234215313,101sleep222298-21fschecks_time07:05:042
23543991023,33cyclictest27985-21diskmemload11:59:342
23543991023,33cyclictest27985-21diskmemload11:59:342
23527999955,17cyclictest181rcu_preempt09:51:210
23527999955,17cyclictest181rcu_preempt09:51:210
23527999662,12cyclictest181rcu_preempt07:59:540
231852966,16sleep10-21swapper/107:07:021
231852966,16sleep10-21swapper/107:07:021
2354399953,8cyclictest0-21swapper/210:09:542
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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