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2026-06-17 - 07:16
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackbslot7.osadl.org (updated Wed Jun 17, 2026 00:44:28)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
317439912043,23cyclictest24324-21modprobe20:13:560
317439911439,8cyclictest0-21swapper/021:09:280
30391211217,68sleep030469-21fschecks_time18:54:210
317439911180,25cyclictest16181-21kernelversion21:14:230
3266821100,6sleep20-21swapper/222:34:512
3266821100,6sleep20-21swapper/222:34:512
317439911035,8cyclictest0-21swapper/019:08:550
317439911033,8cyclictest0-21swapper/022:15:120
317439911028,70cyclictest0-21swapper/019:19:170
31743991102,31cyclictest19643-21sendmail23:08:550
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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