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2025-12-08 - 14:16
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackbslot7.osadl.org (updated Mon Dec 08, 2025 00:44:29)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
18346212943,56sleep118396-21sensors_temp19:04:041
18346212943,56sleep118396-21sensors_temp19:04:041
1880121196,15sleep00-21swapper/019:05:250
1880121196,15sleep00-21swapper/019:05:250
191989911695,14cyclictest31186-21apt-key19:43:242
19178991169,52cyclictest15597-21apt-get22:38:350
19178991169,52cyclictest15597-21apt-get22:38:350
191899910727,27cyclictest0-21swapper/120:18:341
19178991068,26cyclictest181rcu_preempt22:28:380
191789910347,12cyclictest181rcu_preempt21:33:210
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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