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2026-04-13 - 15:01
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackbslot7.osadl.org (updated Mon Apr 13, 2026 12:44:29)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
191009911158,45cyclictest0-21swapper/210:28:182
191009910038,8cyclictest0-21swapper/210:28:532
191009910038,8cyclictest0-21swapper/210:28:532
1863921006,15sleep10-21swapper/107:01:041
1863921006,15sleep10-21swapper/107:01:041
212232990,8sleep30-21swapper/309:48:423
1910099992,75cyclictest3957-21cstates11:08:542
19100999832,13cyclictest0-21swapper/211:01:122
19100999772,18cyclictest1-21systemd09:33:162
19100999728,12cyclictest0-21swapper/210:53:332
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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