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2026-06-21 - 12:25
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackbslot7.osadl.org (updated Sun Jun 21, 2026 00:44:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
208189912343,73cyclictest17090-21systemctl22:28:390
208189912343,73cyclictest17090-21systemctl22:28:390
208189911331,13cyclictest0-21swapper/020:44:010
20818991132,38cyclictest26491-21latency_hist20:53:420
208189910836,13cyclictest0-21swapper/020:09:050
20818991074,37cyclictest27361-21unixbench_multi22:44:160
20818991074,37cyclictest27361-21unixbench_multi22:44:160
20818991073,53cyclictest12471-21ssh00:08:390
208189910734,15cyclictest0-21swapper/020:14:050
208189910734,15cyclictest0-21swapper/020:14:050
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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