You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-06-14 - 05:49
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackbslot7.osadl.org (updated Sun Jun 14, 2026 00:44:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
12891212113,74sleep112918-21/usr/sbin/munin18:54:491
13657210916,55sleep013667-21modprobe18:59:080
13834999562,8cyclictest181rcu_preempt21:35:442
13834999562,8cyclictest181rcu_preempt21:35:442
13834999459,8cyclictest181rcu_preempt21:34:042
13816999460,8cyclictest181rcu_preempt22:55:260
13834999362,21cyclictest2340-21awk00:04:072
13834999157,7cyclictest181rcu_preempt22:07:272
13834999154,8cyclictest181rcu_preempt21:40:012
13825999172,13cyclictest3574-21ssh00:04:441
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional