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2026-06-06 - 01:15
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackbslot7.osadl.org (updated Fri Jun 05, 2026 12:44:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
13797218413,123sleep11-21systemd06:59:451
13896999978,14cyclictest352-21runrttasks12:25:042
13883999466,19cyclictest20790-21diskmemload09:11:530
13883999466,19cyclictest20790-21diskmemload09:11:530
13896999269,15cyclictest0-21swapper/208:19:442
13896999269,15cyclictest0-21swapper/208:19:442
13896999249,12cyclictest23759-21ssh09:57:542
13896999050,10cyclictest181rcu_preempt09:40:172
13883999054,11cyclictest181rcu_preempt12:08:060
13883999054,11cyclictest181rcu_preempt12:08:060
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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