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2025-05-02 - 12:20
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rackbslot7.osadl.org (updated Fri May 02, 2025 00:44:37)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1721421080,8sleep30-21swapper/320:50:233
14665210411,60sleep014742-21tune2fs19:05:240
159889910055,13cyclictest181rcu_preempt20:29:582
15988999541,30cyclictest0-21swapper/222:20:212
15988999541,30cyclictest0-21swapper/222:20:212
15988999472,8cyclictest181rcu_preempt22:19:482
15988999434,25cyclictest0-21swapper/220:30:142
15988999434,25cyclictest0-21swapper/220:30:142
15988999256,13cyclictest181rcu_preempt19:30:192
15988999235,15cyclictest24332-21ssh22:04:422
15988999235,15cyclictest24332-21ssh22:04:422
15967999268,13cyclictest0-21swapper/020:39:590
15967999268,13cyclictest0-21swapper/020:39:590
15988999155,13cyclictest28816-21ssh23:03:132
15988999155,13cyclictest28816-21ssh23:03:132
15988999027,18cyclictest0-21swapper/221:54:452
15979999068,14cyclictest26321-21sh21:14:591
15979999068,14cyclictest26321-21sh21:14:591
15967999072,13cyclictest15957-21cyclictest21:29:570
1598899892,23cyclictest11526-21runrttasks22:35:312
1598899892,23cyclictest11526-21runrttasks22:35:312
15967998964,17cyclictest0-21swapper/000:24:570
15967998956,25cyclictest18724-21latency_hist23:39:590
15967998956,25cyclictest18724-21latency_hist23:39:590
151742896,55sleep115214-21switchtime19:05:421
15988998861,11cyclictest181rcu_preempt00:20:352
15988998856,9cyclictest181rcu_preempt22:53:492
15988998856,9cyclictest181rcu_preempt22:53:492
15988998853,12cyclictest181rcu_preempt23:25:342
145852887,54sleep214628-21df19:05:182
1599799873,45cyclictest896-21kworker/3:1+pm21:20:183
1599799873,45cyclictest896-21kworker/3:1+pm21:20:183
15988998764,8cyclictest181rcu_preempt22:41:352
15988998751,14cyclictest181rcu_preempt21:46:192
15988998735,13cyclictest0-21swapper/200:28:052
15967998766,12cyclictest0-21swapper/020:20:220
15967998766,12cyclictest0-21swapper/020:20:220
15967998765,12cyclictest0-21swapper/019:45:230
15967998753,28cyclictest330-21systemd-logind22:54:560
15967998753,28cyclictest330-21systemd-logind22:54:560
15988998655,9cyclictest4058-21ssh00:08:312
1597999868,30cyclictest31-21ksoftirqd/121:35:431
15988998541,10cyclictest0-21swapper/222:58:472
15988998523,19cyclictest0-21swapper/223:16:122
1596799853,29cyclictest15-21ksoftirqd/022:22:450
1596799853,29cyclictest15-21ksoftirqd/022:22:450
59032840,8sleep00-21swapper/021:34:330
15988998443,9cyclictest0-21swapper/200:01:502
15967998466,12cyclictest23102-21diskmemload21:37:570
15988998362,15cyclictest31434-21sh21:22:242
15988998362,15cyclictest31434-21sh21:22:242
15988998351,16cyclictest181rcu_preempt21:29:592
15988998345,9cyclictest181rcu_preempt23:56:032
15988998345,9cyclictest181rcu_preempt23:56:032
15988998337,22cyclictest2193-21kworker/u17:1-nfsiod21:30:112
15988998327,17cyclictest0-21swapper/222:08:512
15967998317,34cyclictest15-21ksoftirqd/020:58:250
1464728319,43sleep30-21swapper/319:05:233
15988998255,11cyclictest181rcu_preempt20:00:272
15988998255,11cyclictest181rcu_preempt20:00:272
15988998247,8cyclictest181rcu_preempt00:18:102
15988998247,8cyclictest181rcu_preempt00:18:102
15988998246,7cyclictest181rcu_preempt23:44:122
15988998246,7cyclictest181rcu_preempt23:44:122
15988998241,9cyclictest0-21swapper/200:35:342
15988998239,16cyclictest15957-21cyclictest21:09:582
15988998222,19cyclictest0-21swapper/221:35:222
1596799825,47cyclictest15-21ksoftirqd/019:27:420
1596799825,43cyclictest15-21ksoftirqd/021:01:370
1596799825,43cyclictest15-21ksoftirqd/021:01:370
1599799814,35cyclictest9782-21chrt23:25:183
1599799813,46cyclictest896-21kworker/3:1+pm20:15:113
15988998154,11cyclictest181rcu_preempt20:24:582
15988998154,11cyclictest181rcu_preempt20:24:582
15988998144,16cyclictest181rcu_preempt23:51:332
15988998144,16cyclictest181rcu_preempt23:51:332
15988998143,12cyclictest181rcu_preempt23:39:582
15988998143,12cyclictest181rcu_preempt23:39:582
15988998136,13cyclictest181rcu_preempt22:31:462
15988998125,12cyclictest0-21swapper/223:30:362
15967998143,7cyclictest181rcu_preempt23:44:210
15967998143,7cyclictest181rcu_preempt23:44:210
15967998131,24cyclictest181rcu_preempt20:19:480
1596799812,34cyclictest15-21ksoftirqd/022:03:470
1596799812,34cyclictest15-21ksoftirqd/022:03:470
312862802,20sleep031295-21ssh23:06:400
15988998035,16cyclictest181rcu_preempt21:14:142
15988998035,16cyclictest181rcu_preempt21:14:142
15988998029,12cyclictest0-21swapper/220:39:582
15988998029,12cyclictest0-21swapper/220:39:582
15988998028,29cyclictest0-21swapper/200:10:162
1598899802,53cyclictest22260-21ssh23:45:332
1598899802,53cyclictest22260-21ssh23:45:332
1597999805,28cyclictest31-21ksoftirqd/122:26:291
15967998064,9cyclictest0-21swapper/019:59:590
15967998047,27cyclictest330-21systemd-logind23:54:550
15967998047,27cyclictest330-21systemd-logind23:54:550
15967998043,16cyclictest12355-21latency_hist21:44:580
1599799792,55cyclictest22261-21chrt23:45:333
1599799792,55cyclictest22261-21chrt23:45:333
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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