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2025-11-16 - 07:48
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rackbslot7.osadl.org (updated Sun Nov 16, 2025 00:44:27)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
13698211615,62sleep013729-21munin-run19:09:470
12558211014,65sleep212629-21grep19:05:172
138699910069,9cyclictest181rcu_preempt23:31:462
13852999865,12cyclictest181rcu_preempt19:40:130
13852999776,14cyclictest21280-21diskmemload00:15:060
13869999555,11cyclictest181rcu_preempt21:15:292
13852999352,12cyclictest181rcu_preempt22:02:500
13869999173,12cyclictest1111-21ssh23:15:272
13869999160,8cyclictest181rcu_preempt23:00:342
13869999160,8cyclictest181rcu_preempt23:00:342
13852999164,11cyclictest181rcu_preempt23:00:050
13852999164,11cyclictest181rcu_preempt23:00:050
13852999155,17cyclictest181rcu_preempt21:18:290
13852999068,13cyclictest6691-21ssh00:20:220
13852999059,13cyclictest181rcu_preempt21:05:320
13869998954,23cyclictest8955-21grep00:25:102
13869998954,23cyclictest8955-21grep00:25:102
13869998935,17cyclictest181rcu_preempt22:15:142
13869998935,17cyclictest181rcu_preempt22:15:142
13869998934,12cyclictest181rcu_preempt22:40:012
13869998840,10cyclictest181rcu_preempt00:31:292
13869998840,10cyclictest181rcu_preempt00:31:292
13863998771,10cyclictest292-21dbus-daemon21:49:471
13852998758,11cyclictest181rcu_preempt22:29:130
13852998654,25cyclictest18795-21latency_hist21:59:500
13852998644,13cyclictest181rcu_preempt21:35:110
13869998548,8cyclictest181rcu_preempt22:34:122
13863998569,9cyclictest8412-21munin-plugin-st00:24:461
13869998439,8cyclictest181rcu_preempt20:05:052
13869998435,16cyclictest181rcu_preempt21:33:102
13869998435,16cyclictest181rcu_preempt21:33:102
1385299843,48cyclictest15-21ksoftirqd/021:49:210
13852998355,20cyclictest31062-21latency_hist22:19:490
13852998355,20cyclictest31062-21latency_hist22:19:490
13852998350,12cyclictest181rcu_preempt00:30:400
13852998350,12cyclictest181rcu_preempt00:30:400
13852998345,14cyclictest181rcu_preempt20:05:100
13852998336,17cyclictest181rcu_preempt22:24:330
13869998263,13cyclictest18009-21timerandwakeup22:50:252
13869998251,9cyclictest181rcu_preempt23:57:192
13869998236,15cyclictest181rcu_preempt21:59:482
13869998230,15cyclictest181rcu_preempt22:45:412
13869998230,15cyclictest181rcu_preempt22:45:412
13863998267,8cyclictest0-21swapper/123:59:471
13863998260,15cyclictest3910-21sh21:34:571
13852998266,11cyclictest13842-21cyclictest00:09:470
13852998266,11cyclictest13842-21cyclictest00:09:470
1385299826,58cyclictest207-21systemd-journal23:10:370
1385299826,58cyclictest207-21systemd-journal23:10:370
13852998264,12cyclictest316-21rs:main0
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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