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2026-04-03 - 02:58
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rackbslot7.osadl.org (updated Fri Apr 03, 2026 00:44:34)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
551822520,33sleep2371rcuc/218:59:242
551822520,33sleep2371rcuc/218:59:242
589229910,62sleep05931-21awk18:59:400
589229910,62sleep05931-21awk18:59:400
6681999425,29cyclictest39-21ksoftirqd/221:29:012
6681999425,29cyclictest39-21ksoftirqd/221:29:012
6675999474,14cyclictest3399-21kworker/u19:2-nfsiod23:33:571
6675999474,14cyclictest3399-21kworker/u19:2-nfsiod23:33:571
6681999369,8cyclictest181rcu_preempt23:39:382
6681999369,8cyclictest181rcu_preempt23:39:382
6681999360,9cyclictest181rcu_preempt19:42:032
6681999277,10cyclictest6655-21cyclictest22:39:282
6675999264,8cyclictest181rcu_preempt19:19:321
6681999017,42cyclictest39-21ksoftirqd/200:24:212
6681998956,7cyclictest181rcu_preempt21:08:152
6675998963,8cyclictest181rcu_preempt22:38:501
6675998963,8cyclictest181rcu_preempt22:38:501
6675998813,45cyclictest31-21ksoftirqd/122:06:571
6675998813,45cyclictest31-21ksoftirqd/122:06:571
6681998737,29cyclictest58-21kcompactd023:12:392
6681998737,29cyclictest58-21kcompactd023:12:392
6675998664,8cyclictest181rcu_preempt23:12:531
6675998664,8cyclictest181rcu_preempt23:12:531
6675998622,26cyclictest0-21swapper/121:20:001
6663998664,16cyclictest31187-21ssh00:13:570
6681998561,8cyclictest181rcu_preempt23:04:502
6681998561,8cyclictest181rcu_preempt23:04:502
6681998548,26cyclictest3399-21kworker/u19:2+nfsiod00:29:182
6681998514,42cyclictest39-21ksoftirqd/221:29:162
6675998562,8cyclictest181rcu_preempt23:40:461
6675998562,8cyclictest181rcu_preempt23:40:461
6675998561,17cyclictest6655-21cyclictest19:34:341
6675998561,17cyclictest6655-21cyclictest19:34:341
6675998548,9cyclictest181rcu_preempt21:41:161
6675998548,12cyclictest181rcu_preempt20:54:321
577628510,47sleep15796-21/usr/sbin/munin18:59:371
577628510,47sleep15796-21/usr/sbin/munin18:59:371
6681998459,12cyclictest181rcu_preempt23:00:462
6681998448,10cyclictest181rcu_preempt20:41:042
6681998448,10cyclictest181rcu_preempt20:41:042
6675998468,10cyclictest21889-21proc_pri22:09:311
6675998461,15cyclictest8671-21idleruntime-cro21:48:571
6675998461,15cyclictest8671-21idleruntime-cro21:48:571
6663998456,20cyclictest17134-21idleruntime-cro21:08:570
6681998361,8cyclictest181rcu_preempt20:59:332
6681998354,11cyclictest181rcu_preempt19:39:022
6681998346,21cyclictest0-21swapper/219:44:362
6681998343,17cyclictest6655-21cyclictest23:53:432
6675998341,24cyclictest20194-21unin-run21:13:591
6675998336,7cyclictest181rcu_preempt20:52:541
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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