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2026-02-11 - 18:51
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rackbslot7.osadl.org (updated Wed Feb 11, 2026 12:44:31)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2633521339,19sleep00-21swapper/007:02:530
27436991263,96cyclictest19132-21apt-get11:22:372
3016121200,5sleep30-21swapper/307:12:503
3016121200,5sleep30-21swapper/307:12:503
2705621206,16sleep10-21swapper/107:04:331
2726429917,51sleep227288-21munin-run07:07:192
18372990,4sleep21840-21sed10:52:542
18372990,4sleep21840-21sed10:52:542
293502980,9sleep20-21swapper/210:45:202
293502980,9sleep20-21swapper/210:45:202
27436999557,31cyclictest0-21swapper/207:37:402
27431999573,12cyclictest0-21swapper/110:27:511
27427999541,11cyclictest181rcu_preempt09:26:440
27427999541,11cyclictest181rcu_preempt09:26:440
2743699949,49cyclictest31511-21apt-get07:17:342
2743699949,49cyclictest31511-21apt-get07:17:342
27436999268,16cyclictest19240-21kworker/u17:0-writeback09:47:542
27431999271,11cyclictest0-21swapper/111:57:561
27436999167,15cyclictest8943-21ssh09:17:382
27431999157,9cyclictest181rcu_preempt10:58:211
27436999068,15cyclictest297-21systemd-logind07:12:232
27436999068,15cyclictest297-21systemd-logind07:12:232
27436999061,19cyclictest3773-21latency_hist07:32:222
2743699893,40cyclictest31311-21apt-config07:17:222
2743699893,40cyclictest31311-21apt-config07:17:222
2743699893,38cyclictest735-21sh09:57:402
2743699893,38cyclictest735-21sh09:57:402
2743699893,26cyclictest26172-21sshd09:46:202
27431998970,9cyclictest0-21swapper/111:37:231
27436998834,47cyclictest12056-21cron10:17:192
2743699883,39cyclictest5191-21sh10:58:202
2743699883,37cyclictest27954-21latency_hist11:37:222
2743699883,35cyclictest352-21runrttasks09:31:452
27431998869,11cyclictest0-21swapper/112:12:221
27427998869,10cyclictest0-21swapper/010:52:400
27427998869,10cyclictest0-21swapper/010:52:400
27427998862,18cyclictest0-21swapper/010:27:350
2743699873,37cyclictest19080-21latency_hist11:22:232
2743699873,36cyclictest969-21ssh11:46:192
27436998729,46cyclictest0-21swapper/212:08:282
27431998764,15cyclictest27417-21cyclictest11:29:021
2743699867,33cyclictest3741-21rm11:50:422
2743699864,37cyclictest10104-21ssh11:07:382
2743699863,37cyclictest16896-21latency_hist08:12:232
2743699863,37cyclictest16896-21latency_hist08:12:232
2743699863,30cyclictest11896-21ssh09:22:322
2743699863,30cyclictest11896-21ssh09:22:322
27431998641,16cyclictest27417-21cyclictest10:01:581
27431998641,16cyclictest27417-21cyclictest10:01:581
27427998670,8cyclictest0-21swapper/011:37:210
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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