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2026-02-25 - 19:24
[ 290.152] (II) VESA: driver for VESA chipsets: vesa

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #b, slot #8

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rackbslot8s (updated Wed Feb 25, 2026 12:44:15)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
13075132120105,10sleep60-21swapper/607:06:006
1307694211789,9sleep10-21swapper/107:08:361
1307657211787,9sleep20-21swapper/207:08:042
13075502115100,10sleep50-21swapper/507:06:315
13074132115100,10sleep70-21swapper/707:05:217
1307641211399,9sleep40-21swapper/407:07:504
1307593211095,10sleep30-21swapper/307:07:093
1307498210894,9sleep00-21swapper/007:05:460
1308031991041,102cyclictest1307913-21kworker/2:209:11:412
130803199104101,2cyclictest31-21ksoftirqd/208:24:532
1308031991031,100cyclictest1459854-21kworker/2:110:32:032
130803199103101,2cyclictest31-21ksoftirqd/208:32:232
130803199103100,2cyclictest31-21ksoftirqd/208:17:392
13080469910299,3cyclictest553-21snmpd09:27:536
1308046991020,99cyclictest0-21swapper/611:35:156
1308046991020,100cyclictest0-21swapper/610:21:346
1308044991020,100cyclictest0-21swapper/509:25:085
13080409910299,3cyclictest553-21snmpd11:37:134
13080409910299,3cyclictest553-21snmpd09:36:334
1308031991022,1cyclictest31-21ksoftirqd/210:49:432
1308031991022,100cyclictest31-21ksoftirqd/210:23:332
1308031991021,101cyclictest31-21ksoftirqd/209:45:392
1308031991021,100cyclictest31-21ksoftirqd/209:37:552
130803199102100,2cyclictest31-21ksoftirqd/208:11:092
130803199102100,2cyclictest31-21ksoftirqd/207:42:392
130803199102100,2cyclictest31-21ksoftirqd/207:25:332
130803199102100,2cyclictest1307913-21kworker/2:209:40:552
130803199102100,0cyclictest0-21swapper/211:13:272
1308031991020,1cyclictest1426525-21kworker/2:010:11:092
1308031991020,1cyclictest1307913-21kworker/2:209:50:152
1308031991020,100cyclictest1493390-21kworker/2:211:15:092
1308031991020,100cyclictest1307913-21kworker/2:209:55:412
1308031991020,100cyclictest0-21swapper/209:16:032
1308027991020,102cyclictest0-21swapper/111:11:481
1308023991020,101cyclictest0-21swapper/008:08:090
1308023991020,101cyclictest0-21swapper/008:08:090
1308051991010,101cyclictest0-21swapper/707:50:327
1308051991010,100cyclictest0-21swapper/712:20:177
1308051991010,100cyclictest0-21swapper/710:40:417
1308051991010,100cyclictest0-21swapper/709:54:577
13080469910199,2cyclictest553-21snmpd12:22:056
13080469910198,3cyclictest553-21snmpd08:34:226
130804699101100,1cyclictest553-21snmpd07:43:026
1308046991010,101cyclictest0-21swapper/609:15:206
1308046991010,0cyclictest0-21swapper/610:31:586
1308044991010,100cyclictest0-21swapper/511:35:305
13080409910199,2cyclictest553-21snmpd12:35:574
13080409910199,2cyclictest553-21snmpd09:47:064
13080409910199,2cyclictest553-21snmpd09:15:054
13080409910199,1cyclictest553-21snmpd09:01:084
13080409910198,3cyclictest553-21snmpd11:41:254
13080359910199,2cyclictest553-21snmpd11:36:493
13080359910199,2cyclictest553-21snmpd11:05:053
13080359910199,2cyclictest553-21snmpd07:32:023
13080359910199,1cyclictest553-21snmpd12:33:513
13080359910198,3cyclictest553-21snmpd10:09:013
13080319910199,2cyclictest31-21ksoftirqd/208:56:452
13080319910199,2cyclictest31-21ksoftirqd/208:51:092
13080319910199,2cyclictest31-21ksoftirqd/208:47:092
13080319910199,2cyclictest31-21ksoftirqd/208:05:272
13080319910199,2cyclictest31-21ksoftirqd/208:05:272
13080319910199,2cyclictest31-21ksoftirqd/207:56:052
13080319910199,2cyclictest31-21ksoftirqd/207:45:392
13080319910199,2cyclictest31-21ksoftirqd/207:36:052
13080319910199,2cyclictest31-21ksoftirqd/207:23:352
13080319910199,2cyclictest31-21ksoftirqd/207:18:392
13080319910199,2cyclictest1459854-21kworker/2:110:51:012
13080319910199,2cyclictest1459854-21kworker/2:110:39:172
13080319910199,2cyclictest1307913-21kworker/2:208:25:072
13080319910199,1cyclictest0-21swapper/208:35:572
1308031991011,1cyclictest31-21ksoftirqd/212:04:052
1308031991011,1cyclictest31-21ksoftirqd/211:25:172
1308031991011,1cyclictest31-21ksoftirqd/210:03:172
1308031991011,1cyclictest1307913-21kworker/2:209:25:012
1308031991011,100cyclictest31-21ksoftirqd/211:50:312
1308031991011,100cyclictest31-21ksoftirqd/211:02:312
1308031991011,100cyclictest31-21ksoftirqd/209:05:012
1308031991011,100cyclictest31-21ksoftirqd/208:00:112
1308031991011,100cyclictest31-21ksoftirqd/207:51:312
1308031991011,100cyclictest1493390-21kworker/2:212:38:132
1308031991011,100cyclictest1493390-21kworker/2:212:33:512
1308031991011,100cyclictest1493390-21kworker/2:212:20:532
1308031991011,100cyclictest1493390-21kworker/2:212:07:432
1308031991011,100cyclictest1493390-21kworker/2:211:56:112
1308031991011,100cyclictest1493390-21kworker/2:211:40:052
1308031991011,100cyclictest1493390-21kworker/2:211:35:252
1308031991011,100cyclictest1493390-21kworker/2:211:33:092
1308031991011,100cyclictest1493390-21kworker/2:211:21:112
1308031991011,100cyclictest1493390-21kworker/2:211:06:312
1308031991011,100cyclictest1307913-21kworker/2:209:30:312
1308031991011,0cyclictest141rcu_preempt12:15:032
130803199101101,0cyclictest31-21ksoftirqd/208:42:032
130803199101101,0cyclictest0-21swapper/209:00:232
130803199101100,1cyclictest31-21ksoftirqd/207:30:572
130803199101100,1cyclictest1493390-21kworker/2:212:10:292
1308031991010,98cyclictest31-21ksoftirqd/210:43:232
1308031991010,101cyclictest1493390-21kworker/2:212:27:492
1308031991010,100cyclictest1426525-21kworker/2:010:05:312
1308031991010,100cyclictest1307913-21kworker/2:209:20:312
13080279910199,2cyclictest553-21snmpd08:13:151
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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