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2026-04-12 - 14:42

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #b, slot #8

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rackbslot8s (updated Sun Apr 12, 2026 00:44:16)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
496591991290,129cyclictest0-21swapper/222:05:492
4962632126112,9sleep40-21swapper/419:08:334
496150212393,10sleep30-21swapper/319:06:563
4962372119105,9sleep50-21swapper/519:08:095
4963432116101,10sleep10-21swapper/119:09:421
4961292116102,9sleep20-21swapper/219:06:382
496153211587,22sleep60-21swapper/619:06:586
4960692115100,10sleep70-21swapper/719:05:467
496250211095,10sleep00-21swapper/019:08:210
49659199107102,5cyclictest31-21ksoftirqd/223:08:202
49659199106101,5cyclictest31-21ksoftirqd/200:39:392
49659199105101,2cyclictest31-21ksoftirqd/221:55:062
49659199104100,4cyclictest31-21ksoftirqd/222:49:462
4965959910399,3cyclictest553-21snmpd22:09:473
4965919910399,4cyclictest31-21ksoftirqd/222:34:192
49659199103101,0cyclictest31-21ksoftirqd/223:42:062
4965979910298,3cyclictest553-21snmpd20:04:254
4965959910299,3cyclictest553-21snmpd21:34:333
4965959910299,3cyclictest553-21snmpd20:15:463
4965919910299,2cyclictest553-21snmpd23:34:552
4965919910298,0cyclictest141rcu_preempt23:52:132
49659199102101,1cyclictest141rcu_preempt21:27:322
49659199102100,2cyclictest141rcu_preempt23:21:152
4965809910299,2cyclictest13-21ksoftirqd/000:20:420
4966109910199,2cyclictest0-21swapper/720:06:417
496610991010,100cyclictest0-21swapper/721:55:297
4966059910199,2cyclictest553-21snmpd22:00:316
4966029910199,2cyclictest0-21swapper/523:20:315
496602991010,99cyclictest0-21swapper/519:25:505
4965979910199,2cyclictest553-21snmpd21:19:554
49659799101100,1cyclictest553-21snmpd22:53:424
496597991010,101cyclictest0-21swapper/421:51:504
496597991010,101cyclictest0-21swapper/421:51:494
496597991010,101cyclictest0-21swapper/419:45:334
4965959910199,1cyclictest605-21lldpd00:23:083
4965959910199,1cyclictest553-21snmpd20:07:163
4965959910198,3cyclictest553-21snmpd23:19:493
4965959910198,3cyclictest553-21snmpd19:21:353
4965959910198,3cyclictest553-21snmpd00:02:203
4965919910198,3cyclictest0-21swapper/219:20:102
49659199101100,1cyclictest31-21ksoftirqd/200:09:162
49659199101100,1cyclictest0-21swapper/222:17:422
49659199101100,0cyclictest141rcu_preempt21:52:502
49659199101100,0cyclictest141rcu_preempt21:52:502
496591991010,1cyclictest0-21swapper/200:00:222
496591991010,101cyclictest31-21ksoftirqd/223:45:492
496591991010,100cyclictest0-21swapper/222:35:152
496591991010,100cyclictest0-21swapper/200:17:512
4965869910199,2cyclictest553-21snmpd22:47:551
4965869910199,2cyclictest553-21snmpd22:03:081
49658699101100,1cyclictest553-21snmpd21:00:291
496586991010,100cyclictest0-21swapper/100:31:341
4965809910199,2cyclictest553-21snmpd22:46:000
496610991000,99cyclictest0-21swapper/723:22:257
496610991000,99cyclictest0-21swapper/722:35:067
496610991000,99cyclictest0-21swapper/722:14:217
496610991000,99cyclictest0-21swapper/721:13:507
496610991000,99cyclictest0-21swapper/719:40:197
496610991000,99cyclictest0-21swapper/719:36:547
496610991000,99cyclictest0-21swapper/719:25:267
496610991000,100cyclictest66-21ksoftirqd/722:01:167
496610991000,100cyclictest0-21swapper/723:18:507
496610991000,100cyclictest0-21swapper/723:06:437
496610991000,100cyclictest0-21swapper/722:06:497
496610991000,100cyclictest0-21swapper/700:26:077
4966059910099,1cyclictest553-21snmpd22:53:576
4966059910099,1cyclictest553-21snmpd22:48:546
4966059910099,1cyclictest553-21snmpd20:43:296
4966059910099,1cyclictest553-21snmpd00:14:396
4966059910099,1cyclictest0-21swapper/600:30:036
496605991000,99cyclictest0-21swapper/620:27:446
496605991000,99cyclictest0-21swapper/619:37:226
496605991000,100cyclictest0-21swapper/623:20:146
496605991000,100cyclictest0-21swapper/620:56:036
4966029910099,1cyclictest553-21snmpd23:48:205
4966029910099,1cyclictest553-21snmpd23:25:025
4966029910099,1cyclictest553-21snmpd23:06:015
496602991000,99cyclictest662730-21ssh22:43:005
496602991000,99cyclictest0-21swapper/523:30:235
496602991000,99cyclictest0-21swapper/520:50:395
4965979910099,1cyclictest553-21snmpd23:18:254
4965979910099,1cyclictest553-21snmpd21:57:584
4965979910099,1cyclictest553-21snmpd20:40:534
4965979910099,1cyclictest553-21snmpd20:37:324
4965979910099,1cyclictest553-21snmpd19:29:214
4965979910097,3cyclictest553-21snmpd21:10:154
496597991000,99cyclictest0-21swapper/420:21:144
496597991000,100cyclictest0-21swapper/423:04:374
4965959910099,1cyclictest553-21snmpd22:30:573
4965959910099,1cyclictest553-21snmpd19:40:103
4965919910099,1cyclictest553-21snmpd22:26:392
4965919910099,1cyclictest553-21snmpd20:24:382
4965919910099,1cyclictest531711-21cat20:15:152
4965919910099,0cyclictest141rcu_preempt00:11:132
496591991001,0cyclictest0-21swapper/219:55:172
49659199100100,0cyclictest31-21ksoftirqd/221:46:032
49659199100100,0cyclictest0-21swapper/222:50:212
49659199100100,0cyclictest0-21swapper/222:40:142
49659199100100,0cyclictest0-21swapper/221:38:312
49659199100100,0cyclictest0-21swapper/221:20:222
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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