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2026-03-05 - 21:43
[ 290.152] (II) VESA: driver for VESA chipsets: vesa

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #b, slot #8

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rackbslot8s (updated Thu Mar 05, 2026 12:44:18)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1261422124112,8sleep00-21swapper/007:05:390
1263622123109,9sleep70-21swapper/707:08:507
126385212193,23sleep30-21swapper/307:09:093
1261482120105,10sleep60-21swapper/607:05:456
1261912119105,9sleep40-21swapper/407:06:224
1262742118103,10sleep20-21swapper/207:07:322
1262392117103,9sleep50-21swapper/507:07:045
126401211586,9sleep10-21swapper/107:09:231
1266939910299,3cyclictest553-21snmpd11:13:266
126693991020,102cyclictest0-21swapper/611:20:146
126693991020,102cyclictest0-21swapper/608:50:146
126684991020,102cyclictest0-21swapper/412:10:124
1266769910299,3cyclictest553-21snmpd11:15:292
1266719910298,3cyclictest282768-21cut10:35:121
126697991010,101cyclictest0-21swapper/712:35:237
126697991010,101cyclictest0-21swapper/711:41:387
126697991010,101cyclictest0-21swapper/708:54:517
1266939910199,1cyclictest553-21snmpd11:50:156
1266939910198,3cyclictest553-21snmpd10:38:466
1266939910198,3cyclictest553-21snmpd10:01:476
126693991010,0cyclictest0-21swapper/608:06:006
126688991010,100cyclictest0-21swapper/507:33:305
1266849910198,0cyclictest553-21snmpd07:37:354
126684991010,100cyclictest0-21swapper/409:45:204
1266769910198,3cyclictest553-21snmpd12:33:432
126676991010,101cyclictest0-21swapper/210:15:142
126676991010,101cyclictest0-21swapper/210:10:592
126676991010,101cyclictest0-21swapper/210:09:452
126676991010,0cyclictest0-21swapper/207:10:412
1266719910199,2cyclictest553-21snmpd09:35:051
1266719910198,3cyclictest553-21snmpd07:21:301
126671991010,100cyclictest0-21swapper/112:31:071
126671991010,100cyclictest0-21swapper/109:05:181
126671991010,100cyclictest0-21swapper/107:44:191
126671991010,0cyclictest0-21swapper/111:42:571
1266679910199,2cyclictest553-21snmpd11:00:520
126667991010,100cyclictest0-21swapper/011:21:390
126667991010,100cyclictest0-21swapper/011:06:280
126667991010,100cyclictest0-21swapper/007:20:120
1266979910099,1cyclictest0-21swapper/708:14:407
126697991000,99cyclictest0-21swapper/711:03:437
126697991000,99cyclictest0-21swapper/710:55:557
126697991000,99cyclictest0-21swapper/710:05:357
126697991000,99cyclictest0-21swapper/707:20:477
126697991000,100cyclictest0-21swapper/709:00:477
126697991000,100cyclictest0-21swapper/708:23:267
1266939910099,1cyclictest553-21snmpd11:48:506
1266939910099,1cyclictest553-21snmpd09:55:586
1266939910099,1cyclictest553-21snmpd07:25:456
1266939910099,1cyclictest553-21snmpd07:12:526
1266939910099,1cyclictest153967-21cat08:00:146
126693991000,100cyclictest0-21swapper/609:15:166
1266889910099,1cyclictest553-21snmpd12:12:545
1266889910099,1cyclictest553-21snmpd10:37:045
1266889910099,1cyclictest553-21snmpd09:38:145
1266889910099,1cyclictest553-21snmpd08:38:185
1266889910099,1cyclictest553-21snmpd08:06:335
1266889910098,2cyclictest553-21snmpd11:26:125
126688991000,99cyclictest0-21swapper/507:16:505
126688991000,99cyclictest0-21swapper/507:13:345
126688991000,1cyclictest0-21swapper/512:39:585
126688991000,1cyclictest0-21swapper/512:19:045
1266849910099,1cyclictest553-21snmpd09:22:034
1266849910099,1cyclictest553-21snmpd09:03:554
126684991000,99cyclictest0-21swapper/409:41:204
126684991000,99cyclictest0-21swapper/408:11:324
126684991000,0cyclictest0-21swapper/409:35:024
1266809910099,1cyclictest553-21snmpd10:57:383
1266809910099,1cyclictest553-21snmpd09:00:543
1266809910099,1cyclictest553-21snmpd07:35:173
1266809910098,2cyclictest553-21snmpd11:54:553
1266769910099,1cyclictest553-21snmpd09:46:162
1266769910099,1cyclictest266637-21cat10:20:152
126676991000,99cyclictest0-21swapper/211:31:412
126676991000,100cyclictest0-21swapper/212:20:152
126676991000,100cyclictest0-21swapper/211:57:092
1266719910099,1cyclictest553-21snmpd09:50:231
1266719910099,1cyclictest553-21snmpd08:51:091
1266719910099,1cyclictest553-21snmpd08:04:371
1266719910099,1cyclictest553-21snmpd07:17:151
1266719910098,2cyclictest553-21snmpd12:28:161
1266719910098,2cyclictest553-21snmpd08:05:011
126671991000,99cyclictest0-21swapper/110:21:361
126671991000,100cyclictest0-21swapper/111:55:211
126671991000,100cyclictest0-21swapper/109:24:551
126671991000,100cyclictest0-21swapper/108:44:501
126671991000,0cyclictest0-21swapper/108:45:471
1266679910099,1cyclictest553-21snmpd08:23:370
1266679910099,1cyclictest553-21snmpd07:55:310
1266679910099,1cyclictest553-21snmpd07:50:120
1266679910099,1cyclictest141359-21cat07:35:140
1266679910098,2cyclictest553-21snmpd12:10:250
1266679910098,2cyclictest553-21snmpd11:27:500
1266679910098,1cyclictest553-21snmpd11:36:060
1266679910098,1cyclictest553-21snmpd08:25:380
1266679910097,2cyclictest553-21snmpd09:28:500
126667991000,100cyclictest0-21swapper/012:05:580
126667991000,100cyclictest0-21swapper/011:50:570
126667991000,100cyclictest0-21swapper/011:48:450
12669799990,99cyclictest0-21swapper/712:17:577
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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