You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2025-05-05 - 01:31

OSADL QA Farm on Real-time of Mainline Linux

About - Hardware - CPUs - Benchmarks - Graphics - Benchmarks - Kernels - Boards/Distros - Latency monitoring - Latency plots - System data - Profiles - Compare - Awards

Default latency plot of shadow in rack #b, slot #8

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
Special  All - All RT - Optimization - Ethernet - Thumbnails - Next
  
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackbslot8s (updated Sun May 04, 2025 12:44:17)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
190695999159159,0cyclictest0-21swapper/407:58:164
19066652130115,10sleep30-21swapper/307:09:183
19067022127112,9sleep20-21swapper/207:09:492
1906573212694,9sleep40-21swapper/407:07:594
19065792123110,8sleep10-21swapper/107:08:031
19064352123109,9sleep50-21swapper/507:05:595
19064192121107,9sleep70-21swapper/707:05:457
19066972120105,10sleep60-21swapper/607:09:456
19066622118105,9sleep00-21swapper/007:09:140
19069649910299,3cyclictest573-21snmpd07:45:065
1906970991010,99cyclictest0-21swapper/712:13:227
1906970991010,101cyclictest0-21swapper/709:05:117
1906970991010,100cyclictest0-21swapper/707:41:467
1906966991010,100cyclictest0-21swapper/610:57:466
1906966991010,100cyclictest0-21swapper/610:57:466
1906966991010,100cyclictest0-21swapper/609:33:306
19069649910199,2cyclictest573-21snmpd09:44:045
19069649910198,3cyclictest573-21snmpd08:45:425
1906964991010,99cyclictest0-21swapper/511:16:135
19069559910199,2cyclictest573-21snmpd12:18:403
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional