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2025-10-18 - 14:32

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #b, slot #8

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackbslot8s (updated Sat Oct 18, 2025 00:44:18)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
7988772162141,16sleep70-21swapper/719:05:467
7991252132106,21sleep30-21swapper/319:09:193
7991092132118,9sleep50-21swapper/519:09:055
7988762129114,10sleep60-21swapper/619:05:456
7991232124110,9sleep10-21swapper/119:09:171
7988522122107,10sleep40-21swapper/419:05:274
7990782120106,9sleep20-21swapper/219:08:382
7970582119104,10sleep00-21swapper/019:05:070
7994109910299,2cyclictest546-21snmpd22:53:523
7994069910299,3cyclictest546-21snmpd21:48:142
7994049910299,3cyclictest546-21snmpd21:45:261
799404991020,101cyclictest0-21swapper/123:58:571
799404991020,101cyclictest0-21swapper/123:58:571
799426991010,0cyclictest0-21swapper/722:30:137
799423991010,100cyclictest0-21swapper/622:45:406
799423991010,100cyclictest0-21swapper/600:19:076
799418991010,100cyclictest0-21swapper/522:49:315
799418991010,100cyclictest0-21swapper/520:10:295
799418991010,100cyclictest0-21swapper/520:08:235
799418991010,100cyclictest0-21swapper/519:21:335
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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