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2026-04-01 - 09:20

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #b, slot #8

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rackbslot8s (updated Wed Apr 01, 2026 00:44:18)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
5791612122107,9sleep60-21swapper/619:06:256
5791572122107,10sleep20-21swapper/219:06:212
579126212192,9sleep00-21swapper/019:05:550
5791152117102,9sleep70-21swapper/719:05:467
5791132117103,9sleep50-21swapper/519:05:455
5772972117102,10sleep10-21swapper/119:05:081
579129211499,10sleep30-21swapper/319:05:583
579222211297,10sleep40-21swapper/419:07:194
57965099105103,1cyclictest31-21ksoftirqd/223:07:312
57965099104103,1cyclictest31-21ksoftirqd/221:36:222
57965099104103,1cyclictest0-21swapper/220:15:162
579665991030,1cyclictest718549-21ssh22:18:476
5796659910299,3cyclictest553-21snmpd21:38:066
5796659910299,3cyclictest553-21snmpd21:15:386
5796659910299,3cyclictest553-21snmpd19:33:316
5796659910298,3cyclictest553-21snmpd21:01:296
57966599102100,2cyclictest553-21snmpd00:18:306
579665991020,100cyclictest0-21swapper/622:12:226
579665991020,0cyclictest0-21swapper/622:33:566
5796559910299,3cyclictest553-21snmpd23:37:503
57965099102100,2cyclictest31-21ksoftirqd/221:51:492
579650991020,100cyclictest0-21swapper/222:58:572
579669991010,99cyclictest0-21swapper/722:47:067
579669991010,101cyclictest0-21swapper/720:47:407
579669991010,0cyclictest0-21swapper/723:30:257
5796659910198,3cyclictest553-21snmpd21:56:376
579665991010,100cyclictest0-21swapper/623:40:266
579665991010,100cyclictest0-21swapper/620:25:286
579665991010,0cyclictest0-21swapper/623:50:136
579665991010,0cyclictest0-21swapper/622:36:206
5796619910199,2cyclictest553-21snmpd23:57:415
5796619910199,2cyclictest553-21snmpd00:33:145
5796619910199,2cyclictest553-21snmpd00:15:275
5796619910198,2cyclictest553-21snmpd23:33:265
579657991010,99cyclictest0-21swapper/400:36:584
579657991010,100cyclictest0-21swapper/421:44:014
5796559910199,2cyclictest553-21snmpd22:50:093
5796559910199,2cyclictest553-21snmpd19:57:443
5796559910199,2cyclictest553-21snmpd19:34:553
5796559910199,2cyclictest553-21snmpd00:13:033
5796509910199,2cyclictest717063-21ssh22:16:352
5796509910199,2cyclictest0-21swapper/223:20:072
5796509910199,1cyclictest0-21swapper/223:11:112
5796509910198,2cyclictest855484-21sh00:20:392
5796509910198,2cyclictest0-21swapper/200:37:012
57965099101100,0cyclictest580616-21hddtemp_smartct19:10:152
579650991010,99cyclictest611973-21grep20:10:132
579650991010,100cyclictest0-21swapper/220:27:152
5796419910199,1cyclictest553-21snmpd21:58:190
579669991000,99cyclictest0-21swapper/723:17:017
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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