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2025-09-18 - 12:08

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #b, slot #8

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rackbslot8s (updated Thu Sep 18, 2025 00:44:18)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
148682999161161,0cyclictest0-21swapper/020:54:230
14863232133102,10sleep50-21swapper/519:06:085
14862732131116,9sleep20-21swapper/219:05:252
1486512212998,9sleep40-21swapper/419:08:474
148685799126125,1cyclictest243-21kworker/7:122:04:227
14864582125112,8sleep60-21swapper/619:08:016
14865252121107,9sleep70-21swapper/719:08:597
14863792121107,9sleep10-21swapper/119:06:531
14864882120106,9sleep00-21swapper/019:08:280
14864372115101,9sleep30-21swapper/319:07:433
14868579910998,11cyclictest243-21kworker/7:123:30:127
14868579910494,10cyclictest243-21kworker/7:120:08:137
14868579910291,11cyclictest243-21kworker/7:123:41:347
14868579910291,11cyclictest243-21kworker/7:123:07:267
14868579910291,11cyclictest243-21kworker/7:121:32:507
14868579910291,11cyclictest243-21kworker/7:100:35:367
1486854991020,100cyclictest0-21swapper/622:05:166
14868509910299,3cyclictest546-21snmpd21:46:525
1486850991020,0cyclictest0-21swapper/522:32:025
14868479910299,3cyclictest546-21snmpd23:48:304
14868479910299,3cyclictest546-21snmpd20:41:204
1486847991020,100cyclictest0-21swapper/400:33:304
14868439910299,3cyclictest546-21snmpd00:20:293
14868579910199,1cyclictest243-21kworker/7:121:36:117
14868579910191,10cyclictest243-21kworker/7:123:49:227
14868579910190,11cyclictest243-21kworker/7:120:33:497
1486857991010,0cyclictest0-21swapper/721:11:067
14868549910199,2cyclictest546-21snmpd22:19:206
14868549910199,2cyclictest546-21snmpd21:05:386
1486854991010,100cyclictest0-21swapper/620:30:516
14868509910199,2cyclictest546-21snmpd23:18:115
14868509910199,2cyclictest546-21snmpd22:28:315
14868509910198,3cyclictest546-21snmpd22:35:235
1486850991010,101cyclictest0-21swapper/522:43:175
1486850991010,101cyclictest0-21swapper/522:22:535
14868479910199,2cyclictest546-21snmpd23:17:564
14868439910199,2cyclictest546-21snmpd23:04:303
14868439910199,2cyclictest546-21snmpd22:56:303
14868439910199,2cyclictest546-21snmpd22:24:073
14868439910199,2cyclictest546-21snmpd20:01:363
14868439910198,3cyclictest546-21snmpd20:34:553
14868439910198,3cyclictest546-21snmpd00:36:113
14868389910199,2cyclictest546-21snmpd00:14:312
1486838991010,100cyclictest0-21swapper/220:11:552
14868349910199,2cyclictest546-21snmpd20:31:341
14868349910199,2cyclictest546-21snmpd00:09:581
1486834991010,100cyclictest0-21swapper/121:56:341
14868579910099,1cyclictest243-21kworker/7:123:50:237
14868579910099,1cyclictest243-21kworker/7:123:36:227
14868579910099,1cyclictest243-21kworker/7:123:19:087
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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