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2026-04-13 - 16:09
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot2.osadl.org (updated Mon Apr 13, 2026 12:43:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3205327732,40sleep00-21swapper/007:04:440
3235927057,9sleep10-21swapper/107:07:561
259652670,0sleep025963-21seq09:24:270
229062650,0sleep022904-21seq10:04:290
32661993510,3cyclictest0-21swapper/109:19:241
3266199312,6cyclictest4056-21sed08:39:301
32661993110,6cyclictest0-21swapper/110:24:221
32661993110,4cyclictest0-21swapper/109:49:221
32660993110,20cyclictest0-21swapper/010:20:240
32661993010,4cyclictest0-21swapper/111:04:311
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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