You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2025-11-14 - 23:25
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot2.osadl.org (updated Fri Nov 14, 2025 12:43:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
520927157,9sleep10-21swapper/107:04:201
516126957,8sleep00-21swapper/007:03:480
104272620,0sleep00-21swapper/009:35:330
43722540,2sleep1563299cyclictest11:32:011
5631993410,4cyclictest0-21swapper/012:32:110
5632993325,3cyclictest0-21swapper/110:29:071
5632993010,19cyclictest0-21swapper/110:55:411
5631993028,1cyclictest0-21swapper/010:17:430
5631992725,1cyclictest23644-21cron09:16:440
545122724,1sleep10-21swapper/107:06:491
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional