You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-09-07 - 15:29
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot2.osadl.org (updated Mon Sep 07, 2026 00:43:24)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
268852820,1sleep00-21swapper/000:21:560
758527261,7sleep00-21swapper/019:04:570
68432690,0sleep00-21swapper/023:52:010
761726847,17sleep10-21swapper/119:05:161
8054993210,22cyclictest0-21swapper/000:17:540
8055993010,2cyclictest0-21swapper/122:41:141
8054993010,13cyclictest0-21swapper/019:28:110
8054993010,0cyclictest0-21swapper/021:44:400
8054992828,0cyclictest0-21swapper/022:45:240
805599270,10cyclictest0-21swapper/121:18:081
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional