You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-05-15 - 01:25
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot6.osadl.org (updated Thu May 14, 2026 12:46:45)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
254588399378376,1cyclictest2860903-21kworker/5:207:15:025
254587599377375,1cyclictest2594829-21kworker/4:209:01:024
254587599374372,1cyclictest2654984-21kworker/4:011:15:024
254587599374372,1cyclictest2654984-21kworker/4:011:15:024
254587599373371,1cyclictest2594829-21kworker/4:208:49:024
254588399372371,1cyclictest2860903-21kworker/5:208:21:025
254588399372371,1cyclictest2860903-21kworker/5:208:21:025
254587599371369,2cyclictest2654984-21kworker/4:011:25:024
254588399370369,1cyclictest2860903-21kworker/5:209:19:025
254588399370369,1cyclictest2860903-21kworker/5:208:27:025
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional