You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-09-16 - 05:41
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot6.osadl.org (updated Wed Sep 16, 2026 00:46:39)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
130380399354353,1cyclictest0-21swapper/121:43:021
130380399353352,1cyclictest1411457-21kworker/1:223:31:011
130380399353350,1cyclictest1411457-21kworker/1:223:55:011
130380399352351,1cyclictest1411457-21kworker/1:222:37:021
130380399351349,1cyclictest97550irq/166-enp0s3123:43:021
130380399350348,1cyclictest0-21swapper/122:56:021
130380399349348,1cyclictest0-21swapper/100:39:021
130380399349346,2cyclictest0-21swapper/121:25:021
130380399348347,1cyclictest97550irq/166-enp0s3121:39:021
130380399347345,2cyclictest97550irq/166-enp0s3123:19:021
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional