You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-04-04 - 13:45
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot6.osadl.org (updated Sat Apr 04, 2026 00:46:40)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
38822099359357,1cyclictest491456-21kworker/6:221:59:026
38819899353352,1cyclictest0-21swapper/321:41:023
38819899352350,2cyclictest0-21swapper/323:43:023
38819899352349,2cyclictest443157-21kworker/3:121:26:023
38819899351350,1cyclictest443157-21kworker/3:123:31:023
38819899351350,1cyclictest443157-21kworker/3:122:15:023
38819899350349,1cyclictest0-21swapper/322:37:023
38819899349348,1cyclictest0-21swapper/323:49:023
38819899349348,1cyclictest0-21swapper/323:04:023
38819899349348,1cyclictest0-21swapper/300:31:023
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional