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2025-11-25 - 10:47
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot6.osadl.org (updated Tue Nov 25, 2025 00:46:34)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
22607752136118,16sleep30-21swapper/319:05:163
22620882135117,16sleep60-21swapper/619:05:286
226099921080,10sleep549-21ksoftirqd/519:05:185
23641472870,0sleep40-21swapper/421:30:004
226304899872,55cyclictest0-21swapper/020:58:130
2263089998615,39cyclictest0-21swapper/523:53:135
25356182850,0sleep50-21swapper/523:45:145
2263097998315,37cyclictest0-21swapper/622:43:136
2263089998217,35cyclictest0-21swapper/522:08:135
25832612810,0sleep20-21swapper/200:24:212
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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