You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-06-18 - 01:43
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot6.osadl.org (updated Wed Jun 17, 2026 12:46:47)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
234896599382380,1cyclictest2376894-21kworker/0:209:55:020
2348965993810,380cyclictest0-21swapper/010:55:030
234897199379378,1cyclictest0-21swapper/109:51:021
234896599378376,1cyclictest2500095-21kworker/0:011:53:020
234896599378376,1cyclictest2500095-21kworker/0:011:53:020
234896599378376,1cyclictest2376894-21kworker/0:209:25:020
234897199377376,1cyclictest0-21swapper/112:19:021
234897199377376,1cyclictest0-21swapper/107:57:031
234896599377376,1cyclictest0-21swapper/007:19:020
234896599377375,1cyclictest2500095-21kworker/0:012:05:020
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional