You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-08-22 - 08:21
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot6.osadl.org (updated Sat Aug 22, 2026 00:46:40)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
68119199376375,1cyclictest0-21swapper/122:47:021
68122099364362,1cyclictest781882-21kworker/5:121:45:025
68122099363362,1cyclictest851603-21kworker/5:023:07:015
68123399361359,1cyclictest0-21swapper/723:43:017
68122099355353,1cyclictest851603-21kworker/5:023:23:025
68118399354352,1cyclictest672010-21kworker/0:121:23:010
68122099353352,1cyclictest0-21swapper/521:57:015
68122099353351,1cyclictest724122-21kworker/5:221:23:025
68122099353351,1cyclictest0-21swapper/521:10:015
68122099352350,1cyclictest851603-21kworker/5:023:47:015
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional