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2025-11-12 - 04:51
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackcslot6.osadl.org (updated Wed Nov 12, 2025 00:46:39)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
18052452137118,17sleep70-21swapper/719:05:177
21078312900,0sleep40-21swapper/400:08:494
1807270998818,40cyclictest0-21swapper/220:08:122
18165382860,2sleep442-21ksoftirqd/419:20:204
180700128543,13sleep00-21swapper/019:08:480
180559328443,13sleep10-21swapper/119:05:191
18044892840,4sleep3341rcuc/319:05:123
1807294998316,36cyclictest0-21swapper/523:23:125
1807294998316,35cyclictest0-21swapper/521:28:125
180695028342,12sleep60-21swapper/619:08:066
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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