You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-02-18 - 12:23
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rackcslot6.osadl.org (updated Wed Feb 18, 2026 00:46:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
80692799377376,1cyclictest837799-21kworker/6:021:51:026
80690699375374,1cyclictest0-21swapper/323:13:023
80690699374373,1cyclictest1020998-21kworker/3:223:37:023
80690699374372,1cyclictest0-21swapper/321:55:023
80690699374372,1cyclictest0-21swapper/321:43:023
80690699373372,1cyclictest1020998-21kworker/3:200:30:033
80690699372370,1cyclictest1020998-21kworker/3:223:17:023
80690699372370,1cyclictest0-21swapper/321:53:023
80690699371370,1cyclictest1020998-21kworker/3:223:51:023
80690699371370,1cyclictest0-21swapper/323:09:023
80690699371368,2cyclictest879928-21kworker/3:021:36:023
80690699370368,1cyclictest0-21swapper/300:22:023
80690699370368,1cyclictest0-21swapper/300:14:023
80690699369368,1cyclictest1020998-21kworker/3:223:21:033
80690699369368,1cyclictest0-21swapper/321:13:023
80690699369368,1cyclictest0-21swapper/300:07:023
80690699368367,1cyclictest0-21swapper/323:44:023
80690699368367,1cyclictest0-21swapper/322:33:023
80690699368367,1cyclictest0-21swapper/300:38:023
80690699367366,1cyclictest879928-21kworker/3:022:41:023
80690699367366,1cyclictest1020998-21kworker/3:200:25:023
80690699367365,1cyclictest0-21swapper/322:23:023
80690699366365,1cyclictest879928-21kworker/3:022:03:023
80690699366365,1cyclictest1020998-21kworker/3:223:25:023
80690699366365,1cyclictest0-21swapper/322:53:033
80690699366365,1cyclictest0-21swapper/322:39:023
80690699366365,1cyclictest0-21swapper/300:01:023
80690699366364,1cyclictest1091256-21kworker/3:119:25:023
80690699364363,1cyclictest1091256-21kworker/3:120:40:023
80690699364363,1cyclictest1091256-21kworker/3:119:35:023
80690699364363,1cyclictest1020998-21kworker/3:200:15:023
80690699364363,1cyclictest0-21swapper/321:29:023
80690699363361,1cyclictest0-21swapper/320:49:023
80690699363361,1cyclictest0-21swapper/320:49:023
80690699362361,1cyclictest867883-21kworker/3:221:03:023
80690699362361,1cyclictest1091256-21kworker/3:120:31:023
80690699362360,1cyclictest867883-21kworker/3:220:52:033
80690699361359,1cyclictest1091256-21kworker/3:120:19:033
80690699360359,1cyclictest1091256-21kworker/3:120:02:023
80690699360359,1cyclictest0-21swapper/320:29:023
80690699360358,1cyclictest1091256-21kworker/3:119:32:023
80690699359358,1cyclictest1091256-21kworker/3:119:12:023
80690699359358,1cyclictest1091256-21kworker/3:119:12:023
80690699359358,1cyclictest0-21swapper/319:57:023
80690699358357,1cyclictest1091256-21kworker/3:119:41:033
80693599354352,2cyclictest1026910-21kworker/7:023:13:027
80693599354352,1cyclictest0-21swapper/723:37:027
80693599352351,1cyclictest858861-21kworker/7:221:55:037
80693599352351,1cyclictest858861-21kworker/7:221:43:027
80693599352351,1cyclictest0-21swapper/700:30:027
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional