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2026-08-19 - 03:50
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Wed Aug 19, 2026 00:48:59)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
281239929094,3cyclictest151rcu_preempt22:40:153
281239929094,3cyclictest151rcu_preempt22:40:153
3273912510,242ptp4l0-21swapper/119:07:441
282299917914,120cyclictest0-21swapper/3123:54:5225
330891174165,6phc2sys0-21swapper/219:05:1712
2806399174174,0cyclictest141rcuc/021:18:330
280899916455,60cyclictest0-21swapper/423:15:1826
2817799163155,1cyclictest151rcu_preempt21:19:0217
266542162154,6sleep130-21swapper/1319:06:485
2806399155154,1cyclictest0-21swapper/022:21:260
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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