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2026-05-12 - 04:30
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Tue May 12, 2026 00:49:24)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3273913270,318ptp4l0-21swapper/119:07:061
219859917860,1cyclictest151rcu_preempt23:50:2330
219859917860,1cyclictest151rcu_preempt23:50:2330
220569916532,106cyclictest0-21swapper/2322:49:5516
220569916532,106cyclictest0-21swapper/2322:49:5416
220569916324,135cyclictest0-21swapper/2300:05:1716
220569916324,135cyclictest0-21swapper/2300:05:1716
220569915921,104cyclictest0-21swapper/2323:09:4116
220569915921,104cyclictest0-21swapper/2323:09:4116
220569915831,63cyclictest0-21swapper/2323:33:1016
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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