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2025-12-24 - 20:05
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Wed Dec 24, 2025 12:48:06)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
186469918832,93cyclictest0-21swapper/2607:50:1319
185749918619,129cyclictest0-21swapper/1708:00:139
184619917524,109cyclictest0-21swapper/208:30:4812
184619917524,109cyclictest0-21swapper/208:30:4712
330891165157,6phc2sys0-21swapper/207:06:0512
186299915230,64cyclictest0-21swapper/2407:40:2317
186539914937,111cyclictest0-21swapper/2711:55:2620
18461991440,86cyclictest0-21swapper/207:20:2712
18461991420,84cyclictest0-21swapper/208:37:5512
18461991420,84cyclictest0-21swapper/208:37:5412
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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