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2025-10-29 - 17:43
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Wed Oct 29, 2025 12:50:09)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
86159927174,1cyclictest151rcu_preempt09:39:1530
86249927074,1cyclictest151rcu_preempt11:24:1631
2482912130,204ptp4l0-21swapper/107:08:381
86159918574,1cyclictest151rcu_preempt11:42:3530
87109918120,131cyclictest0-21swapper/2111:48:1314
87109918120,131cyclictest0-21swapper/2111:48:1314
87109918120,122cyclictest0-21swapper/2109:50:0214
87109918020,107cyclictest0-21swapper/2109:36:1314
87109916820,92cyclictest0-21swapper/2111:01:1114
87109916420,87cyclictest0-21swapper/2110:25:2414
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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