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2026-07-29 - 06:40
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Wed Jul 29, 2026 00:49:01)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3180399354157,2cyclictest151rcu_preempt23:02:2621
3273912330,225ptp4l0-21swapper/119:06:361
3273912330,225ptp4l0-21swapper/119:06:361
270252166158,6sleep240-21swapper/2419:05:1317
270252166158,6sleep240-21swapper/2419:05:1317
316909916561,53cyclictest151rcu_preempt00:08:515
316909916561,53cyclictest151rcu_preempt00:08:515
31690991650,163cyclictest151rcu_preempt21:02:195
315979916449,86cyclictest0-21swapper/122:42:041
31690991633,156cyclictest151rcu_preempt21:14:045
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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