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2026-05-05 - 13:19
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Tue May 05, 2026 00:49:13)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
108499927379,1cyclictest151rcu_preempt22:35:1618
3273912710,263ptp4l0-21swapper/119:07:271
330891242234,6phc2sys0-21swapper/219:09:5012
107419921918,4cyclictest151rcu_preempt22:40:430
108569917429,144cyclictest0-21swapper/2722:42:1420
108569916315,136cyclictest0-21swapper/2721:10:0220
108569916133,73cyclictest0-21swapper/2722:20:2420
108569915933,94cyclictest0-21swapper/2723:55:1220
108569915933,94cyclictest0-21swapper/2723:55:1220
108129915363,28cyclictest151rcu_preempt23:15:178
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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