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2026-07-04 - 10:51
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Sat Jul 04, 2026 00:48:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3273913050,298ptp4l0-21swapper/119:06:231
3273913050,298ptp4l0-21swapper/119:06:221
152752260253,6sleep180-21swapper/1819:07:5610
152752260253,6sleep180-21swapper/1819:07:5510
168359921113,2cyclictest151rcu_preempt22:22:1110
167219916833,134cyclictest0-21swapper/223:15:2212
16781991627,48cyclictest0-21swapper/1100:05:123
167679916129,131cyclictest0-21swapper/923:50:1231
1687499159157,1cyclictest151rcu_preempt23:49:5516
167679915929,80cyclictest0-21swapper/919:20:2031
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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