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2026-06-03 - 21:56
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Wed Jun 03, 2026 12:49:19)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
19429929092,2cyclictest151rcu_preempt11:23:402
20519921629,122cyclictest0-21swapper/3107:35:1825
3273912070,202ptp4l0-21swapper/107:08:071
1991991750,135cyclictest0-21swapper/2210:49:3015
19859916556,40cyclictest0-21swapper/2112:20:3114
19499916232,90cyclictest0-21swapper/1210:37:484
19499916232,129cyclictest0-21swapper/1207:57:294
19429915893,1cyclictest151rcu_preempt09:45:222
19429915893,1cyclictest151rcu_preempt09:45:222
20519915739,90cyclictest0-21swapper/3110:13:5925
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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