You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-05-22 - 17:32
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Fri May 22, 2026 00:49:28)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3273912850,278ptp4l0-21swapper/119:07:061
254459926165,2cyclictest151rcu_preempt23:44:3828
240632210203,6sleep170-21swapper/1719:08:179
254129917842,96cyclictest0-21swapper/023:30:580
254129917841,136cyclictest0-21swapper/022:42:360
254129917841,136cyclictest0-21swapper/022:42:350
254129916836,83cyclictest0-21swapper/021:30:440
254129916833,100cyclictest0-21swapper/023:12:010
255219916749,66cyclictest0-21swapper/2420:45:1117
254129916530,81cyclictest0-21swapper/022:56:470
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional