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2026-09-21 - 17:19
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Mon Sep 21, 2026 12:49:19)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3273912700,258ptp4l0-21swapper/107:05:231
3273912700,258ptp4l0-21swapper/107:05:231
300629919725,112cyclictest0-21swapper/1709:44:319
300479917629,138cyclictest0-21swapper/1408:50:136
300479916822,121cyclictest0-21swapper/1409:40:196
29983991675,118cyclictest0-21swapper/011:17:030
29983991675,118cyclictest0-21swapper/011:17:030
29983991645,158cyclictest0-21swapper/011:20:170
29983991645,158cyclictest0-21swapper/011:20:170
29983991635,99cyclictest0-21swapper/010:20:260
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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