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2025-08-21 - 21:26
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Thu Aug 21, 2025 12:49:16)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1979299322143,1cyclictest151rcu_preempt09:12:0721
2482912970,289ptp4l0-21swapper/107:09:471
197399919432,85cyclictest0-21swapper/2110:15:5014
329891181169,10phc2sys0-21swapper/207:05:1212
196529917274,62cyclictest30435-21idleruntime-cro08:10:0128
196529917274,62cyclictest30435-21idleruntime-cro08:10:0128
197719915724,129cyclictest0-21swapper/2510:32:2818
197129915718,87cyclictest0-21swapper/1711:59:269
197129915717,89cyclictest0-21swapper/1710:55:139
197129915617,89cyclictest0-21swapper/1712:10:089
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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