You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-07-22 - 17:44
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Wed Jul 22, 2026 12:49:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2278099325128,31cyclictest151rcu_preempt10:47:4917
2278099325128,31cyclictest151rcu_preempt10:47:4917
3273912970,288ptp4l0-21swapper/107:07:101
210922216209,6sleep70-21swapper/707:05:4229
330891200192,6phc2sys0-21swapper/207:06:1312
226689917612,144cyclictest0-21swapper/909:52:4331
226689917612,144cyclictest0-21swapper/909:52:4331
226989915958,98cyclictest0-21swapper/1312:30:145
226689915812,98cyclictest0-21swapper/912:07:5631
226689915312,98cyclictest0-21swapper/907:10:1631
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional