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2026-06-06 - 23:08
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Sat Jun 06, 2026 00:49:37)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3273912680,260ptp4l0-21swapper/119:06:521
183862209200,7sleep270-21swapper/2719:05:2220
210129919717,1cyclictest151rcu_preempt22:24:5518
330891195185,7phc2sys0-21swapper/219:05:2212
209649918325,95cyclictest0-21swapper/1321:38:145
209649918325,95cyclictest0-21swapper/1321:38:135
20947991827,170cyclictest0-21swapper/921:05:0131
20947991817,145cyclictest0-21swapper/922:50:1831
208909918137,143cyclictest0-21swapper/022:18:000
208909917633,109cyclictest0-21swapper/000:16:290
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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