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2026-01-11 - 19:04
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Sun Jan 11, 2026 12:48:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
4354991993,191cyclictest0-21swapper/2307:15:1516
42819919114,173cyclictest0-21swapper/1112:40:003
42819918014,113cyclictest0-21swapper/1110:44:343
42819918014,113cyclictest0-21swapper/1110:44:343
4350991790,164cyclictest0-21swapper/2207:50:0115
4316991680,160cyclictest0-21swapper/1609:55:578
4316991680,160cyclictest0-21swapper/1609:55:578
43069916632,101cyclictest0-21swapper/1408:09:386
330891166158,6phc2sys0-21swapper/207:05:2612
43069916432,131cyclictest0-21swapper/1410:00:166
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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