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2026-08-06 - 22:28
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Thu Aug 06, 2026 12:49:08)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
309159921931,137cyclictest0-21swapper/1410:53:226
309159921931,137cyclictest0-21swapper/1410:53:216
3273912120,204ptp4l0-21swapper/107:06:301
308159918023,154cyclictest0-21swapper/011:35:100
308159918023,154cyclictest0-21swapper/011:35:100
308159917327,103cyclictest0-21swapper/012:15:150
308159917321,149cyclictest0-21swapper/010:05:220
308159916826,32cyclictest0-21swapper/007:10:020
308159916821,114cyclictest0-21swapper/009:35:240
30815991649,151cyclictest0-21swapper/009:45:180
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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