You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-03-31 - 09:06
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Tue Mar 31, 2026 00:49:30)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3273913130,305ptp4l0-21swapper/119:07:161
308012209202,6sleep280-21swapper/2819:09:1121
3221399189137,36cyclictest0-21swapper/2622:22:1919
321859918222,147cyclictest0-21swapper/2219:40:1915
321859918222,147cyclictest0-21swapper/2219:40:1815
321859917822,52cyclictest0-21swapper/2219:46:1215
321859917822,52cyclictest0-21swapper/2219:46:1215
32185991709,130cyclictest151rcu_preempt23:05:3215
296022168160,6sleep240-21swapper/2419:05:2317
32193991660,164cyclictest0-21swapper/2322:48:2716
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional