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2025-12-23 - 11:53
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Tue Dec 23, 2025 00:47:53)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
330891199189,7phc2sys0-21swapper/219:05:2212
267849918843,79cyclictest0-21swapper/2021:45:1513
26844991656,125cyclictest0-21swapper/2821:20:1321
26844991646,117cyclictest0-21swapper/2820:37:3321
2675599152104,10cyclictest0-21swapper/1620:03:088
2675599152104,10cyclictest0-21swapper/1620:03:088
26767991500,85cyclictest0-21swapper/1819:56:5710
26767991500,85cyclictest0-21swapper/1819:56:5710
26755991500,93cyclictest0-21swapper/1620:49:058
26716991500,87cyclictest0-21swapper/1100:03:083
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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