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2026-04-10 - 14:00
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Fri Apr 10, 2026 00:49:22)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3273912580,250ptp4l0-21swapper/119:09:001
237259921439,3cyclictest151rcu_preempt22:34:5823
237259921439,3cyclictest151rcu_preempt22:34:5723
224102210203,6sleep70-21swapper/719:09:1629
237669918018,109cyclictest0-21swapper/1220:20:174
238259916330,106cyclictest0-21swapper/2721:35:1420
238259916330,106cyclictest0-21swapper/2721:35:1320
23793991582,105cyclictest0-21swapper/1922:47:4611
23793991552,116cyclictest0-21swapper/1921:48:2611
23793991552,116cyclictest0-21swapper/1921:48:2611
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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