You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-03-17 - 16:03
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Tue Mar 17, 2026 12:49:13)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3273913120,304ptp4l0-21swapper/107:06:541
254089922629,1cyclictest151rcu_preempt12:27:1622
25417991742,129cyclictest0-21swapper/3109:30:2225
25417991722,169cyclictest0-21swapper/3107:40:1825
253429916825,138cyclictest0-21swapper/1311:06:365
253429916825,138cyclictest0-21swapper/1311:06:365
253429916711,147cyclictest0-21swapper/1311:31:225
25417991652,123cyclictest0-21swapper/3110:23:1825
25417991652,123cyclictest0-21swapper/3110:23:1825
25417991542,108cyclictest0-21swapper/3111:17:1625
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional