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2026-03-24 - 16:45
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Tue Mar 24, 2026 12:48:54)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
83809941029,183cyclictest151rcu_preempt10:15:1514
826099365166,3cyclictest46-21ksoftirqd/510:14:4427
842899309113,4cyclictest151rcu_preempt09:21:0720
330891283275,6phc2sys0-21swapper/207:08:3712
330891283275,6phc2sys0-21swapper/207:08:3612
3273912070,199ptp4l0-21swapper/107:09:451
3273912070,199ptp4l0-21swapper/107:09:451
82689918333,108cyclictest0-21swapper/611:36:0028
82829916533,71cyclictest0-21swapper/809:55:2130
67612159150,7sleep290-21swapper/2907:05:4322
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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