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2025-11-29 - 17:13
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Sat Nov 29, 2025 12:49:38)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2034399346148,1cyclictest151rcu_preempt09:36:0621
2482912950,287ptp4l0-21swapper/107:06:061
179012221213,6sleep290-21swapper/2907:05:2422
202029916832,81cyclictest0-21swapper/207:10:0012
201919916850,68cyclictest0-21swapper/010:34:420
201919916850,68cyclictest0-21swapper/010:34:420
201919916332,129cyclictest0-21swapper/010:11:090
203469916231,81cyclictest0-21swapper/2909:55:3422
201919916153,57cyclictest13-21ksoftirqd/011:14:310
201919916153,57cyclictest13-21ksoftirqd/011:14:310
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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