You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-04-17 - 12:05
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Fri Apr 17, 2026 00:49:21)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
654299360164,1cyclictest151rcu_preempt21:35:2413
654299360164,1cyclictest151rcu_preempt21:35:2413
3273913220,314ptp4l0-21swapper/119:07:251
641099231120,1cyclictest151rcu_preempt22:27:590
64109919930,90cyclictest0-21swapper/023:10:160
330891173165,6phc2sys0-21swapper/219:05:2712
66109915434,119cyclictest0-21swapper/3000:25:1024
66109915434,110cyclictest0-21swapper/3021:49:0824
66109915434,110cyclictest0-21swapper/3021:49:0724
659399149112,22cyclictest0-21swapper/2721:43:4420
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional