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2026-07-16 - 14:37
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Thu Jul 16, 2026 00:49:18)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3273912120,204ptp4l0-21swapper/119:08:451
330891201191,7phc2sys0-21swapper/219:05:2712
227219919318,56cyclictest151rcu_preempt21:35:175
2270099167166,0cyclictest76-21ksoftirqd/1022:23:522
2270099167166,0cyclictest76-21ksoftirqd/1022:23:522
2274099164106,58cyclictest125-21ksoftirqd/1821:33:4610
2274099164106,58cyclictest125-21ksoftirqd/1821:33:4610
227289915927,92cyclictest0-21swapper/1523:04:037
226549915635,120cyclictest0-21swapper/200:23:4612
227289915430,74cyclictest0-21swapper/1523:36:077
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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