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2025-12-20 - 04:58
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Sat Dec 20, 2025 00:48:12)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
206059919911,123cyclictest0-21swapper/1800:30:2210
206999914531,73cyclictest0-21swapper/3022:25:0124
20585991440,86cyclictest0-21swapper/1521:25:277
20585991440,86cyclictest0-21swapper/1521:25:277
206999914328,114cyclictest0-21swapper/3023:40:1524
206749914255,59cyclictest0-21swapper/2722:26:2320
20632991420,89cyclictest0-21swapper/2119:10:2314
205939914218,96cyclictest151rcu_preempt19:50:128
206829913951,86cyclictest0-21swapper/2823:15:0021
206749913329,61cyclictest0-21swapper/2722:30:1820
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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