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2026-07-13 - 13:07
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Mon Jul 13, 2026 00:49:18)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3273912870,277ptp4l0-21swapper/119:06:081
1356599242144,1cyclictest151rcu_preempt21:12:4213
134739921133,3cyclictest151rcu_preempt00:10:3230
134739921026,4cyclictest151rcu_preempt00:00:3430
13581991780,175cyclictest151rcu_preempt23:51:0915
135729917026,62cyclictest0-21swapper/2121:30:0014
135989916246,64cyclictest0-21swapper/2423:05:3217
136459916127,133cyclictest0-21swapper/3022:10:1524
136459915927,95cyclictest0-21swapper/3021:25:2224
136459915825,93cyclictest0-21swapper/3020:06:3524
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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