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2025-11-12 - 17:19
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Wed Nov 12, 2025 12:49:29)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
244672274264,7sleep130-21swapper/1307:05:185
2482912730,265ptp4l0-21swapper/107:09:321
280639925840,21cyclictest151rcu_preempt10:22:580
248252235226,6sleep140-21swapper/1407:05:206
280879921921,129cyclictest151rcu_preempt11:42:3730
28091991973,8cyclictest151rcu_preempt11:57:1531
280959918319,108cyclictest0-21swapper/1009:00:242
280959918319,108cyclictest0-21swapper/1009:00:232
281469917818,117cyclictest0-21swapper/2409:15:2217
281469917818,117cyclictest0-21swapper/2409:15:2217
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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