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2026-05-19 - 16:53
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Tue May 19, 2026 12:48:58)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
159909929295,1cyclictest151rcu_preempt11:03:251
3273912490,241ptp4l0-21swapper/107:09:251
3273912490,241ptp4l0-21swapper/107:09:241
160269918424,121cyclictest0-21swapper/611:05:2328
160509916431,128cyclictest151rcu_preempt09:32:2631
160429916387,75cyclictest64-21ksoftirqd/809:42:0530
160139915826,88cyclictest0-21swapper/411:31:2026
160139915720,136cyclictest0-21swapper/411:29:3626
160139915624,94cyclictest0-21swapper/408:40:1726
160139915624,93cyclictest0-21swapper/408:23:0526
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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