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2026-05-02 - 11:53
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Sat May 02, 2026 00:48:47)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
330891387379,6phc2sys0-21swapper/219:05:2012
82209922023,1cyclictest151rcu_preempt23:40:560
83629921921,1cyclictest151rcu_preempt23:55:5813
3273912190,206ptp4l0-21swapper/119:05:211
83479918419,137cyclictest0-21swapper/1723:55:029
83479918418,143cyclictest0-21swapper/1721:55:189
83479918318,164cyclictest0-21swapper/1719:40:389
83479918318,164cyclictest0-21swapper/1719:40:389
83479918018,129cyclictest0-21swapper/1700:39:559
83479917918,118cyclictest0-21swapper/1723:17:229
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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