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2026-08-25 - 04:50
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Tue Aug 25, 2026 00:49:20)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
176392291284,6sleep130-21swapper/1319:05:115
176392291284,6sleep130-21swapper/1319:05:115
237359927779,2cyclictest151rcu_preempt21:49:3814
202842247237,7sleep200-21swapper/2019:05:1813
202842247237,7sleep200-21swapper/2019:05:1813
3273911780,169ptp4l0-21swapper/119:08:041
3273911780,169ptp4l0-21swapper/119:08:031
237409917123,103cyclictest0-21swapper/2223:29:3415
237409917123,103cyclictest0-21swapper/2223:29:3415
237739917020,114cyclictest151rcu_preempt20:35:4824
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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