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2026-03-21 - 16:24
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Sat Mar 21, 2026 12:49:09)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
956499308110,1cyclictest151rcu_preempt11:06:0426
3273912700,262ptp4l0-21swapper/107:06:201
967799242134,1cyclictest151rcu_preempt10:05:0120
964999223114,1cyclictest151rcu_preempt12:10:3114
36712192184,5sleep250-21swapper/2507:05:1118
95649916843,66cyclictest0-21swapper/408:30:0026
95989914913,129cyclictest0-21swapper/909:34:3231
96629914811,131cyclictest151rcu_preempt11:33:3117
95989914813,134cyclictest0-21swapper/910:37:5231
95989914613,112cyclictest0-21swapper/911:49:0431
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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