You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-05-25 - 20:49
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Mon May 25, 2026 12:49:26)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3273911930,185ptp4l0-21swapper/107:06:221
330891183175,6phc2sys0-21swapper/207:05:2712
232002180172,6sleep150-21swapper/1507:05:197
258439916717,149cyclictest0-21swapper/1811:25:2010
258349916734,118cyclictest0-21swapper/1711:41:539
258439916617,139cyclictest0-21swapper/1809:55:0110
258439916617,139cyclictest0-21swapper/1809:55:0110
258349916633,107cyclictest0-21swapper/1711:23:439
258439916417,86cyclictest0-21swapper/1809:35:4410
258439916417,146cyclictest0-21swapper/1812:06:3010
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional