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2026-09-15 - 14:27
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Tue Sep 15, 2026 00:49:35)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
303539924042,1cyclictest151rcu_preempt21:37:1018
3273911870,179ptp4l0-21swapper/119:06:141
274032170162,6sleep210-21swapper/2119:05:2114
302389916729,88cyclictest0-21swapper/300:16:0523
302889916542,78cyclictest0-21swapper/1200:27:124
302389916230,99cyclictest0-21swapper/319:45:2323
302389916230,99cyclictest0-21swapper/319:45:2223
302389916133,94cyclictest0-21swapper/322:44:5623
302389915933,92cyclictest0-21swapper/323:59:1423
303309915423,124cyclictest151rcu_preempt22:11:2913
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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