You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2025-12-18 - 14:48
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Thu Dec 18, 2025 12:47:58)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
330891283274,6phc2sys0-21swapper/207:05:1412
293409916982,31cyclictest11854-21latency_hist09:05:004
294399916631,134cyclictest0-21swapper/2709:50:2420
294669915831,87cyclictest0-21swapper/3007:10:1424
294669915831,87cyclictest0-21swapper/3007:10:1324
279132156149,6sleep70-21swapper/707:06:3729
29398991430,84cyclictest0-21swapper/2207:50:2415
29398991430,84cyclictest0-21swapper/2207:50:2415
293629914230,68cyclictest0-21swapper/1712:22:169
293629914052,60cyclictest0-21swapper/1710:33:479
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional