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2025-05-09 - 05:30
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Fri May 09, 2025 00:49:25)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2482912990,291ptp4l0-21swapper/119:07:581
2482912990,291ptp4l0-21swapper/119:07:581
13115992630,261cyclictest0-21swapper/2823:30:1721
329891196188,6phc2sys0-21swapper/219:07:0112
329891196188,6phc2sys0-21swapper/219:07:0112
130849915735,101cyclictest0-21swapper/2423:18:4417
131019915619,134cyclictest0-21swapper/2621:20:2219
130849915436,62cyclictest0-21swapper/2423:55:2117
130849915229,90cyclictest0-21swapper/2423:35:1817
12985991510,71cyclictest0-21swapper/623:05:1628
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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