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2026-06-22 - 04:11
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Mon Jun 22, 2026 00:49:39)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3273913070,299ptp4l0-21swapper/119:05:371
3273913070,299ptp4l0-21swapper/119:05:371
402699286124,1cyclictest151rcu_preempt22:05:5524
39169921422,155cyclictest0-21swapper/520:40:4427
39449920636,78cyclictest88-21ksoftirqd/1222:04:214
39169918022,129cyclictest0-21swapper/523:50:0327
39169918022,129cyclictest0-21swapper/523:50:0227
39169917522,151cyclictest0-21swapper/522:44:3227
39109917529,68cyclictest0-21swapper/423:59:4026
39109917529,68cyclictest0-21swapper/423:59:3926
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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