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2026-06-16 - 03:01
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Mon Jun 15, 2026 00:49:18)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
219949928494,3cyclictest151rcu_preempt21:14:334
3273912310,223ptp4l0-21swapper/119:07:191
220089917821,121cyclictest0-21swapper/1421:58:026
220089917721,101cyclictest0-21swapper/1421:20:056
219769916719,147cyclictest0-21swapper/919:15:2231
219769916519,93cyclictest0-21swapper/922:32:1031
219769916519,93cyclictest0-21swapper/922:32:1031
220089916221,91cyclictest0-21swapper/1420:22:256
220089916121,89cyclictest0-21swapper/1400:35:146
220089915811,138cyclictest0-21swapper/1419:59:456
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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