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2026-08-31 - 07:07
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Mon Aug 31, 2026 00:49:10)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
309789929193,1cyclictest151rcu_preempt22:59:0511
3273912680,261ptp4l0-21swapper/119:05:331
295062232225,6sleep180-21swapper/1819:07:2610
309119917229,142cyclictest0-21swapper/700:26:3229
309119917129,91cyclictest0-21swapper/721:14:5429
309119916225,92cyclictest0-21swapper/723:29:5229
310019915751,79cyclictest0-21swapper/2523:20:0118
310019915234,117cyclictest167-21ksoftirqd/2522:50:0518
308869915126,60cyclictest0-21swapper/422:45:1326
30859991503,90cyclictest0-21swapper/021:59:440
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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