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2026-07-01 - 09:32
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Wed Jul 01, 2026 00:49:51)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3273913140,300ptp4l0-21swapper/119:05:121
2655499299101,1cyclictest151rcu_preempt21:10:193
265319922528,1cyclictest151rcu_preempt21:11:0930
26506991790,66cyclictest0-21swapper/522:06:0527
265069916346,91cyclictest0-21swapper/523:13:5327
266529915068,81cyclictest161-21ksoftirqd/2421:11:2617
330891144137,4phc2sys0-21swapper/219:05:1912
265069914432,92cyclictest0-21swapper/522:28:4727
265069914126,108cyclictest0-21swapper/523:34:0027
265069914126,108cyclictest0-21swapper/523:34:0027
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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