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2026-09-06 - 08:35
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackcslot8.osadl.org (updated Sun Sep 06, 2026 00:49:25)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3273913110,304ptp4l0-21swapper/119:06:371
270639920711,2cyclictest151rcu_preempt22:35:0616
269919918111,150cyclictest0-21swapper/1321:50:195
269819918153,84cyclictest0-21swapper/1122:34:523
270819917832,129cyclictest0-21swapper/2522:41:0018
269149917133,102cyclictest0-21swapper/123:58:051
269919916811,156cyclictest0-21swapper/1319:35:225
269919916811,156cyclictest0-21swapper/1319:35:225
269149916833,102cyclictest0-21swapper/100:25:211
269149916833,102cyclictest0-21swapper/100:25:211
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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