You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-03-08 - 07:15
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rackcslot8.osadl.org (updated Sun Mar 08, 2026 00:49:10)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1960199380183,1cyclictest151rcu_preempt23:55:1913
170872291281,7sleep70-21swapper/719:05:2329
3273912770,265ptp4l0-21swapper/119:05:161
1953799265127,1cyclictest151rcu_preempt22:00:144
1953799265127,1cyclictest151rcu_preempt22:00:144
330891236228,6phc2sys0-21swapper/219:05:2312
1961199220116,1cyclictest151rcu_preempt21:36:3414
1961199220116,1cyclictest151rcu_preempt21:36:3314
19601991460,87cyclictest0-21swapper/2023:25:2313
19654991450,86cyclictest0-21swapper/3019:50:2224
196239914511,131cyclictest95841/usr/sbin/munin21:10:2416
19654991420,85cyclictest0-21swapper/3021:50:5524
19654991420,85cyclictest0-21swapper/3021:50:5424
19584991410,81cyclictest0-21swapper/1823:52:1510
19584991381,85cyclictest0-21swapper/1821:51:2910
19584991381,85cyclictest0-21swapper/1821:51:2810
195699913814,62cyclictest0-21swapper/1620:25:118
19654991360,82cyclictest0-21swapper/3023:45:4124
19654991360,82cyclictest0-21swapper/3020:05:1924
196549913529,64cyclictest0-21swapper/3019:18:3424
19654991350,79cyclictest0-21swapper/3000:26:0624
196199913553,52cyclictest0-21swapper/2222:31:3715
195849913529,68cyclictest0-21swapper/1820:58:3410
195699913517,117cyclictest0-21swapper/1621:11:598
195699913514,79cyclictest0-21swapper/1621:42:428
195699913514,79cyclictest0-21swapper/1621:42:418
196549913417,70cyclictest0-21swapper/3022:28:3324
196549913417,70cyclictest0-21swapper/3022:28:3324
195849913442,54cyclictest0-21swapper/1822:08:3510
195849913442,54cyclictest0-21swapper/1822:08:3410
195699913414,79cyclictest0-21swapper/1622:34:458
195699913414,119cyclictest0-21swapper/1623:07:408
195699913414,118cyclictest0-21swapper/1620:20:248
195699913413,120cyclictest0-21swapper/1619:40:198
196549913330,64cyclictest0-21swapper/3020:35:1524
196549913329,63cyclictest0-21swapper/3021:13:5924
1959399133129,3cyclictest151rcu_preempt22:39:3511
195849913347,56cyclictest0-21swapper/1800:35:3310
19584991330,79cyclictest0-21swapper/1822:27:1710
19584991330,79cyclictest0-21swapper/1822:27:1610
19584991330,77cyclictest0-21swapper/1822:50:1510
195699913314,91cyclictest0-21swapper/1600:15:178
195699913314,69cyclictest0-21swapper/1623:37:168
196549913232,72cyclictest0-21swapper/3022:57:5624
196549913228,63cyclictest0-21swapper/3021:00:2124
196549913223,70cyclictest0-21swapper/3020:01:0324
196239913225,106cyclictest0-21swapper/2319:37:1816
196019913244,54cyclictest0-21swapper/2022:11:3613
196019913244,54cyclictest0-21swapper/2022:11:3513
19584991320,73cyclictest0-21swapper/1819:47:3010
19654991310,79cyclictest0-21swapper/3021:15:1924
19654991310,77cyclictest0-21swapper/3000:20:1624
19651991313,99cyclictest0-21swapper/2921:16:2322
196199913140,60cyclictest0-21swapper/2221:36:0215
196199913140,60cyclictest0-21swapper/2221:36:0215
196199913127,67cyclictest0-21swapper/2223:51:4815
196199913126,70cyclictest0-21swapper/2223:23:2815
196019913147,58cyclictest0-21swapper/2020:00:1813
195849913129,72cyclictest0-21swapper/1800:27:3210
195699913114,68cyclictest0-21swapper/1600:20:238
195589913125,68cyclictest0-21swapper/1523:38:227
19654991300,76cyclictest0-21swapper/3000:32:0124
19651991303,106cyclictest0-21swapper/2922:03:5722
19651991303,106cyclictest0-21swapper/2922:03:5622
196199913029,68cyclictest0-21swapper/2200:20:3915
196199913029,66cyclictest0-21swapper/2222:25:1315
196199913029,66cyclictest0-21swapper/2222:25:1215
196199913028,67cyclictest0-21swapper/2223:45:2215
196199913028,65cyclictest0-21swapper/2221:54:4515
196199913028,65cyclictest0-21swapper/2221:54:4415
196199913027,68cyclictest0-21swapper/2223:15:2615
196199913026,62cyclictest0-21swapper/2223:28:1615
196199913026,62cyclictest0-21swapper/2221:15:2815
195849913030,71cyclictest0-21swapper/1821:29:3410
195849913030,70cyclictest0-21swapper/1800:35:0110
195849913029,69cyclictest0-21swapper/1821:35:2610
195849913029,69cyclictest0-21swapper/1821:35:2510
195849913028,68cyclictest0-21swapper/1823:43:0910
195849913028,67cyclictest0-21swapper/1822:02:5710
195849913028,67cyclictest0-21swapper/1822:02:5610
195849913028,64cyclictest0-21swapper/1823:46:5510
195849913028,61cyclictest0-21swapper/1820:00:2010
19584991300,77cyclictest0-21swapper/1823:15:2310
195589913028,67cyclictest0-21swapper/1522:50:317
195589913026,66cyclictest0-21swapper/1522:10:407
195589913026,66cyclictest0-21swapper/1522:10:397
195589913025,63cyclictest0-21swapper/1521:32:117
195589913025,63cyclictest0-21swapper/1521:32:107
19654991294,74cyclictest0-21swapper/3000:01:3324
196549912923,62cyclictest0-21swapper/3023:18:1624
196199912928,68cyclictest0-21swapper/2200:10:1515
195849912929,71cyclictest0-21swapper/1823:13:4610
195849912918,79cyclictest0-21swapper/1822:33:0910
195699912914,97cyclictest0-21swapper/1620:30:448
195589912930,72cyclictest0-21swapper/1523:47:557
195589912927,66cyclictest0-21swapper/1521:42:217
195589912927,66cyclictest0-21swapper/1521:42:207
195589912926,63cyclictest0-21swapper/1522:01:037
195589912926,63cyclictest0-21swapper/1522:01:027
195589912926,60cyclictest0-21swapper/1500:04:307
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional