You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-01-15 - 17:10
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rackcslot8.osadl.org (updated Thu Jan 15, 2026 12:48:06)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2973899343142,40cyclictest151rcu_preempt12:00:3729
3273911980,190ptp4l0-21swapper/107:08:241
330891169161,6phc2sys0-21swapper/207:09:3912
297099914827,81cyclictest0-21swapper/008:23:170
29731991460,85cyclictest0-21swapper/512:03:1527
297389914211,103cyclictest151rcu_preempt11:58:3729
297679914050,56cyclictest0-21swapper/1407:29:506
297679914050,56cyclictest0-21swapper/1407:29:506
297679914029,71cyclictest0-21swapper/1411:26:006
297249914034,37cyclictest0-21swapper/308:07:0123
298069913746,58cyclictest0-21swapper/2011:43:3613
297319913718,40cyclictest0-21swapper/507:18:1327
297319913718,40cyclictest0-21swapper/507:18:1327
297319913525,106cyclictest0-21swapper/510:08:2927
297319913519,97cyclictest0-21swapper/510:46:1827
297319913515,87cyclictest0-21swapper/511:38:3727
297249913535,55cyclictest0-21swapper/309:30:1423
297249913432,61cyclictest0-21swapper/311:49:5123
298069913353,60cyclictest0-21swapper/2009:49:5813
298069913329,68cyclictest0-21swapper/2012:25:1313
298069913326,74cyclictest0-21swapper/2010:13:2913
29783991339,38cyclictest0-21swapper/1710:54:559
297679913324,108cyclictest0-21swapper/1410:29:536
298069913252,58cyclictest0-21swapper/2010:05:4213
298069913250,59cyclictest0-21swapper/2012:17:1213
298069913243,61cyclictest0-21swapper/2007:55:2313
298069913239,57cyclictest0-21swapper/2010:37:4813
298069913232,67cyclictest0-21swapper/2009:36:2113
298069913230,72cyclictest0-21swapper/2011:10:5613
29783991329,113cyclictest13493-21taskset09:46:549
298069913130,73cyclictest0-21swapper/2009:22:2313
298069913128,67cyclictest0-21swapper/2007:30:1513
298069913128,67cyclictest0-21swapper/2007:30:1413
298069913128,66cyclictest0-21swapper/2007:15:1713
298069913128,66cyclictest0-21swapper/2007:15:1713
298069913127,69cyclictest0-21swapper/2012:30:1513
298069913127,68cyclictest0-21swapper/2009:30:2813
298069913123,62cyclictest0-21swapper/2008:35:2613
298069913122,108cyclictest0-21swapper/2010:53:1713
29783991319,93cyclictest0-21swapper/1709:11:399
29783991319,91cyclictest0-21swapper/1712:01:579
29783991319,121cyclictest0-21swapper/1708:50:019
297679913146,59cyclictest0-21swapper/1410:11:426
297679913144,61cyclictest0-21swapper/1409:35:546
297679913124,65cyclictest0-21swapper/1412:15:306
297249913130,22cyclictest0-21swapper/311:55:1223
298069913032,74cyclictest0-21swapper/2010:26:4913
298069913031,78cyclictest0-21swapper/2010:15:2213
298069913030,71cyclictest0-21swapper/2012:10:2013
298069913029,74cyclictest0-21swapper/2011:57:2513
298069913029,70cyclictest0-21swapper/2009:43:4713
298069913028,71cyclictest0-21swapper/2010:45:2413
298069913028,68cyclictest0-21swapper/2009:00:0013
298069913027,70cyclictest0-21swapper/2008:25:1813
298069913027,69cyclictest0-21swapper/2008:10:1813
29773991300,86cyclictest0-21swapper/1507:15:257
29773991300,86cyclictest0-21swapper/1507:15:247
29856991290,72cyclictest0-21swapper/2811:54:2021
298069912929,70cyclictest0-21swapper/2011:50:1113
29783991299,98cyclictest0-21swapper/1708:10:279
297679912947,56cyclictest0-21swapper/1410:15:286
297679912928,66cyclictest0-21swapper/1409:53:326
297679912927,58cyclictest0-21swapper/1407:10:026
297679912927,58cyclictest0-21swapper/1407:10:026
297319912925,103cyclictest0-21swapper/509:03:5227
297249912926,65cyclictest0-21swapper/310:12:3523
29830991280,119cyclictest151rcu_preempt11:15:1717
298069912829,70cyclictest0-21swapper/2010:00:2213
298069912828,70cyclictest0-21swapper/2011:25:2213
298069912826,67cyclictest0-21swapper/2008:30:3713
297839912810,94cyclictest0-21swapper/1710:33:089
297739912851,55cyclictest0-21swapper/1509:31:387
297739912826,70cyclictest0-21swapper/1508:25:237
297679912845,54cyclictest0-21swapper/1408:02:576
297679912843,58cyclictest0-21swapper/1412:06:366
297679912842,57cyclictest0-21swapper/1410:45:226
297679912839,57cyclictest0-21swapper/1412:05:006
297679912835,60cyclictest0-21swapper/1410:41:386
297679912829,68cyclictest0-21swapper/1407:45:176
297679912829,68cyclictest0-21swapper/1407:45:176
297679912827,68cyclictest0-21swapper/1411:33:446
297319912846,57cyclictest0-21swapper/510:03:3227
297739912742,57cyclictest0-21swapper/1509:19:547
297679912751,60cyclictest0-21swapper/1411:36:416
297679912751,59cyclictest0-21swapper/1410:51:166
297679912729,67cyclictest0-21swapper/1410:31:296
297679912727,71cyclictest0-21swapper/1408:59:026
297679912727,65cyclictest0-21swapper/1409:40:446
297679912727,64cyclictest0-21swapper/1409:47:396
297319912747,51cyclictest0-21swapper/510:15:5027
297319912738,58cyclictest0-21swapper/512:37:2727
297319912738,56cyclictest0-21swapper/510:26:3127
297249912723,80cyclictest0-21swapper/310:32:5323
29830991260,87cyclictest161-21ksoftirqd/2409:28:2617
29783991269,70cyclictest0-21swapper/1711:01:279
297739912644,52cyclictest0-21swapper/1510:51:167
297679912642,64cyclictest0-21swapper/1409:25:136
297679912642,49cyclictest0-21swapper/1410:20:016
297679912629,71cyclictest0-21swapper/1411:44:296
297679912629,67cyclictest0-21swapper/1411:21:116
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional