You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-04-07 - 21:02
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rackcslot8.osadl.org (updated Tue Apr 07, 2026 12:49:18)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
65949923062,3cyclictest151rcu_preempt10:07:5513
3273912190,211ptp4l0-21swapper/107:06:561
330891189181,6phc2sys0-21swapper/207:09:5112
39012176167,7sleep90-21swapper/907:05:2031
66039917130,87cyclictest151rcu_preempt10:58:3314
6534991666,135cyclictest0-21swapper/1208:05:334
6534991666,135cyclictest0-21swapper/1208:05:334
6534991626,141cyclictest0-21swapper/1210:45:144
65489916116,90cyclictest0-21swapper/1410:10:236
6534991616,109cyclictest0-21swapper/1212:20:284
66039915852,59cyclictest151rcu_preempt10:19:1414
6534991576,101cyclictest0-21swapper/1212:02:344
65269915752,104cyclictest0-21swapper/1109:47:313
6548991540,61cyclictest0-21swapper/1408:16:136
6548991540,61cyclictest0-21swapper/1408:16:126
6534991546,102cyclictest0-21swapper/1211:35:174
6603991510,86cyclictest0-21swapper/2110:35:1714
66039914925,77cyclictest151rcu_preempt09:48:1514
65489914816,98cyclictest0-21swapper/1409:52:226
6507991470,87cyclictest0-21swapper/810:52:1130
6507991470,83cyclictest0-21swapper/808:15:2330
6507991470,83cyclictest0-21swapper/808:15:2330
6507991450,90cyclictest19879-21sed12:25:0230
6507991440,86cyclictest0-21swapper/812:30:1730
6507991420,86cyclictest0-21swapper/809:10:1230
6507991420,86cyclictest0-21swapper/809:10:1230
64779914112,98cyclictest151rcu_preempt10:35:5726
65079913948,63cyclictest0-21swapper/809:50:4330
6507991390,79cyclictest0-21swapper/812:07:3430
65269913831,90cyclictest0-21swapper/1109:05:193
65269913831,90cyclictest0-21swapper/1109:05:183
6507991380,83cyclictest0-21swapper/808:30:1930
6507991380,83cyclictest0-21swapper/808:30:1830
6534991376,82cyclictest0-21swapper/1212:27:104
65269913731,62cyclictest0-21swapper/1110:09:003
6507991360,84cyclictest0-21swapper/811:59:1630
6498991360,88cyclictest0-21swapper/712:35:1729
64779913638,50cyclictest151rcu_preempt08:50:1626
64779913638,50cyclictest151rcu_preempt08:50:1526
6477991360,87cyclictest0-21swapper/407:45:2226
6534991356,80cyclictest0-21swapper/1212:34:234
65079913522,69cyclictest0-21swapper/810:56:2830
65079913516,106cyclictest25752-21cpuspeed09:30:1130
6507991350,80cyclictest0-21swapper/811:52:3730
6507991350,80cyclictest0-21swapper/808:00:2530
6507991350,80cyclictest0-21swapper/808:00:2430
65489913416,82cyclictest0-21swapper/1411:56:246
65269913428,63cyclictest0-21swapper/1111:56:533
66099913367,41cyclictest0-21swapper/2211:30:3515
66039913351,76cyclictest11748-21taskset07:10:1914
65079913330,71cyclictest0-21swapper/812:04:2030
66099913220,68cyclictest0-21swapper/2209:10:4815
66099913220,68cyclictest0-21swapper/2209:10:4815
65559913221,99cyclictest0-21swapper/1509:14:287
65559913221,99cyclictest0-21swapper/1509:14:277
65489913217,85cyclictest0-21swapper/1411:47:506
65079913229,63cyclictest0-21swapper/809:21:4030
65079913229,63cyclictest0-21swapper/809:21:4030
6507991320,84cyclictest0-21swapper/809:36:3530
6609991311,80cyclictest0-21swapper/2210:02:1015
6603991310,83cyclictest0-21swapper/2111:07:5314
65489913116,73cyclictest0-21swapper/1411:28:366
65079913128,66cyclictest0-21swapper/809:15:1330
65079913128,66cyclictest0-21swapper/809:15:1330
65079913127,62cyclictest0-21swapper/812:37:1430
65079913122,74cyclictest0-21swapper/812:15:2130
65079913122,71cyclictest0-21swapper/811:04:0330
65079913116,78cyclictest0-21swapper/810:45:0130
65079913115,72cyclictest0-21swapper/811:41:0530
65079913115,65cyclictest0-21swapper/810:16:0730
6507991310,78cyclictest0-21swapper/810:23:3730
64779913161,43cyclictest151rcu_preempt08:55:2326
64779913161,43cyclictest151rcu_preempt08:55:2326
65079913034,67cyclictest0-21swapper/810:40:1130
65079913026,61cyclictest0-21swapper/811:45:2530
64779913010,104cyclictest151rcu_preempt10:22:1026
65349912937,49cyclictest0-21swapper/1210:44:164
65079912939,59cyclictest0-21swapper/811:35:1430
65079912935,60cyclictest0-21swapper/808:23:3930
65079912935,60cyclictest0-21swapper/808:23:3830
65079912929,65cyclictest0-21swapper/811:25:2130
65079912928,65cyclictest0-21swapper/809:47:4930
65079912924,64cyclictest0-21swapper/811:07:2830
65079912922,70cyclictest0-21swapper/810:10:4630
6507991290,77cyclictest0-21swapper/810:25:1430
66039912819,72cyclictest0-21swapper/2111:19:5514
6534991286,82cyclictest0-21swapper/1210:06:004
65079912827,61cyclictest0-21swapper/811:13:0230
6507991280,76cyclictest0-21swapper/809:09:2030
6507991280,76cyclictest0-21swapper/809:09:2030
65349912717,40cyclictest0-21swapper/1209:49:294
65079912726,63cyclictest0-21swapper/809:55:0130
64779912716,87cyclictest151rcu_preempt11:58:1226
66099912620,39cyclictest0-21swapper/2212:37:3415
66039912625,78cyclictest151rcu_preempt10:04:1614
65559912632,62cyclictest0-21swapper/1510:54:247
6534991266,84cyclictest0-21swapper/1211:32:104
65079912627,62cyclictest0-21swapper/812:26:1930
6507991261,72cyclictest0-21swapper/808:05:1230
6507991261,72cyclictest0-21swapper/808:05:1230
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional