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2026-02-20 - 16:19
[ 290.152] (II) VESA: driver for VESA chipsets: vesa

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #c, slot #8

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rackcslot8s.osadl.org (updated Fri Feb 20, 2026 12:46:08)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
94532650,0sleep51068-21runrttasks09:26:525
192782640,0sleep00-21swapper/009:40:170
317732620,0sleep60-21swapper/608:05:156
1881916229,7phc2sys0-21swapper/007:05:130
453026151,6sleep20-21swapper/207:09:142
111391600,5ptp4l0-21swapper/407:09:364
109022600,0sleep50-21swapper/511:00:015
449825433,7sleep60-21swapper/607:08:466
441325342,6sleep70-21swapper/707:07:427
429025333,6sleep30-21swapper/307:06:113
445225240,7sleep10-21swapper/107:08:171
433824634,7sleep50-21swapper/507:06:455
111391360,0ptp4l0-21swapper/408:10:154
111391350,0ptp4l0-21swapper/408:40:204
111391340,0ptp4l0-21swapper/011:00:010
111391330,0ptp4l0-21swapper/412:28:254
111391330,0ptp4l0-21swapper/411:44:084
111391330,0ptp4l0-21swapper/407:35:144
111391330,0ptp4l0-21swapper/407:20:204
111391330,0ptp4l0-21swapper/111:40:161
111391320,0ptp4l0-21swapper/409:56:304
111391310,3ptp4l0-21swapper/511:06:585
111391310,0ptp4l0-21swapper/510:43:145
111391310,0ptp4l0-21swapper/510:17:195
111391310,0ptp4l0-21swapper/409:15:334
111391310,0ptp4l0-21swapper/011:25:170
111391300,2ptp4l0-21swapper/107:40:121
111391300,0ptp4l0-21swapper/412:39:414
111391300,0ptp4l0-21swapper/412:17:344
111391300,0ptp4l0-21swapper/411:48:364
111391300,0ptp4l0-21swapper/009:18:390
111391290,0ptp4l0-21swapper/408:05:154
111391290,0ptp4l0-21swapper/010:07:440
111391280,4ptp4l0-21swapper/409:14:204
111391280,0ptp4l0-21swapper/411:12:344
111391280,0ptp4l0-21swapper/410:58:014
111391280,0ptp4l0-21swapper/409:36:364
111391280,0ptp4l0-21swapper/112:37:021
111391280,0ptp4l0-21swapper/110:50:111
111391280,0ptp4l0-21swapper/110:43:351
111391280,0ptp4l0-21swapper/110:11:281
111391280,0ptp4l0-21swapper/110:11:281
111391280,0ptp4l0-21swapper/010:29:370
111391280,0ptp4l0-21swapper/010:13:260
111391280,0ptp4l0-21swapper/010:13:260
111391270,1ptp4l30882-21ssh09:55:541
111391270,0ptp4l0-21swapper/509:18:555
111391270,0ptp4l0-21swapper/411:21:344
111391270,0ptp4l0-21swapper/411:04:534
111391270,0ptp4l0-21swapper/309:55:173
111391270,0ptp4l0-21swapper/111:14:431
111391270,0ptp4l0-21swapper/107:33:311
111391270,0ptp4l0-21swapper/107:33:311
111391270,0ptp4l0-21swapper/012:17:170
111391270,0ptp4l0-21swapper/010:31:220
111391270,0ptp4l0-21swapper/009:45:560
111391270,0ptp4l0-21swapper/009:10:070
111391270,0ptp4l0-21swapper/007:45:190
111391260,3ptp4l23232-21switchtime11:15:180
111391260,2ptp4l0-21swapper/411:56:524
111391260,2ptp4l0-21swapper/411:19:164
111391260,0ptp4l0-21swapper/512:00:155
111391260,0ptp4l0-21swapper/511:40:325
111391260,0ptp4l0-21swapper/511:37:125
111391260,0ptp4l0-21swapper/412:14:404
111391260,0ptp4l0-21swapper/412:07:304
111391260,0ptp4l0-21swapper/409:47:054
111391260,0ptp4l0-21swapper/409:25:144
111391260,0ptp4l0-21swapper/407:15:004
111391260,0ptp4l0-21swapper/112:30:571
111391260,0ptp4l0-21swapper/111:15:321
111391260,0ptp4l0-21swapper/111:00:441
111391260,0ptp4l0-21swapper/012:03:050
111391260,0ptp4l0-21swapper/011:55:100
111391260,0ptp4l0-21swapper/011:30:520
111391260,0ptp4l0-21swapper/009:25:070
111391250,0ptp4l0-21swapper/512:31:025
111391250,0ptp4l0-21swapper/512:18:515
111391250,0ptp4l0-21swapper/512:13:265
111391250,0ptp4l0-21swapper/511:18:255
111391250,0ptp4l0-21swapper/510:00:065
111391250,0ptp4l0-21swapper/509:45:215
111391250,0ptp4l0-21swapper/411:53:184
111391250,0ptp4l0-21swapper/411:38:444
111391250,0ptp4l0-21swapper/411:32:384
111391250,0ptp4l0-21swapper/410:40:394
111391250,0ptp4l0-21swapper/410:27:374
111391250,0ptp4l0-21swapper/410:01:094
111391250,0ptp4l0-21swapper/409:33:204
111391250,0ptp4l0-21swapper/409:00:004
111391250,0ptp4l0-21swapper/408:38:164
111391250,0ptp4l0-21swapper/111:07:071
111391250,0ptp4l0-21swapper/110:17:221
111391250,0ptp4l0-21swapper/109:27:041
111391250,0ptp4l0-21swapper/011:45:200
111391250,0ptp4l0-21swapper/011:05:100
111391250,0ptp4l0-21swapper/010:44:450
111391250,0ptp4l0-21swapper/009:53:560
111391250,0ptp4l0-21swapper/009:25:000
111391250,0ptp4l0-21swapper/009:00:200
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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