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2026-01-31 - 15:06
[ 290.152] (II) VESA: driver for VESA chipsets: vesa

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #c, slot #8

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rackcslot8s.osadl.org (updated Sat Jan 31, 2026 00:46:09)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
253732650,0sleep70-21swapper/721:25:157
107172640,2sleep12202099cyclictest22:35:111
111391630,5ptp4l0-21swapper/419:09:544
111391620,31ptp4l0-21swapper/119:05:001
111391600,5ptp4l0-21swapper/019:09:410
66592550,0sleep60-21swapper/619:45:116
2169225342,7sleep70-21swapper/719:09:167
1983525242,6sleep20-21swapper/219:05:032
314552500,0sleep3401ktimersoftd/322:18:543
2151524837,7sleep30-21swapper/319:06:563
197962480,0sleep70-21swapper/722:01:517
2145824736,7sleep50-21swapper/519:06:185
2144124534,7sleep60-21swapper/619:06:036
111391330,3ptp4l0-21swapper/422:15:184
111391330,1ptp4l7042-21/usr/sbin/munin22:30:104
111391310,0ptp4l0-21swapper/420:30:184
111391310,0ptp4l0-21swapper/021:44:020
111391310,0ptp4l0-21swapper/021:30:120
111391300,0ptp4l0-21swapper/421:10:044
111391300,0ptp4l0-21swapper/223:07:002
111391300,0ptp4l0-21swapper/219:30:162
111391300,0ptp4l0-21swapper/021:10:140
111391300,0ptp4l0-21swapper/019:40:200
111391290,1ptp4l23573-21ssh22:51:470
111391290,0ptp4l12898-21diskmemload21:49:334
111391290,0ptp4l0-21swapper/522:55:505
111391290,0ptp4l0-21swapper/522:55:505
111391290,0ptp4l0-21swapper/423:42:024
111391290,0ptp4l0-21swapper/422:03:104
111391290,0ptp4l0-21swapper/400:30:154
111391290,0ptp4l0-21swapper/400:05:224
111391290,0ptp4l0-21swapper/200:01:452
111391290,0ptp4l0-21swapper/023:30:210
111391290,0ptp4l0-21swapper/022:41:320
111391290,0ptp4l0-21swapper/021:58:400
111391280,0ptp4l0-21swapper/600:26:586
111391280,0ptp4l0-21swapper/423:04:414
111391280,0ptp4l0-21swapper/422:45:124
111391280,0ptp4l0-21swapper/422:08:274
111391280,0ptp4l0-21swapper/421:19:404
111391280,0ptp4l0-21swapper/023:54:130
111391280,0ptp4l0-21swapper/023:23:240
111391280,0ptp4l0-21swapper/022:59:130
111391280,0ptp4l0-21swapper/022:59:130
111391280,0ptp4l0-21swapper/022:49:260
111391280,0ptp4l0-21swapper/022:16:270
111391270,1ptp4l26416-21ssh00:26:082
111391270,0ptp4l0-21swapper/600:08:426
111391270,0ptp4l0-21swapper/423:50:354
111391270,0ptp4l0-21swapper/423:26:264
111391270,0ptp4l0-21swapper/421:59:594
111391270,0ptp4l0-21swapper/421:43:384
111391270,0ptp4l0-21swapper/421:33:074
111391270,0ptp4l0-21swapper/420:52:424
111391270,0ptp4l0-21swapper/400:23:424
111391270,0ptp4l0-21swapper/323:09:593
111391270,0ptp4l0-21swapper/122:18:151
111391270,0ptp4l0-21swapper/023:49:540
111391270,0ptp4l0-21swapper/023:07:480
111391270,0ptp4l0-21swapper/023:02:140
111391270,0ptp4l0-21swapper/022:11:210
111391270,0ptp4l0-21swapper/021:50:480
111391270,0ptp4l0-21swapper/000:37:460
111391270,0ptp4l0-21swapper/000:02:460
111391260,2ptp4l0-21swapper/423:58:114
111391260,0ptp4l0-21swapper/723:10:127
111391260,0ptp4l0-21swapper/622:37:046
111391260,0ptp4l0-21swapper/622:23:466
111391260,0ptp4l0-21swapper/621:37:266
111391260,0ptp4l0-21swapper/423:48:184
111391260,0ptp4l0-21swapper/423:15:064
111391260,0ptp4l0-21swapper/422:27:274
111391260,0ptp4l0-21swapper/421:23:374
111391260,0ptp4l0-21swapper/322:50:403
111391260,0ptp4l0-21swapper/223:51:122
111391260,0ptp4l0-21swapper/223:46:372
111391260,0ptp4l0-21swapper/023:39:040
111391260,0ptp4l0-21swapper/022:39:190
111391260,0ptp4l0-21swapper/022:34:590
111391260,0ptp4l0-21swapper/000:22:420
111391250,1ptp4l21954-21smartctl23:35:124
111391250,0ptp4l0-21swapper/721:55:127
111391250,0ptp4l0-21swapper/422:53:514
111391250,0ptp4l0-21swapper/420:19:424
111391250,0ptp4l0-21swapper/420:19:424
111391250,0ptp4l0-21swapper/400:27:544
111391250,0ptp4l0-21swapper/400:05:004
111391250,0ptp4l0-21swapper/300:24:523
111391250,0ptp4l0-21swapper/221:28:072
111391250,0ptp4l0-21swapper/023:17:260
111391250,0ptp4l0-21swapper/022:28:440
111391250,0ptp4l0-21swapper/022:22:180
111391250,0ptp4l0-21swapper/022:07:260
111391250,0ptp4l0-21swapper/021:45:140
111391250,0ptp4l0-21swapper/021:23:040
111391250,0ptp4l0-21swapper/021:05:150
111391250,0ptp4l0-21swapper/020:45:190
111391250,0ptp4l0-21swapper/020:10:100
111391240,1ptp4l665-21timerandwakeup20:40:204
111391240,1ptp4l2200899cyclictest21:19:300
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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