You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-01-25 - 14:54
[ 290.152] (II) VESA: driver for VESA chipsets: vesa

OSADL QA Farm on Real-time of Mainline Linux

About - Hardware - CPUs - Benchmarks - Graphics - Benchmarks - Kernels - Boards/Distros - Latency monitoring - Latency plots - System data - Profiles - Compare - Awards

Default latency plot of shadow in rack #c, slot #8

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
Special  All - All RT - Optimization - Ethernet - Thumbnails - Next
  
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rackcslot8s.osadl.org (updated Sun Jan 25, 2026 00:46:06)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
111391630,2ptp4l0-21swapper/019:05:140
111391620,5ptp4l0-21swapper/419:06:044
152352610,0sleep60-21swapper/622:53:056
1176926151,6sleep20-21swapper/219:07:382
1173325432,7sleep60-21swapper/619:07:106
1004325443,7sleep10-21swapper/119:05:051
1160624836,7sleep70-21swapper/719:05:357
111391480,2ptp4l0-21swapper/519:10:005
1004524837,7sleep30-21swapper/319:05:073
111391350,0ptp4l0-21swapper/423:55:134
12228993311,0cyclictest0-21swapper/023:20:020
111391310,0ptp4l0-21swapper/420:35:174
111391310,0ptp4l0-21swapper/022:45:120
111391300,0ptp4l0-21swapper/422:56:224
111391300,0ptp4l0-21swapper/023:36:380
111391300,0ptp4l0-21swapper/021:45:160
111391290,0ptp4l0-21swapper/423:45:184
111391290,0ptp4l0-21swapper/422:40:174
111391290,0ptp4l0-21swapper/422:40:174
111391290,0ptp4l0-21swapper/121:40:431
111391290,0ptp4l0-21swapper/023:10:200
111391290,0ptp4l0-21swapper/021:10:170
111391280,0ptp4l0-21swapper/523:10:555
111391280,0ptp4l0-21swapper/521:10:195
111391280,0ptp4l0-21swapper/521:00:195
111391280,0ptp4l0-21swapper/520:42:245
111391280,0ptp4l0-21swapper/500:34:205
111391280,0ptp4l0-21swapper/422:09:054
111391280,0ptp4l0-21swapper/400:38:484
111391280,0ptp4l0-21swapper/400:21:444
111391280,0ptp4l0-21swapper/400:18:254
111391280,0ptp4l0-21swapper/023:16:590
111391280,0ptp4l0-21swapper/022:10:160
111391280,0ptp4l0-21swapper/021:20:410
111391270,0ptp4l0-21swapper/422:46:504
111391270,0ptp4l0-21swapper/421:34:134
111391270,0ptp4l0-21swapper/419:50:124
111391270,0ptp4l0-21swapper/400:07:054
111391270,0ptp4l0-21swapper/123:12:401
111391270,0ptp4l0-21swapper/022:30:570
111391270,0ptp4l0-21swapper/021:54:240
111391270,0ptp4l0-21swapper/021:42:360
111391270,0ptp4l0-21swapper/021:05:170
111391270,0ptp4l0-21swapper/020:20:150
111391270,0ptp4l0-21swapper/000:33:210
111391270,0ptp4l0-21swapper/000:16:400
111391270,0ptp4l0-21swapper/000:14:390
111391270,0ptp4l0-21swapper/000:03:460
111391260,4ptp4l0-21swapper/122:31:121
111391260,0ptp4l0-21swapper/523:40:155
111391260,0ptp4l0-21swapper/523:03:155
111391260,0ptp4l0-21swapper/423:53:184
111391260,0ptp4l0-21swapper/422:12:304
111391260,0ptp4l0-21swapper/421:54:404
111391260,0ptp4l0-21swapper/421:12:274
111391260,0ptp4l0-21swapper/419:35:124
111391260,0ptp4l0-21swapper/123:00:541
111391260,0ptp4l0-21swapper/023:32:050
111391260,0ptp4l0-21swapper/023:07:220
111391260,0ptp4l0-21swapper/023:01:170
111391260,0ptp4l0-21swapper/021:55:020
111391260,0ptp4l0-21swapper/021:29:010
111391260,0ptp4l0-21swapper/020:55:190
111391260,0ptp4l0-21swapper/000:23:040
111391250,1ptp4l7095-21sensors_temp23:25:194
111391250,0ptp4l25238-21strings20:45:170
111391250,0ptp4l0-21swapper/600:24:066
111391250,0ptp4l0-21swapper/522:08:455
111391250,0ptp4l0-21swapper/521:41:145
111391250,0ptp4l0-21swapper/520:10:135
111391250,0ptp4l0-21swapper/422:51:014
111391250,0ptp4l0-21swapper/421:28:214
111391250,0ptp4l0-21swapper/400:32:334
111391250,0ptp4l0-21swapper/400:13:024
111391250,0ptp4l0-21swapper/223:57:422
111391250,0ptp4l0-21swapper/200:30:222
111391250,0ptp4l0-21swapper/200:01:182
111391250,0ptp4l0-21swapper/123:30:151
111391250,0ptp4l0-21swapper/122:28:241
111391250,0ptp4l0-21swapper/100:35:121
111391250,0ptp4l0-21swapper/100:05:181
111391250,0ptp4l0-21swapper/022:57:190
111391250,0ptp4l0-21swapper/022:37:040
111391250,0ptp4l0-21swapper/022:26:540
111391250,0ptp4l0-21swapper/022:00:100
111391250,0ptp4l0-21swapper/021:33:580
111391250,0ptp4l0-21swapper/000:25:110
111391240,2ptp4l0-21swapper/421:56:024
111391240,2ptp4l0-21swapper/421:35:514
111391240,2ptp4l0-21swapper/123:22:221
111391240,1ptp4l9874-21df_inode23:30:124
111391240,1ptp4l20828-21strings23:00:174
111391240,1ptp4l13608-21cut23:35:101
111391240,1ptp4l12963-21missed_timers22:05:161
111391240,1ptp4l10817-21df_inode20:15:120
111391240,0ptp4l0-21swapper/523:46:445
111391240,0ptp4l0-21swapper/523:35:235
111391240,0ptp4l0-21swapper/521:16:175
111391240,0ptp4l0-21swapper/520:30:195
111391240,0ptp4l0-21swapper/519:40:155
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional