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2026-02-23 - 16:30
[ 290.152] (II) VESA: driver for VESA chipsets: vesa

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #c, slot #8

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rackcslot8s.osadl.org (updated Mon Feb 23, 2026 12:46:06)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
321042650,0sleep70-21swapper/709:28:027
111391630,5ptp4l0-21swapper/007:08:530
111391620,5ptp4l0-21swapper/407:08:294
99642610,0sleep50-21swapper/508:50:205
218852600,0sleep60-21swapper/609:15:116
111391590,5ptp4l0-21swapper/107:07:221
2615225646,6sleep20-21swapper/207:08:462
2529125330,17sleep30-21swapper/307:05:183
111391530,5ptp4l0-21swapper/507:06:185
2600225241,6sleep70-21swapper/707:06:507
2592824736,7sleep60-21swapper/607:05:536
111391340,0ptp4l0-21swapper/108:55:211
111391320,6ptp4l28729-21ssh09:24:111
111391320,0ptp4l0-21swapper/409:56:284
111391320,0ptp4l0-21swapper/011:46:210
111391310,0ptp4l0-21swapper/512:35:415
111391300,2ptp4l0-21swapper/112:10:161
111391300,0ptp4l0-21swapper/509:23:345
111391300,0ptp4l0-21swapper/111:50:181
111391300,0ptp4l0-21swapper/110:09:031
111391300,0ptp4l0-21swapper/009:25:110
111391300,0ptp4l0-21swapper/009:18:560
111391290,0ptp4l0-21swapper/509:36:505
111391280,0ptp4l0-21swapper/411:00:494
111391280,0ptp4l0-21swapper/409:51:114
111391280,0ptp4l0-21swapper/409:11:194
111391280,0ptp4l0-21swapper/109:49:421
111391280,0ptp4l0-21swapper/011:30:000
111391280,0ptp4l0-21swapper/011:23:370
111391280,0ptp4l0-21swapper/010:32:200
111391280,0ptp4l0-21swapper/010:29:130
111391280,0ptp4l0-21swapper/010:11:540
111391270,0ptp4l0-21swapper/512:32:175
111391270,0ptp4l0-21swapper/510:44:505
111391270,0ptp4l0-21swapper/510:15:025
111391270,0ptp4l0-21swapper/510:15:025
111391270,0ptp4l0-21swapper/409:20:074
111391270,0ptp4l0-21swapper/407:15:124
111391270,0ptp4l0-21swapper/110:33:441
111391270,0ptp4l0-21swapper/012:26:120
111391270,0ptp4l0-21swapper/011:10:000
111391270,0ptp4l0-21swapper/007:45:150
2652599263,0cyclictest0-21swapper/107:10:141
111391260,0ptp4l0-21swapper/610:47:226
111391260,0ptp4l0-21swapper/510:27:385
111391260,0ptp4l0-21swapper/507:23:295
111391260,0ptp4l0-21swapper/412:19:334
111391260,0ptp4l0-21swapper/411:16:304
111391260,0ptp4l0-21swapper/112:35:391
111391260,0ptp4l0-21swapper/112:32:191
111391260,0ptp4l0-21swapper/109:50:471
111391260,0ptp4l0-21swapper/011:17:090
111391260,0ptp4l0-21swapper/009:46:250
111391260,0ptp4l0-21swapper/009:35:170
111391260,0ptp4l0-21swapper/009:13:360
111391250,1ptp4l24222-21hddtemp_smartct11:30:144
111391250,0ptp4l0-21swapper/509:50:285
111391250,0ptp4l0-21swapper/509:28:155
111391250,0ptp4l0-21swapper/507:30:015
111391250,0ptp4l0-21swapper/412:34:254
111391250,0ptp4l0-21swapper/411:25:194
111391250,0ptp4l0-21swapper/411:06:544
111391250,0ptp4l0-21swapper/410:35:224
111391250,0ptp4l0-21swapper/409:16:234
111391250,0ptp4l0-21swapper/112:09:201
111391250,0ptp4l0-21swapper/111:31:511
111391250,0ptp4l0-21swapper/108:47:021
111391250,0ptp4l0-21swapper/012:05:180
111391250,0ptp4l0-21swapper/011:43:510
111391250,0ptp4l0-21swapper/011:25:150
111391250,0ptp4l0-21swapper/010:46:220
111391250,0ptp4l0-21swapper/009:44:540
111391240,1ptp4l7531-21unixbench_multi12:35:204
111391240,1ptp4l31979-21cpuspeed_turbos08:30:110
111391240,1ptp4l20542-21hddtemp_smartct08:05:144
111391240,1ptp4l17395-21diskmemload11:52:130
111391240,1ptp4l16279-21irqstats07:55:154
111391240,1ptp4l13834-21missed_timers10:30:154
111391240,1ptp4l13111-21cat07:50:005
111391240,0ptp4l0-21swapper/510:50:185
111391240,0ptp4l0-21swapper/510:35:185
111391240,0ptp4l0-21swapper/509:42:405
111391240,0ptp4l0-21swapper/509:14:125
111391240,0ptp4l0-21swapper/508:02:285
111391240,0ptp4l0-21swapper/507:25:195
111391240,0ptp4l0-21swapper/412:20:204
111391240,0ptp4l0-21swapper/412:07:314
111391240,0ptp4l0-21swapper/411:55:164
111391240,0ptp4l0-21swapper/411:10:144
111391240,0ptp4l0-21swapper/410:55:004
111391240,0ptp4l0-21swapper/410:25:184
111391240,0ptp4l0-21swapper/410:24:284
111391240,0ptp4l0-21swapper/409:47:064
111391240,0ptp4l0-21swapper/409:43:104
111391240,0ptp4l0-21swapper/408:30:214
111391240,0ptp4l0-21swapper/408:15:124
111391240,0ptp4l0-21swapper/112:24:391
111391240,0ptp4l0-21swapper/111:02:021
111391240,0ptp4l0-21swapper/108:24:321
111391240,0ptp4l0-21swapper/012:16:010
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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