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2026-02-19 - 15:42
[ 290.152] (II) VESA: driver for VESA chipsets: vesa

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #c, slot #8

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rackcslot8s.osadl.org (updated Thu Feb 19, 2026 12:46:11)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
20382990,0sleep00-21swapper/009:25:120
111391770,34ptp4l0-21swapper/007:05:120
3123526948,6sleep70-21swapper/707:09:297
111391620,5ptp4l0-21swapper/407:09:284
34862590,0sleep20-21swapper/212:25:142
113232590,1sleep449-21ksoftirqd/408:45:124
61232580,0sleep60-21swapper/611:00:116
267842580,1sleep21068-21runrttasks12:13:042
78782570,0sleep20-21swapper/209:32:592
1881915735,7phc2sys0-21swapper/507:07:305
292832560,0sleep10-21swapper/110:01:411
3110425343,6sleep20-21swapper/207:07:472
3126025233,7sleep30-21swapper/307:09:493
2970225231,16sleep10-21swapper/107:05:131
84162470,0sleep00-21swapper/011:47:320
3102624735,7sleep60-21swapper/607:06:476
52422410,2sleep23156199cyclictest10:59:112
111391360,0ptp4l0-21swapper/412:07:054
111391340,0ptp4l0-21swapper/508:10:125
111391330,0ptp4l0-21swapper/407:20:194
111391330,0ptp4l0-21swapper/011:35:190
111391320,0ptp4l0-21swapper/408:15:174
111391320,0ptp4l0-21swapper/012:39:300
111391320,0ptp4l0-21swapper/011:50:140
111391320,0ptp4l0-21swapper/011:50:130
111391320,0ptp4l0-21swapper/010:25:180
111391320,0ptp4l0-21swapper/010:20:180
111391310,0ptp4l0-21swapper/609:27:256
111391310,0ptp4l0-21swapper/410:52:294
111391310,0ptp4l0-21swapper/410:33:434
111391310,0ptp4l0-21swapper/410:20:244
111391310,0ptp4l0-21swapper/409:20:184
111391310,0ptp4l0-21swapper/009:05:200
111391300,0ptp4l0-21swapper/710:10:227
111391300,0ptp4l0-21swapper/412:10:124
111391300,0ptp4l0-21swapper/411:40:534
111391300,0ptp4l0-21swapper/411:27:444
111391300,0ptp4l0-21swapper/411:09:124
111391300,0ptp4l0-21swapper/410:17:284
111391300,0ptp4l0-21swapper/409:55:134
111391300,0ptp4l0-21swapper/409:40:144
111391300,0ptp4l0-21swapper/409:38:554
111391300,0ptp4l0-21swapper/309:57:013
111391300,0ptp4l0-21swapper/012:14:100
111391300,0ptp4l0-21swapper/011:05:160
111391290,0ptp4l0-21swapper/511:30:365
111391290,0ptp4l0-21swapper/511:08:185
111391290,0ptp4l0-21swapper/411:55:064
111391290,0ptp4l0-21swapper/411:55:054
111391290,0ptp4l0-21swapper/411:53:244
111391290,0ptp4l0-21swapper/411:53:234
111391290,0ptp4l0-21swapper/411:14:164
111391290,0ptp4l0-21swapper/410:14:044
111391290,0ptp4l0-21swapper/409:14:504
111391290,0ptp4l0-21swapper/409:14:504
111391290,0ptp4l0-21swapper/112:26:261
111391290,0ptp4l0-21swapper/112:05:131
111391290,0ptp4l0-21swapper/109:58:291
111391290,0ptp4l0-21swapper/012:23:060
111391290,0ptp4l0-21swapper/011:26:250
111391290,0ptp4l0-21swapper/011:10:470
111391290,0ptp4l0-21swapper/009:47:230
111391290,0ptp4l0-21swapper/009:38:570
111391290,0ptp4l0-21swapper/009:31:500
111391290,0ptp4l0-21swapper/007:20:130
111391280,2ptp4l0-21swapper/411:03:574
111391280,0ptp4l0-21swapper/512:32:325
111391280,0ptp4l0-21swapper/412:03:024
111391280,0ptp4l0-21swapper/410:55:564
111391280,0ptp4l0-21swapper/410:25:514
111391280,0ptp4l0-21swapper/409:34:274
111391280,0ptp4l0-21swapper/409:27:194
111391280,0ptp4l0-21swapper/111:34:301
111391280,0ptp4l0-21swapper/012:16:280
111391280,0ptp4l0-21swapper/011:41:400
111391280,0ptp4l0-21swapper/010:33:200
111391280,0ptp4l0-21swapper/010:14:150
111391280,0ptp4l0-21swapper/009:23:500
111391280,0ptp4l0-21swapper/009:19:170
111391280,0ptp4l0-21swapper/009:19:170
111391270,0ptp4l22440-21diskmemload09:52:571
111391270,0ptp4l0-21swapper/510:48:595
111391270,0ptp4l0-21swapper/510:26:205
111391270,0ptp4l0-21swapper/412:32:124
111391270,0ptp4l0-21swapper/412:16:134
111391270,0ptp4l0-21swapper/410:45:174
111391270,0ptp4l0-21swapper/409:19:214
111391270,0ptp4l0-21swapper/409:19:204
111391270,0ptp4l0-21swapper/408:52:274
111391270,0ptp4l0-21swapper/110:26:411
111391270,0ptp4l0-21swapper/110:09:231
111391270,0ptp4l0-21swapper/011:58:530
111391270,0ptp4l0-21swapper/011:58:520
111391270,0ptp4l0-21swapper/011:23:310
111391270,0ptp4l0-21swapper/010:18:590
111391270,0ptp4l0-21swapper/009:52:240
111391270,0ptp4l0-21swapper/009:43:230
111391270,0ptp4l0-21swapper/009:00:510
111391260,0ptp4l0-21swapper/512:20:125
111391260,0ptp4l0-21swapper/509:55:445
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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