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2026-02-01 - 07:39
[ 290.152] (II) VESA: driver for VESA chipsets: vesa

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #c, slot #8

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rackcslot8s.osadl.org (updated Sun Feb 01, 2026 00:46:07)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
24492630,0sleep30-21swapper/322:23:023
111391630,31ptp4l0-21swapper/019:07:190
111391610,30ptp4l0-21swapper/119:05:281
111391600,5ptp4l0-21swapper/419:08:584
111391590,5ptp4l0-21swapper/519:06:505
90892570,1sleep233-21ksoftirqd/221:47:532
2137225646,6sleep20-21swapper/219:06:542
2144125341,7sleep70-21swapper/719:07:477
2137624837,6sleep60-21swapper/619:06:586
1969524635,7sleep30-21swapper/319:05:023
111391360,0ptp4l0-21swapper/520:20:005
111391340,1ptp4l12914-21hddtemp_smartct00:10:091
111391330,0ptp4l0-21swapper/421:25:174
111391310,0ptp4l0-21swapper/521:05:135
111391310,0ptp4l0-21swapper/500:29:535
111391310,0ptp4l0-21swapper/423:33:514
111391310,0ptp4l0-21swapper/421:40:474
111391310,0ptp4l0-21swapper/121:12:221
111391300,1ptp4l11079-21ssh23:20:041
111391300,0ptp4l0-21swapper/721:48:147
111391300,0ptp4l0-21swapper/500:20:205
111391300,0ptp4l0-21swapper/423:00:194
111391300,0ptp4l0-21swapper/100:40:001
111391290,0ptp4l0-21swapper/423:19:414
111391290,0ptp4l0-21swapper/400:32:304
111391290,0ptp4l0-21swapper/123:59:481
111391290,0ptp4l0-21swapper/123:07:051
111391290,0ptp4l0-21swapper/119:30:141
111391290,0ptp4l0-21swapper/022:55:140
111391290,0ptp4l0-21swapper/022:15:100
111391280,0ptp4l0-21swapper/723:54:497
111391280,0ptp4l0-21swapper/723:54:487
111391280,0ptp4l0-21swapper/723:34:457
111391280,0ptp4l0-21swapper/722:43:257
111391280,0ptp4l0-21swapper/720:15:137
111391280,0ptp4l0-21swapper/621:47:316
111391280,0ptp4l0-21swapper/523:46:065
111391280,0ptp4l0-21swapper/523:37:025
111391280,0ptp4l0-21swapper/522:48:405
111391280,0ptp4l0-21swapper/522:30:215
111391280,0ptp4l0-21swapper/422:00:354
111391280,0ptp4l0-21swapper/421:31:574
111391280,0ptp4l0-21swapper/321:47:433
111391280,0ptp4l0-21swapper/121:54:541
111391280,0ptp4l0-21swapper/121:27:151
111391280,0ptp4l0-21swapper/100:03:501
111391280,0ptp4l0-21swapper/022:04:310
111391270,4ptp4l15165-21ssh00:13:360
111391270,0ptp4l0-21swapper/723:23:107
111391270,0ptp4l0-21swapper/522:44:235
111391270,0ptp4l0-21swapper/519:51:125
111391270,0ptp4l0-21swapper/500:33:065
111391270,0ptp4l0-21swapper/423:42:534
111391270,0ptp4l0-21swapper/422:41:534
111391270,0ptp4l0-21swapper/422:35:394
111391270,0ptp4l0-21swapper/422:24:454
111391270,0ptp4l0-21swapper/422:07:174
111391270,0ptp4l0-21swapper/421:37:314
111391270,0ptp4l0-21swapper/421:15:204
111391270,0ptp4l0-21swapper/421:15:204
111391270,0ptp4l0-21swapper/400:39:314
111391270,0ptp4l0-21swapper/323:34:113
111391270,0ptp4l0-21swapper/323:21:293
111391270,0ptp4l0-21swapper/123:38:281
111391270,0ptp4l0-21swapper/122:33:181
111391270,0ptp4l0-21swapper/122:06:481
111391260,1ptp4l15230-21latency_hist20:05:001
111391260,1ptp4l0-21swapper/021:16:530
111391260,1ptp4l0-21swapper/021:16:520
111391260,0ptp4l0-21swapper/423:14:584
111391260,0ptp4l0-21swapper/422:51:214
111391260,0ptp4l0-21swapper/421:59:344
111391260,0ptp4l0-21swapper/323:17:103
111391260,0ptp4l0-21swapper/122:47:131
111391260,0ptp4l0-21swapper/023:58:110
111391260,0ptp4l0-21swapper/022:05:140
111391260,0ptp4l0-21swapper/021:44:280
111391250,3ptp4l0-21swapper/023:10:500
111391250,2ptp4l0-21swapper/022:25:400
111391250,1ptp4l25070-21df_inode20:25:134
111391250,0ptp4l0-21swapper/622:26:396
111391250,0ptp4l0-21swapper/522:22:565
111391250,0ptp4l0-21swapper/423:20:194
111391250,0ptp4l0-21swapper/422:55:124
111391250,0ptp4l0-21swapper/422:45:454
111391250,0ptp4l0-21swapper/420:25:004
111391250,0ptp4l0-21swapper/400:19:024
111391250,0ptp4l0-21swapper/400:03:484
111391250,0ptp4l0-21swapper/321:53:173
111391250,0ptp4l0-21swapper/123:40:151
111391250,0ptp4l0-21swapper/121:46:021
111391250,0ptp4l0-21swapper/100:26:511
111391250,0ptp4l0-21swapper/023:50:010
111391250,0ptp4l0-21swapper/021:50:110
111391250,0ptp4l0-21swapper/021:20:260
111391250,0ptp4l0-21swapper/000:18:130
111391250,0ptp4l0-21swapper/000:07:230
111391240,2ptp4l0-21swapper/423:50:344
111391240,2ptp4l0-21swapper/423:50:344
111391240,1ptp4l7867-21df00:00:115
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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