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2026-01-20 - 22:31
[ 290.152] (II) VESA: driver for VESA chipsets: vesa

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #c, slot #8

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rackcslot8s.osadl.org (updated Tue Jan 20, 2026 12:46:06)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
111391790,29ptp4l0-21swapper/107:05:241
20362640,0sleep69789-21diskmemload11:55:156
1839426240,6sleep40-21swapper/407:06:524
1847925544,6sleep70-21swapper/707:08:007
1830225534,6sleep20-21swapper/207:05:472
10572550,0sleep70-21swapper/712:38:257
1845225433,6sleep60-21swapper/607:07:436
111391530,6ptp4l0-21swapper/007:05:120
111391500,5ptp4l0-21swapper/507:05:275
1829424735,7sleep30-21swapper/307:05:403
145702450,1sleep314577-21latency_hist10:00:003
111391320,0ptp4l0-21swapper/510:34:075
111391320,0ptp4l0-21swapper/410:26:274
111391320,0ptp4l0-21swapper/110:11:461
111391310,0ptp4l0-21swapper/111:07:141
111391310,0ptp4l0-21swapper/110:50:131
111391310,0ptp4l0-21swapper/110:09:481
111391300,2ptp4l0-21swapper/009:27:550
111391300,0ptp4l0-21swapper/511:58:385
111391300,0ptp4l0-21swapper/412:36:224
111391300,0ptp4l0-21swapper/411:35:544
111391300,0ptp4l0-21swapper/409:13:194
111391300,0ptp4l0-21swapper/009:47:250
111391290,3ptp4l0-21swapper/411:19:404
111391290,0ptp4l0-21swapper/511:03:555
111391290,0ptp4l0-21swapper/510:01:085
111391290,0ptp4l0-21swapper/509:16:495
111391290,0ptp4l0-21swapper/412:22:444
111391290,0ptp4l0-21swapper/411:20:464
111391290,0ptp4l0-21swapper/411:00:114
111391290,0ptp4l0-21swapper/410:08:364
111391290,0ptp4l0-21swapper/409:27:214
111391290,0ptp4l0-21swapper/409:24:104
111391290,0ptp4l0-21swapper/408:25:184
111391290,0ptp4l0-21swapper/110:57:001
111391290,0ptp4l0-21swapper/110:01:291
111391280,7ptp4l0-21swapper/412:31:414
111391280,3ptp4l241ktimersoftd/110:48:421
111391280,3ptp4l0-21swapper/009:44:360
111391280,3ptp4l0-21swapper/007:45:140
111391280,0ptp4l0-21swapper/609:44:456
111391280,0ptp4l0-21swapper/411:41:124
111391280,0ptp4l0-21swapper/409:52:184
111391280,0ptp4l0-21swapper/409:44:504
111391280,0ptp4l0-21swapper/109:16:471
111391280,0ptp4l0-21swapper/011:42:070
111391280,0ptp4l0-21swapper/009:35:500
111391270,2ptp4l0-21swapper/010:21:480
111391270,0ptp4l0-21swapper/611:15:196
111391270,0ptp4l0-21swapper/512:03:585
111391270,0ptp4l0-21swapper/410:57:524
111391270,0ptp4l0-21swapper/410:47:254
111391270,0ptp4l0-21swapper/409:37:134
111391270,0ptp4l0-21swapper/409:31:164
111391270,0ptp4l0-21swapper/409:00:224
111391270,0ptp4l0-21swapper/112:07:561
111391270,0ptp4l0-21swapper/112:03:541
111391270,0ptp4l0-21swapper/109:59:441
111391270,0ptp4l0-21swapper/109:32:181
111391270,0ptp4l0-21swapper/108:50:171
111391270,0ptp4l0-21swapper/011:57:110
111391270,0ptp4l0-21swapper/010:57:480
111391270,0ptp4l0-21swapper/009:21:010
111391260,3ptp4l0-21swapper/411:29:464
111391260,3ptp4l0-21swapper/409:49:194
111391260,0ptp4l0-21swapper/512:18:565
111391260,0ptp4l0-21swapper/512:11:425
111391260,0ptp4l0-21swapper/509:55:145
111391260,0ptp4l0-21swapper/412:11:194
111391260,0ptp4l0-21swapper/412:01:394
111391260,0ptp4l0-21swapper/411:34:504
111391260,0ptp4l0-21swapper/312:24:353
111391260,0ptp4l0-21swapper/112:29:301
111391260,0ptp4l0-21swapper/111:47:221
111391260,0ptp4l0-21swapper/111:11:401
111391260,0ptp4l0-21swapper/110:22:551
111391260,0ptp4l0-21swapper/109:47:311
111391260,0ptp4l0-21swapper/012:26:340
111391260,0ptp4l0-21swapper/011:13:050
111391260,0ptp4l0-21swapper/009:10:130
111391250,7ptp4l0-21swapper/408:22:044
111391250,1ptp4l745-21gdbus11:39:590
111391250,1ptp4l6381-21/usr/sbin/munin07:50:155
111391250,1ptp4l484-21latency_hist08:50:015
111391250,1ptp4l30711-21fw_conntrack11:50:114
111391250,1ptp4l1891499cyclictest10:34:541
111391250,1ptp4l16353-21fw_forwarded_lo12:15:130
111391250,0ptp4l0-21swapper/712:23:517
111391250,0ptp4l0-21swapper/512:26:475
111391250,0ptp4l0-21swapper/511:40:155
111391250,0ptp4l0-21swapper/511:11:475
111391250,0ptp4l0-21swapper/510:35:045
111391250,0ptp4l0-21swapper/509:47:025
111391250,0ptp4l0-21swapper/412:08:444
111391250,0ptp4l0-21swapper/411:55:324
111391250,0ptp4l0-21swapper/411:45:314
111391250,0ptp4l0-21swapper/410:41:544
111391250,0ptp4l0-21swapper/410:41:544
111391250,0ptp4l0-21swapper/410:33:384
111391250,0ptp4l0-21swapper/410:20:224
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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