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2025-11-02 - 14:39

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #c, slot #8

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 50 highest latencies:
System rackcslot8s.osadl.org (updated Sun Nov 02, 2025 00:46:09)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2164626151,6sleep70-21swapper/719:08:297
114091610,30ptp4l0-21swapper/119:08:531
114091610,30ptp4l0-21swapper/019:08:540
114091600,5ptp4l0-21swapper/419:05:364
2100125935,9sleep50-21swapper/519:05:225
167132590,0sleep00-21swapper/022:41:190
2120915837,6phc2sys0-21swapper/619:09:436
2165025735,7sleep20-21swapper/219:08:322
203972570,0sleep70-21swapper/700:15:237
87512560,0sleep60-21swapper/621:46:066
2171525645,6sleep30-21swapper/319:09:213
179972560,0sleep10-21swapper/121:15:171
114091360,0ptp4l0-21swapper/123:05:451
114091340,1ptp4l28938-21sh22:15:031
114091340,0ptp4l0-21swapper/520:10:225
114091330,1ptp4l5577-21sensors_fan23:10:205
114091330,1ptp4l17891-21latency21:15:175
114091320,1ptp4l15444-21hddtemp_smartct00:10:141
114091320,0ptp4l0-21swapper/522:45:175
114091310,0ptp4l0-21swapper/522:15:035
114091310,0ptp4l0-21swapper/123:25:171
114091310,0ptp4l0-21swapper/122:50:391
114091310,0ptp4l0-21swapper/119:45:171
114091300,0ptp4l0-21swapper/521:51:325
114091300,0ptp4l0-21swapper/521:11:145
114091300,0ptp4l0-21swapper/122:35:231
114091300,0ptp4l0-21swapper/122:05:141
114091290,0ptp4l0-21swapper/522:50:225
114091290,0ptp4l0-21swapper/422:15:144
114091290,0ptp4l0-21swapper/223:20:192
114091290,0ptp4l0-21swapper/100:34:061
114091280,0ptp4l0-21swapper/623:24:106
114091280,0ptp4l0-21swapper/522:10:425
114091280,0ptp4l0-21swapper/321:20:423
114091280,0ptp4l0-21swapper/321:20:413
114091280,0ptp4l0-21swapper/123:46:081
114091280,0ptp4l0-21swapper/121:35:141
114091280,0ptp4l0-21swapper/100:38:491
114091280,0ptp4l0-21swapper/021:19:330
114091270,0ptp4l0-21swapper/523:03:565
114091270,0ptp4l0-21swapper/521:30:475
114091270,0ptp4l0-21swapper/423:14:204
114091270,0ptp4l0-21swapper/400:37:264
114091270,0ptp4l0-21swapper/123:43:061
114091270,0ptp4l0-21swapper/121:44:061
114091270,0ptp4l0-21swapper/121:31:251
114091260,1ptp4l6544-21cut20:55:124
114091260,1ptp4l28929-21grep19:20:204
114091260,0ptp4l0-21swapper/623:47:016
114091260,0ptp4l0-21swapper/523:15:185
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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