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2026-06-19 - 05:30
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot0.osadl.org (updated Fri Jun 19, 2026 00:45:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
27388992417,6cyclictest0-21swapper/000:35:000
2738899233,19cyclictest0-21swapper/000:30:010
27389992219,2cyclictest13854-21if_lxdbr021:35:161
2738899220,21cyclictest870-21systemd-logind21:23:510
2739099212,18cyclictest8209-21fschecks_time21:25:172
2738999210,18cyclictest0-21swapper/119:49:141
2738899212,18cyclictest101rcuc/023:06:000
27388992117,3cyclictest547-21munin-run21:15:010
2739099204,2cyclictest8253-21processes22:20:202
2738999206,12cyclictest0-21swapper/100:30:161
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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