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2026-07-09 - 15:32
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot0.osadl.org (updated Thu Jul 09, 2026 12:45:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
18338992119,1cyclictest21-21ksoftirqd/109:25:271
1833799213,2cyclictest3987-21H222:10:210
18339992014,4cyclictest0-21swapper/211:50:102
1833999200,15cyclictest0-21swapper/212:15:102
18337992018,1cyclictest9-21ksoftirqd/012:10:100
18337992017,2cyclictest18586-21latency10:00:170
18337992014,3cyclictest0-21swapper/012:20:130
1833999192,16cyclictest28542-21apache208:25:012
1833999190,16cyclictest3985-21H222:10:212
18338991916,2cyclictest25339-21nfsd407:20:181
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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