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2026-08-10 - 18:57
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot0.osadl.org (updated Mon Aug 10, 2026 12:45:59)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2210499253,21cyclictest0-21swapper/208:23:012
2210499232,2cyclictest30850-21chrt09:19:112
2210499230,3cyclictest12965-21sed11:39:002
2210499230,2cyclictest7722-21expr09:35:122
2210499230,2cyclictest6225-21chrt10:28:152
2210499230,2cyclictest20916-21expr10:55:122
2210499230,2cyclictest1786-21basename10:20:142
2210499230,16cyclictest15957-21idleruntime-cro09:50:012
2210299230,5cyclictest0-21swapper/011:17:100
2210499222,1cyclictest0-21swapper/209:01:052
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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