You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2025-12-27 - 04:06
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot0.osadl.org (updated Sat Dec 27, 2025 00:46:00)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3881992414,9cyclictest21-21ksoftirqd/121:08:431
388099241,18cyclictest0-21swapper/000:30:000
3882992118,2cyclictest28630-21sed19:55:012
388099214,16cyclictest0-21swapper/021:09:550
388299202,2cyclictest3987-21H222:10:212
3882992018,1cyclictest0-21swapper/200:30:142
388099203,2cyclictest32272-21apt-key23:50:000
388099203,16cyclictest27190-21latency21:45:170
388099202,16cyclictest0-21swapper/000:24:570
3880992017,2cyclictest9-21ksoftirqd/000:05:000
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional