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2026-09-06 - 12:12
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot0.osadl.org (updated Sun Sep 06, 2026 00:46:01)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
11493992513,6cyclictest0-21swapper/223:15:172
11493992220,1cyclictest4035-21H222:10:212
11493992119,1cyclictest16695-21ntp_kernel_pll_21:10:182
11492992114,6cyclictest0-21swapper/121:50:201
11492992114,6cyclictest0-21swapper/121:50:191
1149199210,19cyclictest399-20systemd-journal20:00:090
1149399203,2cyclictest6060-21latency_hist21:50:002
1149399202,2cyclictest30246-21grep22:30:212
1149299209,10cyclictest0-21swapper/123:00:141
1149199203,16cyclictest3976-21H222:10:210
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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