You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-05-29 - 19:23
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot0.osadl.org (updated Fri May 29, 2026 12:45:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
116099242,4cyclictest0-21swapper/008:20:010
116199230,22cyclictest0-21swapper/111:52:331
116299213,2cyclictest24707-21timerwakeupswit12:00:212
1162992016,3cyclictest0-21swapper/207:12:522
116199202,17cyclictest0-21swapper/110:00:131
1161992017,2cyclictest3985-21H222:10:211
1161992017,2cyclictest0-21swapper/111:00:191
1161992017,2cyclictest0-21swapper/108:15:011
116099204,15cyclictest0-21swapper/010:40:140
116099203,11cyclictest0-21swapper/007:33:230
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional