You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-08-19 - 11:46
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot0.osadl.org (updated Wed Aug 19, 2026 00:45:58)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3016899370,36cyclictest14505-21snapd19:43:140
3017799246,15cyclictest0-21swapper/219:20:172
3017799236,15cyclictest0-21swapper/219:40:182
3017399230,18cyclictest25859-21fschecks_time20:55:161
3016899230,5cyclictest0-21swapper/022:42:100
3017799210,17cyclictest0-21swapper/222:42:202
30177992016,1cyclictest0-21swapper/221:57:512
3017399205,14cyclictest0-21swapper/120:05:181
3017399205,14cyclictest0-21swapper/120:05:181
30168992018,1cyclictest0-21swapper/000:40:010
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional