You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-06-06 - 04:59
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot0.osadl.org (updated Sat Jun 06, 2026 00:45:59)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2110993015,1cyclictest0-21swapper/223:20:152
2105992927,2cyclictest0-21swapper/121:20:131
2105992625,0cyclictest0-21swapper/121:32:421
2110992524,0cyclictest0-21swapper/219:15:162
2110992515,10cyclictest0-21swapper/222:40:152
2110992320,2cyclictest12187-21cat22:15:162
211099230,22cyclictest0-21swapper/220:35:132
210099220,4cyclictest0-21swapper/022:35:010
210099220,4cyclictest0-21swapper/022:35:010
2110992117,3cyclictest0-21swapper/200:10:012
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional