You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-09-20 - 23:48
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot0.osadl.org (updated Sun Sep 20, 2026 12:45:58)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1372399374,17cyclictest455-21plymouthd09:48:401
13724992017,2cyclictest4414-21timerwakeupswit11:30:212
13723992015,4cyclictest6475-21grep11:35:171
1372499193,15cyclictest877-21http_loadtime09:35:182
13724991917,1cyclictest28-21ksoftirqd/211:26:482
13724991917,1cyclictest16670-21cat08:10:182
13724991917,1cyclictest0-21swapper/208:34:092
13724991915,3cyclictest0-21swapper/212:15:562
13724991914,3cyclictest27931-21python310:25:002
13724991914,2cyclictest17804-21fschecks_time10:05:142
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional