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2026-08-14 - 06:39
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot0.osadl.org (updated Fri Aug 14, 2026 00:45:55)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1479099310,30cyclictest0-21swapper/120:55:151
14785992828,0cyclictest0-21swapper/020:40:210
14790992715,7cyclictest15680-21sessionclean20:09:011
1479099244,2cyclictest19231-21sh22:09:011
1479099242,2cyclictest11337-21chrt23:49:061
1478599246,15cyclictest0-21swapper/021:47:250
1478599240,24cyclictest0-21swapper/000:30:160
1479599230,20cyclictest0-21swapper/223:06:172
14790992314,8cyclictest10966-21sort21:55:011
1479099230,2cyclictest20808-21sed22:10:171
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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