You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-08-05 - 22:02
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot0.osadl.org (updated Wed Aug 05, 2026 12:45:59)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
8463992414,1cyclictest0-21swapper/207:13:272
846399240,19cyclictest0-21swapper/211:00:002
845899242,21cyclictest0-21swapper/108:35:111
8458992413,3cyclictest0-21swapper/111:00:001
845799241,2cyclictest0-21swapper/010:40:180
845799241,2cyclictest0-21swapper/010:40:180
845799240,0cyclictest0-21swapper/009:58:380
846399230,5cyclictest0-21swapper/212:05:282
846399230,5cyclictest0-21swapper/208:47:062
8458992317,5cyclictest0-21swapper/112:09:211
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional