You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-07-14 - 01:53
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot0.osadl.org (updated Mon Jul 13, 2026 12:45:59)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
32009992725,2cyclictest0-21swapper/110:44:311
32009992523,2cyclictest21-21ksoftirqd/111:00:431
32009992522,1cyclictest14655-21chrt11:22:591
3201299237,15cyclictest22846-21perf07:50:012
32009992213,0cyclictest0-21swapper/111:15:591
32008992222,0cyclictest0-21swapper/012:30:170
32012992114,4cyclictest425-21nvmesmart_nvme008:05:212
3201299210,20cyclictest843-21systemd-network12:33:212
3200999210,20cyclictest14499-21snapd10:57:491
3200899213,16cyclictest1887-21nfsd409:05:170
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional