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2025-11-26 - 12:08
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot0.osadl.org (updated Wed Nov 26, 2025 00:45:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
10263992715,7cyclictest3642-21chrt21:49:321
1026399240,17cyclictest3275-21cat19:55:011
1026899236,11cyclictest0-21swapper/220:55:162
1026399232,6cyclictest15233-21date22:10:011
1026399230,8cyclictest10991-21grep20:05:171
1026399230,4cyclictest13711-21grep20:10:221
1026399230,3cyclictest28389-21awk19:40:181
1026399230,2cyclictest9410-21kernelversion21:00:191
1026399230,2cyclictest23809-21grep23:20:161
1026399230,2cyclictest13605-21chrt23:00:361
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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