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2026-06-14 - 10:43
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot0.osadl.org (updated Sun Jun 14, 2026 00:46:03)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
835299253,16cyclictest30569-21expr20:45:122
835299250,5cyclictest0-21swapper/220:52:492
835299250,24cyclictest843-21systemd-network19:14:442
835299240,18cyclictest30480-21cut23:35:182
834799244,2cyclictest0-21swapper/122:22:591
835299239,10cyclictest28774-21postgres21:38:102
8352992318,4cyclictest4035-21H222:10:212
835299230,2cyclictest27765-21expr20:40:152
835299230,22cyclictest0-21swapper/220:37:092
835299230,17cyclictest18602-21if_lxdbr000:10:192
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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