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2025-08-21 - 21:30
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot0.osadl.org (updated Thu Aug 21, 2025 12:45:54)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2113299252,22cyclictest12671-21chrt09:42:520
2113499230,22cyclictest0-21swapper/208:38:342
2113399230,5cyclictest0-21swapper/108:53:141
2113299232,2cyclictest12647-21cat10:40:180
2113299232,1cyclictest0-21swapper/010:20:040
21132992314,2cyclictest27059-21munin-run12:05:010
21132992314,1cyclictest0-21swapper/010:55:200
21132992312,1cyclictest0-21swapper/012:26:580
2113299231,16cyclictest27850-21kernelversion07:20:180
2113299230,16cyclictest3568-21proc_pri11:20:190
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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