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2026-01-15 - 16:31
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rackdslot0.osadl.org (updated Thu Jan 15, 2026 12:45:55)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2620799263,5cyclictest0-21swapper/010:55:000
2620799252,22cyclictest0-21swapper/009:40:250
2620799240,2cyclictest1177-21apache_accesses11:10:120
2620899230,22cyclictest843-21systemd-network12:03:511
2620799232,20cyclictest19655-21ls09:45:200
2620799230,2cyclictest4585-21cat11:15:120
2620799230,2cyclictest12183-21cpu09:35:100
2620799230,1cyclictest0-21swapper/007:31:000
2620799222,1cyclictest228152sleep011:45:470
26207992216,5cyclictest0-21swapper/010:15:190
26207992214,7cyclictest29997-21ls07:15:150
26207992214,7cyclictest25566-21vmstat09:55:220
26207992214,7cyclictest10556-21perf10:30:000
2620799220,3cyclictest28157-21cat07:10:210
2620799220,2cyclictest8153-21cut10:25:020
2620799220,2cyclictest31721-21ls09:10:190
2620799220,2cyclictest3063-21anvil09:20:160
2620799220,2cyclictest16607-21ntp_states11:35:160
2620799220,2cyclictest0-21swapper/008:27:140
2620799220,21cyclictest2959-21cpu07:25:120
2620799220,1cyclictest0-21swapper/009:30:130
2620799220,1cyclictest0-21swapper/008:50:140
2620799220,1cyclictest0-21swapper/008:25:000
2620899217,13cyclictest0-21swapper/108:12:341
2620799219,6cyclictest0-21swapper/010:00:190
2620799212,1cyclictest161072chrt10:39:400
26207992114,6cyclictest20401-21cat10:45:150
26207992114,6cyclictest0-21swapper/008:08:410
2620799210,2cyclictest6888-21ps12:15:190
2620799210,2cyclictest29434-21expr12:00:130
2620799210,2cyclictest23667-21cut09:00:000
2620799210,2cyclictest21562-21ps07:55:190
2620799210,2cyclictest20119-21seq11:41:060
2620799210,20cyclictest0-21swapper/010:05:120
2620799210,20cyclictest0-21swapper/009:25:120
2620799210,1cyclictest28958-21find09:09:000
2620799210,1cyclictest0-21swapper/012:25:010
2620799210,1cyclictest0-21swapper/009:15:220
2620799210,1cyclictest0-21swapper/009:00:140
2620799210,1cyclictest0-21swapper/008:40:100
2620799210,1cyclictest0-21swapper/008:10:150
2620799210,1cyclictest0-21swapper/008:00:140
2620799210,19cyclictest0-21swapper/010:30:190
2620799210,16cyclictest17221-21gpgv07:50:030
2620799210,15cyclictest4970-21chrt12:14:450
2620799210,15cyclictest31989-21if_enp1s008:15:150
2620799210,15cyclictest0-21swapper/007:37:370
26208992013,3cyclictest0-21swapper/111:13:311
26207992014,5cyclictest0-21swapper/011:05:200
26207992013,6cyclictest0-21swapper/012:30:140
2620799200,1cyclictest3989-21H222:10:210
2620799200,1cyclictest11938-21chrt11:28:250
2620799200,1cyclictest11516-21awk07:40:130
2620799200,1cyclictest0-21swapper/011:30:160
2620799200,1cyclictest0-21swapper/010:40:210
2620799200,1cyclictest0-21swapper/009:50:160
2620799200,1cyclictest0-21swapper/008:35:130
2620799200,1cyclictest0-21swapper/008:30:170
2620799200,19cyclictest26373-21nfsd410:55:190
2620799200,19cyclictest0-21swapper/012:35:150
2620799200,19cyclictest0-21swapper/011:20:140
2620799200,19cyclictest0-21swapper/011:01:430
2620799200,19cyclictest0-21swapper/011:01:430
2620799200,19cyclictest0-21swapper/008:45:200
2620799200,15cyclictest0-21swapper/012:05:160
2620999193,1cyclictest0-21swapper/207:35:192
2620999192,2cyclictest30347-21missed_timers07:15:162
26209991917,1cyclictest25254-21cat11:50:212
26209991916,1cyclictest0-21swapper/210:50:182
26209991914,3cyclictest21400-21cpuspeed_turbos08:55:132
2620999190,18cyclictest0-21swapper/207:35:012
2620999190,16cyclictest4035-21H222:10:212
2620899192,16cyclictest2069-21systemd-udevd09:18:521
26208991915,3cyclictest0-21swapper/111:28:451
26207991914,4cyclictest0-21swapper/011:55:070
26207991913,5cyclictest0-21swapper/011:50:160
26207991911,7cyclictest14828-21df07:45:140
2620799190,0cyclictest0-21swapper/010:10:140
2620999182,15cyclictest0-21swapper/212:39:502
26209991814,3cyclictest5022-21perf12:15:002
2620999181,16cyclictest1517-21lxd11:12:572
2620999180,3cyclictest9753-21grep08:35:002
2620999180,17cyclictest3989-21H222:10:212
2620899182,15cyclictest27237-21chrt10:57:101
2620899182,15cyclictest20467-21chrt08:50:391
26208991816,1cyclictest0-21swapper/111:55:141
26208991814,3cyclictest20752-21grep07:55:141
2620899180,17cyclictest843-21systemd-network12:08:291
26207991813,4cyclictest319732chrt07:20:040
26209991715,1cyclictest27157-21fschecks_count07:10:142
26209991714,2cyclictest9444-21nfsd410:25:182
26209991714,2cyclictest3902-21nfsd410:15:182
26209991714,2cyclictest31233-21ls08:15:132
26209991714,2cyclictest28236-21cstates11:00:132
26209991714,2cyclictest28236-21cstates11:00:132
26209991714,2cyclictest27185-21/usr/sbin/munin08:05:202
26209991714,2cyclictest26453-21grep10:00:122
26209991714,2cyclictest21511-21tune2fs11:45:132
26209991714,2cyclictest16990-21cut08:45:172
26209991714,2cyclictest14101-21/usr/sbin/munin08:40:162
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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