You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-01-21 - 17:12
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rackdslot0.osadl.org (updated Wed Jan 21, 2026 12:46:00)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1284999245,13cyclictest0-21swapper/111:08:491
1284999230,22cyclictest843-21systemd-network09:31:001
1284999230,22cyclictest0-21swapper/111:24:121
1284999220,21cyclictest843-21systemd-network08:50:491
1284899220,21cyclictest843-21systemd-network09:17:050
1285099210,3cyclictest0-21swapper/211:17:172
12849992117,3cyclictest0-21swapper/107:21:381
12849992113,7cyclictest843-21systemd-network10:42:051
1284899210,17cyclictest0-21swapper/010:05:130
1284999203,16cyclictest0-21swapper/110:11:091
1284999200,3cyclictest4035-21H222:10:211
1284899203,1cyclictest0-21swapper/010:53:440
1285099193,15cyclictest28-21ksoftirqd/209:53:292
1285099193,10cyclictest31948-21python312:30:002
1285099192,16cyclictest0-21swapper/208:29:462
12850991916,2cyclictest4099-21H222:10:212
1285099190,2cyclictest4099-21H222:10:212
1285099190,2cyclictest3983-21H222:10:212
1285099190,18cyclictest0-21swapper/208:53:332
1285099190,16cyclictest3987-21H222:10:212
12849991916,2cyclictest4035-21H222:10:211
1284999190,2cyclictest3987-21H222:10:211
12848991919,0cyclictest0-21swapper/012:39:520
12848991917,1cyclictest0-21swapper/011:41:410
12848991917,1cyclictest0-21swapper/007:16:310
12848991915,2cyclictest0-21swapper/011:00:190
1284899190,16cyclictest3981-21H222:10:210
1285099182,15cyclictest28-21ksoftirqd/207:22:352
12850991818,0cyclictest0-21swapper/207:15:162
12850991816,1cyclictest0-21swapper/211:09:032
12850991816,1cyclictest0-21swapper/210:21:032
12850991816,1cyclictest0-21swapper/210:03:412
12850991815,2cyclictest3976-21H222:10:212
12850991815,2cyclictest3440-21smtp07:50:132
12850991815,2cyclictest17743-21chrt12:01:012
12850991814,3cyclictest4099-21H222:10:212
1285099181,16cyclictest0-21swapper/211:00:132
1285099180,2cyclictest3985-21H222:10:212
1285099180,2cyclictest30983-21cpuspeed_turbos09:35:132
1285099180,2cyclictest14621-21sshd08:09:292
1285099180,1cyclictest0-21swapper/208:21:332
1285099180,1cyclictest0-21swapper/208:21:332
1285099180,17cyclictest3991-21H222:10:212
1285099180,17cyclictest1484-21snapd07:55:052
1285099180,17cyclictest1484-21snapd07:55:042
1285099180,17cyclictest0-21swapper/211:56:102
1285099180,16cyclictest4099-21H222:10:212
1285099180,16cyclictest3989-21H222:10:212
1284999183,11cyclictest27255-21latency_hist09:30:011
1284999182,15cyclictest3985-21H222:10:211
12849991815,2cyclictest4035-21H222:10:211
12849991815,1cyclictest0-21swapper/107:48:131
12849991813,2cyclictest3981-21H222:10:211
1284999180,2cyclictest3989-21H222:10:211
1284999180,2cyclictest3987-21H222:10:211
1284999180,2cyclictest3976-21H222:10:211
1284999180,15cyclictest3983-21H222:10:211
12848991816,1cyclictest9-21ksoftirqd/009:42:080
12848991816,1cyclictest0-21swapper/011:40:010
12848991815,2cyclictest9-21ksoftirqd/008:51:460
12848991814,3cyclictest0-21swapper/012:10:200
12848991814,3cyclictest0-21swapper/008:59:310
12848991814,1cyclictest3985-21H222:10:210
1284899180,3cyclictest31729-21proxymap12:28:200
1284899180,2cyclictest3979-21H222:10:210
1284899180,17cyclictest3985-21H222:10:210
1284899180,16cyclictest0-21swapper/008:40:170
12850991714,2cyclictest7184-21idleruntime10:45:162
12850991714,2cyclictest3991-21H222:10:212
12850991714,2cyclictest3981-21H222:10:212
12850991714,2cyclictest3981-21H222:10:212
12850991714,2cyclictest1-21systemd12:08:592
12850991714,2cyclictest11361-21ls09:00:142
12850991713,3cyclictest24491-21apache_processe07:30:122
1285099171,15cyclictest0-21swapper/209:40:432
1285099170,2cyclictest3985-21H222:10:212
1285099170,2cyclictest3727-21cpuspeed_turbos10:40:122
1285099170,2cyclictest30819-21if_eno110:30:162
1285099170,2cyclictest29953-21pzem_current11:25:202
1285099170,2cyclictest22613-21kernelversion09:20:152
1285099170,2cyclictest17060-21cat09:10:162
1285099170,1cyclictest0-21swapper/211:32:282
1285099170,16cyclictest9827-21idleruntime08:00:142
1285099170,16cyclictest8446-21df_inode08:55:142
1285099170,16cyclictest417-21expr12:30:142
1285099170,16cyclictest3985-21H222:10:212
1285099170,16cyclictest3979-21H222:10:212
1285099170,16cyclictest30338-21cpuspeed_turbos07:40:152
1285099170,16cyclictest29475-21find07:39:002
1285099170,16cyclictest25233-21needreboot12:15:172
1285099170,16cyclictest21658-21which07:25:012
1285099170,16cyclictest21109-21iwlist11:10:142
1285099170,16cyclictest1525-21lxd12:12:422
1285099170,16cyclictest14456-21grep07:10:162
1285099170,16cyclictest11155-21if_lxdbr011:50:162
1285099170,16cyclictest11155-21if_lxdbr011:50:152
1285099170,16cyclictest0-21swapper/209:10:002
1285099170,15cyclictest0-21swapper/208:36:222
1284999172,1cyclictest0-21swapper/112:25:141
1284999172,14cyclictest21-21ksoftirqd/108:58:331
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional