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2026-05-14 - 02:36
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot0.osadl.org (updated Wed May 13, 2026 12:45:55)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
6166992314,8cyclictest0-21swapper/009:43:560
616699230,5cyclictest0-21swapper/012:01:000
616699230,18cyclictest0-21swapper/011:25:120
616699220,21cyclictest0-21swapper/009:10:040
6168992110,11cyclictest0-21swapper/208:50:152
616899210,20cyclictest843-21systemd-network11:38:412
616899210,16cyclictest3664-21nfsd408:00:192
6167992113,4cyclictest0-21swapper/110:53:091
616699214,2cyclictest17189-21passwd08:25:010
616899204,15cyclictest0-21swapper/208:47:202
616699204,15cyclictest0-21swapper/008:48:470
6166992020,0cyclictest0-21swapper/011:00:150
6166992017,2cyclictest4035-21H222:10:210
616699201,4cyclictest10999-21grep07:15:200
616699201,4cyclictest10999-21grep07:15:190
616699200,18cyclictest6399-21nfsd409:00:180
616699200,0cyclictest0-21swapper/011:50:150
6168991917,1cyclictest0-21swapper/209:20:132
6168991915,3cyclictest0-21swapper/211:25:182
616899191,16cyclictest21207-21grep10:25:132
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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