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2026-05-05 - 09:50
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot0.osadl.org (updated Tue May 05, 2026 00:45:58)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
22852992322,0cyclictest0-21swapper/021:55:180
2286199220,4cyclictest6491-21nfsd419:35:182
2285299221,4cyclictest5027-21cstates23:25:160
2285299221,4cyclictest5027-21cstates23:25:150
22852992117,3cyclictest0-21swapper/023:30:020
2286199200,19cyclictest843-21systemd-network21:55:572
2285299200,1cyclictest0-21swapper/023:50:120
2286199193,2cyclictest25295-21date23:05:002
2286199192,16cyclictest10336-21chrt19:44:232
22861991917,1cyclictest13351-21ntp_offset22:40:162
22861991916,2cyclictest6984-21chrt23:29:042
22861991916,2cyclictest6984-21chrt23:29:042
22861991916,2cyclictest20187-21mailstats23:50:202
22861991916,2cyclictest14947-21expr21:45:202
22861991911,4cyclictest0-21swapper/219:19:212
2285699193,1cyclictest0-21swapper/120:28:231
2285699192,16cyclictest31000-21smtpd19:21:231
22856991917,1cyclictest21-21ksoftirqd/100:15:051
2285699191,3cyclictest0-21swapper/122:00:191
2285699190,18cyclictest0-21swapper/122:13:061
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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