You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-02-21 - 13:44
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot0.osadl.org (updated Sat Feb 21, 2026 00:46:03)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
22402992416,7cyclictest29012-21mii-tool19:20:152
2240299232,15cyclictest7869-21nfsd400:25:162
2240299231,15cyclictest318172sleep220:21:172
2240299230,16cyclictest25937-21munin-plugin-st23:05:012
2240299230,16cyclictest24220-21awk21:05:172
22402992214,2cyclictest32096-21timerandwakeup00:10:212
22402992214,2cyclictest20501-21proc_pri23:50:192
22402992214,2cyclictest16691-21nfsd419:55:172
2240299220,21cyclictest843-21systemd-network19:53:032
2240299220,16cyclictest993-21dbus-daemon19:38:592
2240299220,16cyclictest0-21swapper/220:30:202
2240299220,15cyclictest3401-21latency_hist00:20:002
2240299220,15cyclictest19088-21sendmail_mailtr20:55:212
2240099222,17cyclictest0-21swapper/023:16:250
22400992219,2cyclictest24946-21fschecks_count20:10:130
22402992114,6cyclictest0-21swapper/221:20:142
22402992114,2cyclictest13935-21cat23:40:122
22402992114,1cyclictest7164-21idleruntime22:30:152
22402992114,1cyclictest225322sleep221:04:492
22402992114,1cyclictest0-21swapper/200:20:152
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional