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2026-08-14 - 00:18
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot0.osadl.org (updated Thu Aug 13, 2026 12:45:58)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3276799280,23cyclictest0-21swapper/108:33:311
3276799264,4cyclictest0-21swapper/108:13:531
32767992624,2cyclictest0-21swapper/108:20:151
30699241,5cyclictest0-21swapper/209:23:382
3276799230,22cyclictest4099-21H222:10:211
3276799230,22cyclictest32548-21dpkg11:51:151
3276799230,16cyclictest6010-21taskset12:00:311
32767992216,5cyclictest0-21swapper/109:24:021
32767992214,7cyclictest0-21swapper/109:40:181
3276799221,20cyclictest27372-21nfsd410:45:171
3276799220,2cyclictest23642-21sed08:45:161
3276799220,2cyclictest21635-21switchtime08:40:211
3276799220,2cyclictest19300-21sort12:25:161
3276799220,2cyclictest17976-21sed11:25:211
3276799220,2cyclictest15972-21cut11:25:011
3276799220,21cyclictest9861-21ls10:15:141
3276799220,21cyclictest9175-21strings11:10:171
3276799220,21cyclictest20298-21munin-run10:35:011
3276799220,21cyclictest1918-21kernelversion11:55:161
3276799220,21cyclictest15651-21wc07:35:161
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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