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2026-01-11 - 20:00
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot0.osadl.org (updated Sun Jan 11, 2026 12:45:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
28556993030,0cyclictest0-21swapper/210:35:152
2855599240,23cyclictest455-21plymouthd10:30:151
28554992214,4cyclictest0-21swapper/010:13:450
2855599213,15cyclictest0-21swapper/109:37:501
2855599212,16cyclictest0-21swapper/109:10:011
28555992117,3cyclictest0-21swapper/111:52:541
28555992117,3cyclictest0-21swapper/111:34:121
28556992017,2cyclictest0-21swapper/207:54:482
2855599203,16cyclictest0-21swapper/109:00:581
28555992016,3cyclictest0-21swapper/112:15:111
28555992016,3cyclictest0-21swapper/110:17:071
2855599200,17cyclictest0-21swapper/110:37:331
2855499203,13cyclictest8472-21munin-run12:20:010
2855699193,1cyclictest18368-21expr08:45:142
2855699193,15cyclictest0-21swapper/210:53:032
2855699191,17cyclictest863-21avahi-daemon11:50:212
2855699190,3cyclictest3979-21H222:10:212
2855699190,16cyclictest3981-21H222:10:212
2855599192,3cyclictest0-21swapper/107:26:561
2855599192,2cyclictest5342-21awk11:10:181
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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