You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-07-23 - 23:03
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rackdslot0.osadl.org (updated Thu Jul 23, 2026 12:45:55)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1945399231,7cyclictest13902-21fschecks_time11:45:142
1945399230,20cyclictest0-21swapper/208:12:562
1945299234,18cyclictest0-21swapper/109:59:471
19453992214,4cyclictest0-21swapper/208:45:022
1945399220,3cyclictest21729-21cut10:05:132
1945399214,1cyclictest0-21swapper/209:25:522
1945399214,16cyclictest0-21swapper/212:40:012
1945399210,20cyclictest25848-21cut07:20:152
1945299210,19cyclictest28544-21df07:25:141
19453992017,2cyclictest21033-21missed_timers09:05:172
19452992017,2cyclictest3987-21H222:10:211
1945399193,15cyclictest25673-21proc_pri12:05:202
1945399193,15cyclictest0-21swapper/208:27:532
1945399192,3cyclictest0-21swapper/208:08:392
1945399192,2cyclictest22535-21chrt11:04:152
1945399192,1cyclictest0-21swapper/209:19:032
1945399192,16cyclictest0-21swapper/209:00:372
19453991916,2cyclictest27666-21grep08:20:182
19453991915,3cyclictest0-21swapper/211:55:132
1945399191,3cyclictest0-21swapper/210:10:222
1945399191,17cyclictest0-21swapper/211:32:302
1945399190,4cyclictest3450-21gsd-color10:30:212
1945399190,2cyclictest3991-21H222:10:212
1945399190,18cyclictest2451-21cut11:25:152
1945399190,18cyclictest0-21swapper/207:52:452
1945399190,16cyclictest3989-21H222:10:212
1945299193,15cyclictest21-21ksoftirqd/109:12:201
1945299190,1cyclictest0-21swapper/111:06:031
1945299190,16cyclictest3991-21H222:10:211
1945299190,16cyclictest3987-21H222:10:211
1945299190,16cyclictest3985-21H222:10:211
1945199192,16cyclictest3987-21H222:10:210
19451991917,1cyclictest0-21swapper/009:57:380
19451991914,4cyclictest426-21systemd-udevd08:18:520
19451991914,4cyclictest31846-21munin-plugin-st08:30:000
1945199190,2cyclictest0-21swapper/011:51:590
1945199190,17cyclictest3989-21H222:10:210
1945199190,16cyclictest4099-21H222:10:210
1945199190,16cyclictest4035-21H222:10:210
1945199190,16cyclictest3981-21H222:10:210
1945199190,16cyclictest3976-21H222:10:210
1945199190,16cyclictest3976-21H222:10:210
1945399183,1cyclictest28-21ksoftirqd/208:15:152
1945399182,15cyclictest17391-21open_inodes11:50:182
1945399182,15cyclictest14879-21cpuspeed_turbos10:50:132
1945399182,15cyclictest11005-21cat11:40:152
1945399182,15cyclictest0-21swapper/212:10:192
1945399182,15cyclictest0-21swapper/211:38:282
19453991816,1cyclictest0-21swapper/207:11:492
19453991814,2cyclictest0-21swapper/212:20:192
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional