You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-08-12 - 09:56
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rackdslot0.osadl.org (updated Wed Aug 12, 2026 00:45:54)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3033499304,8cyclictest0-21swapper/000:09:160
3033699230,20cyclictest11190-21nfsd421:25:202
3033699224,17cyclictest0-21swapper/219:42:562
3033699223,18cyclictest0-21swapper/220:40:182
30335992213,5cyclictest0-21swapper/121:18:501
3033599220,21cyclictest843-21systemd-network20:20:421
3033599220,17cyclictest30939-21cpuspeed_turbos23:00:111
30334992217,5cyclictest0-21swapper/022:10:010
30335992119,1cyclictest21-21ksoftirqd/122:35:281
30335992111,9cyclictest0-21swapper/121:55:091
3033599210,4cyclictest0-21swapper/123:18:561
3033499214,16cyclictest2462-21cpuspeed_turbos20:15:150
3033699202,17cyclictest0-21swapper/219:19:122
3033699200,19cyclictest0-21swapper/221:45:002
3033599204,1cyclictest0-21swapper/100:32:321
3033499204,15cyclictest0-21swapper/023:53:000
3033499202,3cyclictest0-21swapper/023:25:000
3033699193,15cyclictest28-21ksoftirqd/221:15:152
3033699192,1cyclictest0-21swapper/223:40:272
3033699192,16cyclictest4035-21H222:10:212
30336991917,1cyclictest0-21swapper/223:11:052
30336991917,1cyclictest0-21swapper/221:55:092
30336991913,5cyclictest32236-21ntp_kernel_pll_21:05:212
3033699191,16cyclictest7079-21latency00:10:162
3033699190,5cyclictest0-21swapper/219:51:052
3033699190,18cyclictest2620-21strings21:10:182
3033599193,15cyclictest3331-21fschecks_count22:10:141
30335991917,1cyclictest21-21ksoftirqd/120:32:291
30335991917,1cyclictest0-21swapper/122:45:121
30335991917,1cyclictest0-21swapper/119:40:211
30335991914,3cyclictest8028-21sshd22:16:151
3033599190,17cyclictest3989-21H222:10:211
3033599190,16cyclictest3989-21H222:10:211
3033499194,14cyclictest0-21swapper/022:35:140
3033499192,2cyclictest3979-21H222:10:210
30334991917,1cyclictest0-21swapper/021:51:410
30334991916,2cyclictest4035-21H222:10:210
30334991916,2cyclictest16416-21latency21:35:170
3033499190,16cyclictest4035-21H222:10:210
3033499190,16cyclictest3991-21H222:10:210
3033499190,16cyclictest3983-21H222:10:210
3033499190,16cyclictest3979-21H222:10:210
3033699182,15cyclictest56172chrt00:09:222
3033699182,15cyclictest28-21ksoftirqd/219:46:542
3033699182,15cyclictest28-21ksoftirqd/219:46:532
30336991815,2cyclictest4099-21H222:10:212
30336991815,2cyclictest0-21swapper/221:30:432
30336991814,3cyclictest4035-21H222:10:212
30336991814,3cyclictest1377-21lxd00:16:382
30336991814,3cyclictest0-21swapper/220:55:532
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional