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2026-01-20 - 00:52
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rackdslot0.osadl.org (updated Mon Jan 19, 2026 12:45:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2364099350,0cyclictest0-21swapper/011:30:150
23640992814,0cyclictest0-21swapper/008:39:220
2364299241,15cyclictest0-21swapper/210:55:082
2364299230,5cyclictest0-21swapper/208:17:252
2364199230,5cyclictest0-21swapper/110:46:531
23640992213,0cyclictest0-21swapper/008:55:170
2364099220,18cyclictest0-21swapper/010:25:060
23642992117,3cyclictest0-21swapper/211:13:132
23642992013,6cyclictest843-21systemd-network11:21:452
2364299200,19cyclictest0-21swapper/209:36:462
2364199203,3cyclictest0-21swapper/108:47:201
2364199200,16cyclictest0-21swapper/109:36:531
2364099203,16cyclictest0-21swapper/009:37:400
23640992018,1cyclictest0-21swapper/007:40:110
2364099201,17cyclictest24015-21grep10:00:140
2364099200,19cyclictest0-21swapper/010:45:400
2364299192,2cyclictest14170-21expr12:35:142
2364299192,16cyclictest993-21dbus-daemon11:35:202
2364299192,16cyclictest18405-21grep07:55:192
2364299192,11cyclictest4154-21apt-config08:30:012
23642991915,2cyclictest3761-21ntp_kernel_pll_10:20:172
2364199192,2cyclictest14792-21latency_hist11:40:001
2364199192,1cyclictest0-21swapper/112:37:051
2364199192,1cyclictest0-21swapper/110:14:021
2364199192,1cyclictest0-21swapper/109:23:401
2364199192,1cyclictest0-21swapper/109:07:461
2364199192,1cyclictest0-21swapper/109:07:461
2364199192,16cyclictest0-21swapper/109:00:011
23641991916,2cyclictest25472-21sed07:10:181
2364199191,2cyclictest0-21swapper/107:45:001
2364199190,4cyclictest26788-21nfsd408:10:171
2364199190,18cyclictest0-21swapper/110:05:011
2364099194,11cyclictest4150-21gpgv08:30:010
2364099192,2cyclictest11316-21cstates12:30:150
2364099192,16cyclictest0-21swapper/010:31:540
2364099192,16cyclictest0-21swapper/007:54:490
23640991917,1cyclictest0-21swapper/012:35:150
23640991917,1cyclictest0-21swapper/009:30:170
23640991917,1cyclictest0-21swapper/009:04:170
23640991916,2cyclictest30652-21grep07:20:180
23640991915,3cyclictest0-21swapper/011:56:290
2364099191,17cyclictest0-21swapper/010:25:000
2364099190,1cyclictest0-21swapper/012:15:120
2364099190,1cyclictest0-21swapper/007:17:490
2364099190,18cyclictest0-21swapper/010:35:180
2364099190,18cyclictest0-21swapper/007:50:010
2364299183,15cyclictest1100-21snmpd09:07:522
2364299183,15cyclictest1100-21snmpd09:07:522
23642991816,1cyclictest0-21swapper/212:20:122
23642991816,1cyclictest0-21swapper/207:17:272
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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