You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2025-12-12 - 18:28
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rackdslot0.osadl.org (updated Fri Dec 12, 2025 00:46:01)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
612999230,5cyclictest0-21swapper/222:34:342
6120992314,5cyclictest0-21swapper/019:22:580
612699223,11cyclictest4565-21PluginScanner23:14:591
612699220,18cyclictest0-21swapper/119:36:041
6120992117,3cyclictest0-21swapper/000:38:150
612999204,9cyclictest0-21swapper/223:40:252
6129992016,1cyclictest0-21swapper/221:52:462
6120992017,2cyclictest4526-21H212:26:330
612999191,17cyclictest0-21swapper/223:15:182
612999190,2cyclictest4581-21H212:26:332
612999190,2cyclictest4523-21H212:26:332
612999190,18cyclictest0-21swapper/221:02:392
612999190,17cyclictest17701-21nvmesmart_nvme022:15:212
612999190,16cyclictest4536-21H212:26:332
6126991917,1cyclictest21-21ksoftirqd/100:29:331
6126991917,1cyclictest0-21swapper/121:17:051
612699190,2cyclictest4581-21H212:26:331
612699190,2cyclictest4536-21H212:26:331
612699190,16cyclictest21496-21cat21:30:001
612099192,16cyclictest14850-21grep22:10:190
6120991917,1cyclictest0-21swapper/021:12:460
612099190,2cyclictest4534-21H212:26:330
612099190,16cyclictest4593-21H212:26:330
612099190,16cyclictest4530-21H212:26:330
612999182,15cyclictest0-21swapper/220:01:372
6129991816,1cyclictest0-21swapper/219:22:452
6129991815,2cyclictest4534-21H212:26:332
6129991814,3cyclictest893-21systemd-logind21:32:082
6129991814,3cyclictest4593-21H212:26:332
6129991814,3cyclictest1011-21nvmesmart_nvme019:55:202
6129991814,2cyclictest4532-21H212:26:332
6129991814,1cyclictest0-21swapper/221:12:172
612999181,2cyclictest997-21thermald20:58:092
612999181,2cyclictest30217-21latency_hist00:35:002
612999181,2cyclictest22090-21nfsd419:35:192
612999181,2cyclictest10345-21cut19:15:192
612999180,3cyclictest414-20systemd-journal20:10:022
612999180,2cyclictest4534-21H212:26:332
612999180,17cyclictest1-21systemd20:39:002
612999180,17cyclictest0-21swapper/219:49:562
612999180,15cyclictest4523-21H212:26:332
612699182,7cyclictest0-21swapper/122:55:221
612699182,7cyclictest0-21swapper/122:55:221
6126991817,1cyclictest21-21ksoftirqd/123:51:561
6126991816,1cyclictest21-21ksoftirqd/119:15:461
6126991816,1cyclictest0-21swapper/120:09:571
6126991814,3cyclictest4526-21H212:26:331
6126991814,3cyclictest4526-21H212:26:331
612699181,16cyclictest4581-21H212:26:331
612699180,2cyclictest4593-21H212:26:331
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional