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2026-06-21 - 17:39
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rackdslot0.osadl.org (updated Sun Jun 21, 2026 12:46:00)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
739999230,5cyclictest0-21swapper/107:11:581
739999230,20cyclictest0-21swapper/110:02:331
739899230,3cyclictest0-21swapper/011:45:470
7399992217,2cyclictest29881-21kernelversion08:45:171
739999214,2cyclictest25581-21ldconfig.real08:40:001
7399992114,3cyclictest0-21swapper/109:28:131
739899214,3cyclictest0-21swapper/008:08:190
740499204,15cyclictest0-21swapper/208:35:172
740499203,2cyclictest15749-21nvmesmart_nvme008:20:212
739999200,5cyclictest399-20systemd-journal12:20:081
739999200,5cyclictest399-20systemd-journal12:20:071
739999200,1cyclictest0-21swapper/111:26:341
739899202,17cyclictest0-21swapper/011:44:200
7398992018,1cyclictest9-21ksoftirqd/009:25:110
7398992018,1cyclictest9-21ksoftirqd/007:29:040
739899201,4cyclictest10167-21grep08:10:180
7398992012,4cyclictest0-21swapper/011:12:080
739899201,16cyclictest7799-21sort09:00:230
739899200,5cyclictest0-21swapper/008:35:190
739899200,18cyclictest0-21swapper/011:18:330
740499193,15cyclictest28-21ksoftirqd/209:21:092
7404991917,1cyclictest0-21swapper/211:43:492
7404991914,2cyclictest3976-21H222:10:212
7404991914,2cyclictest3976-21H222:10:212
740499190,2cyclictest3989-21H222:10:212
740499190,2cyclictest3985-21H222:10:212
740499190,16cyclictest4099-21H222:10:212
739999192,16cyclictest15896-21ntp_offset09:15:171
7399991914,3cyclictest0-21swapper/110:47:021
739999190,2cyclictest3989-21H222:10:211
739999190,18cyclictest3976-21H222:10:211
739999190,16cyclictest3976-21H222:10:211
739999190,16cyclictest1027-21wpa_supplicant09:36:551
7398991917,1cyclictest0-21swapper/010:51:570
7398991917,1cyclictest0-21swapper/008:41:100
7398991916,2cyclictest3991-21H222:10:210
739899190,16cyclictest4099-21H222:10:210
739899190,16cyclictest3989-21H222:10:210
7404991816,1cyclictest0-21swapper/210:09:222
7404991814,3cyclictest3991-21H222:10:212
7404991814,3cyclictest3976-21H222:10:212
7404991814,2cyclictest3989-21H222:10:212
7404991814,2cyclictest3979-21H222:10:212
740499180,2cyclictest4099-21H222:10:212
740499180,2cyclictest3989-21H222:10:212
740499180,2cyclictest3983-21H222:10:212
740499180,17cyclictest5953-21cpuspeed_turbos10:55:142
740499180,17cyclictest3983-21H222:10:212
740499180,17cyclictest3983-21H222:10:212
740499180,16cyclictest3989-21H222:10:212
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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