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2026-06-25 - 21:44
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rackdslot0.osadl.org (updated Thu Jun 25, 2026 12:45:53)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
572799280,0cyclictest0-21swapper/008:15:140
5732992615,11cyclictest0-21swapper/111:43:361
5732992313,0cyclictest0-21swapper/110:42:071
5727992314,0cyclictest0-21swapper/011:11:450
5727992313,10cyclictest0-21swapper/012:33:060
572799230,22cyclictest0-21swapper/008:05:140
573299220,18cyclictest0-21swapper/112:16:261
573299215,2cyclictest4099-21H222:10:211
5727992113,4cyclictest0-21swapper/008:53:390
573699202,2cyclictest3989-21H222:10:212
5736992017,2cyclictest19624-21proc_pri12:15:212
573699200,5cyclictest0-21swapper/208:54:292
573299204,15cyclictest0-21swapper/107:36:111
5732992017,2cyclictest10093-21fschecks_time12:00:141
572799207,7cyclictest9-21ksoftirqd/012:15:000
572799203,16cyclictest26616-21tlsmgr09:12:060
572799201,1cyclictest0-21swapper/011:50:220
573699192,2cyclictest2761-21chrt09:54:242
5736991916,2cyclictest29013-21cat12:35:012
5736991916,2cyclictest22610-21perf07:40:012
5736991916,2cyclictest0-21swapper/211:29:252
5736991914,4cyclictest3985-21H222:10:212
573699191,12cyclictest0-21swapper/210:05:212
573699190,2cyclictest3983-21H222:10:212
573699190,16cyclictest3981-21H222:10:212
573699190,16cyclictest3976-21H222:10:212
573299193,15cyclictest0-21swapper/107:55:411
5732991917,1cyclictest0-21swapper/110:23:261
573299190,2cyclictest3981-21H222:10:211
573299190,16cyclictest3979-21H222:10:211
572799193,15cyclictest20698-21cat08:30:160
572799193,15cyclictest0-21swapper/011:39:420
572799192,16cyclictest21512-21cut09:30:010
5727991917,1cyclictest0-21swapper/012:28:520
5727991916,2cyclictest0-21swapper/009:16:300
5727991914,4cyclictest0-21swapper/011:59:200
572799190,3cyclictest0-21swapper/010:56:450
572799190,18cyclictest0-21swapper/007:55:000
572799190,16cyclictest3981-21H222:10:210
573699182,15cyclictest26189-21cat12:30:002
5736991815,2cyclictest3976-21H222:10:212
5736991815,2cyclictest3840-21cat09:55:142
5736991815,2cyclictest26582-21fschecks_count10:35:132
5736991814,3cyclictest0-21swapper/208:04:062
573699181,16cyclictest21992-21expr09:30:132
573699180,3cyclictest15785-21munin-run09:20:002
573699180,2cyclictest4035-21H222:10:212
573699180,1cyclictest3979-21H222:10:212
573699180,17cyclictest3983-21H222:10:212
573699180,17cyclictest3981-21H222:10:212
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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