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2026-01-29 - 20:41
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rackdslot0.osadl.org (updated Thu Jan 29, 2026 12:45:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
762899220,18cyclictest0-21swapper/012:30:160
7630992117,3cyclictest0-21swapper/211:40:402
7630992117,3cyclictest0-21swapper/208:35:152
762999218,12cyclictest0-21swapper/110:00:201
762999210,1cyclictest0-21swapper/108:30:121
7628992114,6cyclictest870-21systemd-logind08:46:520
762899210,20cyclictest843-21systemd-network08:19:290
7628992014,5cyclictest870-21systemd-logind09:46:510
7630991917,1cyclictest0-21swapper/208:00:152
7630991916,1cyclictest0-21swapper/207:30:192
7630991915,2cyclictest1100-21snmpd09:05:182
762999192,3cyclictest0-21swapper/107:23:541
762999192,16cyclictest0-21swapper/110:11:411
7629991914,4cyclictest0-21swapper/109:10:181
762999191,2cyclictest27269-21nfsd411:30:171
7628991919,0cyclictest0-21swapper/009:51:510
7628991915,1cyclictest0-21swapper/012:05:040
762899190,18cyclictest32676-21perf12:40:000
762899190,18cyclictest0-21swapper/007:27:140
7630991816,1cyclictest0-21swapper/209:45:142
7630991815,2cyclictest27135-21cut11:30:172
7630991814,3cyclictest1523-21lxd11:24:412
7630991814,3cyclictest0-21swapper/208:54:052
763099181,16cyclictest25612-21switchtime10:30:212
763099180,17cyclictest28949-21latency_hist08:45:012
763099180,17cyclictest2007-21systemd-journal07:39:432
763099180,16cyclictest0-21swapper/212:10:132
7629991816,1cyclictest0-21swapper/112:35:091
7629991814,1cyclictest0-21swapper/108:25:011
762999181,2cyclictest18921-21mailstats09:20:201
762999180,17cyclictest19927-21sshd11:18:321
7628991816,1cyclictest0-21swapper/009:25:160
7628991815,1cyclictest0-21swapper/009:32:390
7628991813,1cyclictest0-21swapper/008:59:070
762899181,2cyclictest29258-21fschecks_count11:35:140
7628991810,4cyclictest0-21swapper/010:55:130
762899180,2cyclictest0-21swapper/010:20:150
7630991714,2cyclictest9257-21ls11:00:152
7630991714,2cyclictest4833-21sed10:50:202
7630991714,2cyclictest29960-21expr10:40:142
7630991714,2cyclictest28597-21cpuspeed_turbos09:40:122
7630991714,2cyclictest28597-21cpuspeed_turbos09:40:112
7630991714,2cyclictest27915-21cat12:30:132
7630991714,2cyclictest25075-21expr12:25:132
7630991714,2cyclictest17985-21pzem_energy07:25:212
7630991714,2cyclictest17942-21chrt10:18:512
7630991714,2cyclictest16403-21sed08:20:172
7630991714,2cyclictest1522-21lxd08:32:412
763099171,1cyclictest13014-21chrt12:02:222
763099171,15cyclictest75122chrt11:51:572
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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