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2025-05-02 - 12:49
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rackdslot0.osadl.org (updated Fri May 02, 2025 00:46:05)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
26714992219,2cyclictest20719-21perf20:55:022
2670599220,6cyclictest0-21swapper/019:43:590
26714992119,1cyclictest28-21ksoftirqd/200:01:212
26714992110,10cyclictest0-21swapper/223:15:222
2671099216,14cyclictest0-21swapper/121:45:181
2670599217,13cyclictest0-21swapper/023:30:190
2671499202,3cyclictest0-21swapper/221:55:012
2671099203,11cyclictest17228-21cat21:45:011
2671099200,3cyclictest4593-21H212:26:331
2671099200,19cyclictest823-21systemd-network19:40:101
2670599203,16cyclictest7325-21expr22:20:190
26705992017,2cyclictest4523-21H212:26:330
26705992012,4cyclictest0-21swapper/019:18:440
2671499194,1cyclictest0-21swapper/221:45:182
26714991917,1cyclictest0-21swapper/221:15:182
2671499190,3cyclictest17173-21python321:45:012
2671499190,1cyclictest0-21swapper/221:00:232
26710991915,3cyclictest0-21swapper/123:05:011
2671099190,18cyclictest414-20systemd-journal23:55:001
2671099190,18cyclictest414-20systemd-journal23:55:001
2670599193,15cyclictest4534-21H212:26:330
26705991917,1cyclictest0-21swapper/023:28:570
2670599190,2cyclictest4593-21H212:26:330
2670599190,2cyclictest4534-21H212:26:330
2670599190,18cyclictest0-21swapper/023:43:050
2670599190,16cyclictest4593-21H212:26:330
2670599190,16cyclictest4530-21H212:26:330
2670599190,16cyclictest4523-21H212:26:330
2671499182,1cyclictest0-21swapper/222:42:292
26714991816,1cyclictest0-21swapper/222:15:152
26714991815,2cyclictest4534-21H212:26:332
26714991815,2cyclictest4530-21H212:26:332
26714991814,3cyclictest4523-21H212:26:332
26714991814,3cyclictest4523-21H212:26:332
26714991814,3cyclictest24903-21latency23:50:212
26714991814,3cyclictest24903-21latency23:50:202
26714991814,3cyclictest0-21swapper/200:37:062
2671499181,2cyclictest3707-21lxd20:22:532
2671499181,2cyclictest16117-21chrt22:36:012
2671499181,16cyclictest1086-21snmpd23:45:062
2671499180,17cyclictest5037-21cat20:25:162
2671499180,17cyclictest4995-21cut19:25:202
2671499180,16cyclictest4526-21H212:26:332
2671499180,16cyclictest0-21swapper/219:47:282
2671499180,15cyclictest4581-21H212:26:332
2671499180,15cyclictest4581-21H212:26:332
2671099183,1cyclictest21-21ksoftirqd/122:12:111
2671099182,1cyclictest21-21ksoftirqd/100:00:541
26710991816,1cyclictest0-21swapper/120:30:191
26710991814,3cyclictest4528-21H212:26:331
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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