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2026-09-08 - 14:03
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Tue Sep 08, 2026 00:45:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1758121430,7sleep3566999cyclictest20:45:133
134491880,4ptp4l0-21swapper/020:40:190
258162770,4sleep00-21swapper/021:00:270
134491680,23ptp4l20358-21/usr/sbin/munin19:40:170
134491640,3ptp4l0-21swapper/020:20:150
134491630,4ptp4l0-21swapper/121:55:281
134491610,4ptp4l17791-21perl20:45:151
134491610,16ptp4l0-21swapper/100:30:011
134491600,20ptp4l13728-21ntp_states19:25:232
134491590,3ptp4l32071-21diskstats23:35:140
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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