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2025-12-05 - 04:06
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Fri Dec 05, 2025 00:45:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
427921660,7sleep02022199cyclictest23:10:330
1513221510,6sleep32022499cyclictest22:25:263
2022499722,29cyclictest0-21swapper/321:20:163
2847191690,4ptp4l7327-21diskstats22:10:171
2022199675,23cyclictest2847191ptp4l23:00:160
20224996528,7cyclictest41-21ksoftirqd/320:55:023
2847191640,3ptp4l0-21swapper/123:20:191
20221996313,20cyclictest28696-21mailstats20:35:270
2022199631,26cyclictest22392-21cat19:15:000
20221996310,18cyclictest2656-21date23:10:000
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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