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2026-05-24 - 10:12
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Sun May 24, 2026 00:45:38)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1998021650,2sleep01356299cyclictest00:00:170
127621510,7sleep01356299cyclictest19:50:260
615521370,5sleep21356499cyclictest21:10:282
13563996934,7cyclictest25-21ksoftirqd/121:35:201
13563996932,8cyclictest25-21ksoftirqd/122:05:271
13563996534,3cyclictest25-21ksoftirqd/123:05:011
13563996533,7cyclictest25-21ksoftirqd/121:45:281
134491650,19ptp4l16269-21/usr/sbin/munin21:35:133
13563996430,4cyclictest25-21ksoftirqd/122:10:161
13563996429,4cyclictest25-21ksoftirqd/121:15:151
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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