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2026-05-27 - 16:56
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Wed May 27, 2026 12:45:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
311552680,6sleep1185899cyclictest09:20:221
134491650,4ptp4l24205-21irqrtprio11:25:202
134491650,4ptp4l24205-21irqrtprio11:25:202
134491640,3ptp4l4240-21apt-get07:15:132
13182600,7sleep2185999cyclictest11:45:222
134491590,4ptp4l0-21swapper/111:10:201
134491590,4ptp4l0-21swapper/007:59:560
134491590,3ptp4l0-21swapper/108:00:211
134491580,4ptp4l0-21swapper/107:45:261
134491580,4ptp4l0-21swapper/011:15:240
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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