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2026-07-24 - 03:31
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Fri Jul 24, 2026 00:45:40)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1314221460,6sleep12563899cyclictest21:00:211
2563899708,24cyclictest134491ptp4l21:30:261
265132680,3sleep20-21swapper/219:10:182
25637996227,5cyclictest9-21ksoftirqd/023:45:000
2563899610,24cyclictest26166-21if_enp1s019:10:161
25637996131,6cyclictest9-21ksoftirqd/020:05:180
134491600,4ptp4l0-21swapper/221:30:292
134491600,4ptp4l0-21swapper/022:00:450
134491600,17ptp4l0-21swapper/220:15:162
25637995930,4cyclictest9-21ksoftirqd/019:55:200
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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