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2026-04-26 - 06:19
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Sun Apr 26, 2026 00:45:40)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2143499829,70cyclictest0-21swapper/323:55:243
134491770,5ptp4l22307-21irqstats19:10:201
134491770,5ptp4l22307-21irqstats19:10:201
21434997214,11cyclictest28161-21sshd19:22:073
21434997113,11cyclictest21861-21seq22:36:563
21434996913,13cyclictest5991-21taskset22:04:533
21434996814,11cyclictest5554-21seq20:54:103
21434996814,10cyclictest26500-21seq22:46:353
21434996814,10cyclictest23805-21seq21:31:213
21434996715,10cyclictest26252-21runrttasks21:38:113
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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