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2025-12-15 - 12:38
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Mon Dec 15, 2025 00:45:39)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2822921390,5sleep21137999cyclictest00:20:462
2663021360,3sleep21137999cyclictest22:00:372
134491690,4ptp4l0-21swapper/100:00:361
11380996832,8cyclictest41-21ksoftirqd/321:23:343
11380996329,7cyclictest41-21ksoftirqd/321:02:043
11380996326,4cyclictest41-21ksoftirqd/322:12:453
134491620,18ptp4l0-21swapper/022:30:390
11380996229,4cyclictest41-21ksoftirqd/320:10:063
11380996228,4cyclictest41-21ksoftirqd/300:18:373
134491610,17ptp4l32338-21latency_hist22:14:590
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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