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2026-09-15 - 14:27
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Tue Sep 15, 2026 00:45:39)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1146121640,5sleep1283299cyclictest20:35:241
2834997334,8cyclictest41-21ksoftirqd/321:40:003
134491690,4ptp4l15844-21df_inode23:05:131
2834996826,8cyclictest41-21ksoftirqd/320:54:423
201342670,4sleep020137-21irqrtprio20:55:170
2834996532,4cyclictest41-21ksoftirqd/323:40:153
2834996529,4cyclictest41-21ksoftirqd/319:55:223
2834996527,7cyclictest41-21ksoftirqd/323:15:213
2834996526,4cyclictest41-21ksoftirqd/319:15:273
134491650,20ptp4l0-21swapper/119:10:011
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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