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2026-01-03 - 04:07
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Sat Jan 03, 2026 00:45:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
4191997034,8cyclictest33-21ksoftirqd/223:55:252
134491630,4ptp4l0-21swapper/220:45:012
4190996131,8cyclictest25-21ksoftirqd/121:40:161
134491610,3ptp4l18286-21df19:40:140
4190996032,4cyclictest25-21ksoftirqd/120:50:181
4190996031,7cyclictest25-21ksoftirqd/123:34:591
4190996027,4cyclictest25-21ksoftirqd/121:04:201
4190996027,4cyclictest25-21ksoftirqd/119:52:481
4190995929,4cyclictest25-21ksoftirqd/100:30:211
134491590,4ptp4l0-21swapper/219:10:312
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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