You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-05-06 - 12:52
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Wed May 06, 2026 00:45:38)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
276199670,11cyclictest16397-21cat19:40:002
276199617,7cyclictest0-21swapper/223:10:272
276199608,6cyclictest0-21swapper/220:40:162
276199598,7cyclictest0-21swapper/219:30:262
276199598,7cyclictest0-21swapper/219:30:262
276199597,7cyclictest0-21swapper/200:15:292
276199597,6cyclictest0-21swapper/223:05:212
276199596,7cyclictest0-21swapper/200:35:252
134491590,5ptp4l0-21swapper/219:40:012
134491590,4ptp4l31798-21ntp_states20:10:232
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional