You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-09-20 - 18:45
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Sun Sep 20, 2026 12:45:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
32354997136,9cyclictest25-21ksoftirqd/110:35:001
134491660,5ptp4l41-21ksoftirqd/311:56:483
32354996534,8cyclictest25-21ksoftirqd/110:10:001
32354996432,4cyclictest25-21ksoftirqd/111:25:271
134491640,3ptp4l22461-21memory11:25:210
65902630,5sleep20-21swapper/210:50:252
32354996323,8cyclictest25-21ksoftirqd/110:15:261
134491630,11ptp4l31139-21ntp_states07:05:261
32354996227,7cyclictest25-21ksoftirqd/110:40:141
134491620,29ptp4l25-21ksoftirqd/112:07:071
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional