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2026-04-13 - 16:54
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Mon Apr 13, 2026 12:45:38)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1086222210,7sleep210830-21sh07:09:502
1621521950,5sleep116217-21sh07:08:001
2642121820,6sleep22013599cyclictest07:10:112
873221800,7sleep08730-21od07:07:230
1564021790,6sleep30-21swapper/307:08:593
989521680,6sleep32013699cyclictest07:10:333
1903721640,6sleep02013399cyclictest10:35:240
134491670,3ptp4l8959-21df_inode10:15:161
20135996533,4cyclictest33-21ksoftirqd/212:25:252
20135996529,6cyclictest33-21ksoftirqd/209:55:192
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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