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2026-08-20 - 14:01
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Thu Aug 20, 2026 00:45:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
671999783,30cyclictest2238-21/usr/sbin/munin20:10:132
671999760,73cyclictest27567-21taskset22:10:292
6719997410,62cyclictest0-21swapper/220:05:282
261112670,4sleep2321ktimersoftd/219:50:192
671999650,25cyclictest24770-21taskset19:48:142
134491640,12ptp4l0-21swapper/022:03:150
671999633,57cyclictest0-21swapper/219:20:292
671999629,18cyclictest12142-21latency_hist00:00:002
671999620,27cyclictest30281-21chrt23:28:242
134491620,3ptp4l2026-21ls21:15:270
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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