You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-09-02 - 06:12
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Wed Sep 02, 2026 00:45:34)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2152221450,6sleep23043899cyclictest00:35:272
134491970,4ptp4l0-21swapper/319:31:463
30438995927,6cyclictest33-21ksoftirqd/222:30:172
30438995926,3cyclictest33-21ksoftirqd/219:11:382
30438995922,4cyclictest33-21ksoftirqd/221:42:582
134491590,4ptp4l0-21swapper/121:32:501
134491580,9ptp4l0-21swapper/019:05:100
134491580,4ptp4l0-21swapper/020:55:260
134491580,3ptp4l0-21swapper/123:25:141
134491570,4ptp4l0-21swapper/222:51:572
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional