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2026-07-03 - 10:50
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Fri Jul 03, 2026 00:45:36)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
682521490,7sleep12028499cyclictest19:50:171
2028499740,3cyclictest3005-21/usr/sbin/munin19:40:221
2028499722,31cyclictest0-21swapper/123:00:271
20283996834,6cyclictest9-21ksoftirqd/000:05:290
20283996733,4cyclictest9-21ksoftirqd/000:20:000
20283996733,3cyclictest9-21ksoftirqd/000:35:010
20283996732,6cyclictest9-21ksoftirqd/023:20:290
134491670,5ptp4l9140-21taskset22:15:090
20283996431,6cyclictest9-21ksoftirqd/022:15:000
20283996329,5cyclictest9-21ksoftirqd/021:50:000
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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