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2026-04-24 - 10:10
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Fri Apr 24, 2026 00:45:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1304321500,5sleep12291299cyclictest23:05:151
1448621430,6sleep12291299cyclictest19:12:081
76942810,4sleep37709-21spawn19:11:343
169112690,6sleep12291299cyclictest19:17:261
142652690,4sleep0101ktimersoftd/019:20:180
22914996420,7cyclictest41-21ksoftirqd/319:15:153
165772630,3sleep10-21swapper/123:10:281
138512620,3sleep2311rcuc/219:16:532
134491610,4ptp4l33-21ksoftirqd/219:05:262
134491590,3ptp4l0-21swapper/221:00:202
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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