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2026-04-24 - 22:27
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Fri Apr 24, 2026 12:45:40)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2657699740,36cyclictest29694-21seq11:54:501
2657699652,61cyclictest6068-21kworker/1:008:21:091
134491640,5ptp4l32129-21gpgv12:00:003
284592630,4sleep20-21swapper/208:20:262
2657699630,28cyclictest4231-21chrt12:06:391
2657699620,25cyclictest12480-21mailstats10:05:241
134491620,3ptp4l27367-21fschecks_time08:20:143
134491610,3ptp4l0-21swapper/309:43:113
134491610,15ptp4l7859-21ls09:55:250
2657699600,3cyclictest7214-21sed09:55:171
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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