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2026-01-02 - 02:20
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Thu Jan 01, 2026 12:45:39)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
774321230,6sleep01676999cyclictest11:25:290
1677099831,80cyclictest16290-21kworker/1:107:45:281
1677099831,80cyclictest16290-21kworker/1:107:45:281
134491620,3ptp4l29212-21df08:45:140
134491600,4ptp4l0-21swapper/007:40:260
134491590,3ptp4l31301-21apt-get08:50:122
134491580,4ptp4l0-21swapper/110:55:531
134491580,3ptp4l0-21swapper/310:00:063
16771995720,5cyclictest33-21ksoftirqd/210:15:262
134491570,5ptp4l0-21swapper/107:09:221
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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