You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-07-19 - 18:55
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Sun Jul 19, 2026 12:45:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2999621430,7sleep31542999cyclictest08:50:133
3263121420,4sleep31542999cyclictest10:05:113
315412640,4sleep00-21swapper/010:00:270
134491620,28ptp4l9-21ksoftirqd/009:45:270
134491590,4ptp4l1087-21meminfo11:15:200
134491590,4ptp4l0-21swapper/209:47:442
134491590,3ptp4l3004-21ls07:50:273
134491590,3ptp4l10385-21users08:05:300
134491580,3ptp4l0-21swapper/008:00:250
134491570,3ptp4l0-21swapper/012:20:270
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional