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2026-04-21 - 05:26
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Tue Apr 21, 2026 00:45:39)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
134491730,6ptp4l6544-21/usr/sbin/munin19:05:141
8893996534,3cyclictest25-21ksoftirqd/120:25:181
8893996232,7cyclictest25-21ksoftirqd/123:50:001
8452610,4sleep30-21swapper/321:10:163
8893996029,3cyclictest25-21ksoftirqd/121:40:001
8895995926,3cyclictest41-21ksoftirqd/321:20:013
8893995929,8cyclictest25-21ksoftirqd/123:25:271
8893995926,3cyclictest25-21ksoftirqd/119:50:061
8893995926,3cyclictest25-21ksoftirqd/119:50:061
134491590,4ptp4l0-21swapper/222:44:252
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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