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2026-08-13 - 17:20
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Thu Aug 13, 2026 12:45:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2546699674,61cyclictest0-21swapper/210:20:282
25464996733,6cyclictest9-21ksoftirqd/010:15:280
25464996732,6cyclictest9-21ksoftirqd/009:15:000
25464996532,7cyclictest9-21ksoftirqd/008:40:160
25464996431,6cyclictest9-21ksoftirqd/009:45:280
25464996431,6cyclictest9-21ksoftirqd/009:44:590
134491640,4ptp4l0-21swapper/107:30:571
134491640,3ptp4l13009-21apt-get11:20:111
25464996331,6cyclictest9-21ksoftirqd/011:35:250
25464996331,5cyclictest9-21ksoftirqd/012:30:000
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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