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2026-07-07 - 15:48
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Tue Jul 07, 2026 12:45:39)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1943821800,5sleep11379199cyclictest10:50:131
2119321780,6sleep21379299cyclictest08:35:162
2109221440,6sleep31379399cyclictest12:00:243
2048021360,3sleep01379099cyclictest10:50:240
13793997316,12cyclictest9202-21chrt09:16:283
13793997316,12cyclictest21508-21chrt09:45:083
13793997216,11cyclictest996-21chrt12:28:083
13793997116,12cyclictest32271-21chrt07:50:073
13793996816,12cyclictest3495-21chrt12:34:383
197182670,3sleep30-21swapper/312:00:013
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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