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2026-07-20 - 08:23
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Mon Jul 20, 2026 00:45:40)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
187221630,7sleep01141899cyclictest22:15:260
111352760,8sleep0212-21systemd-journal19:09:590
144642710,5sleep10-21swapper/119:15:181
134491680,4ptp4l17224-21apt-get00:00:140
134491640,4ptp4l0-21swapper/023:05:240
134491640,4ptp4l0-21swapper/023:05:240
134491640,3ptp4l28993-21meminfo19:45:181
134491610,4ptp4l0-21swapper/021:20:300
1142099597,7cyclictest0-21swapper/200:20:252
134491570,3ptp4l0-21swapper/119:56:201
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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