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2026-06-24 - 20:38
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Wed Jun 24, 2026 12:45:38)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
813599710,27cyclictest606-21grep11:30:190
813599710,26cyclictest8339-21grep07:10:130
813599682,26cyclictest0-21swapper/011:50:160
813599656,17cyclictest24359-21timerandwakeup11:10:270
813599650,21cyclictest26494-21expr12:25:190
134491650,5ptp4l0-21swapper/207:15:182
813599642,26cyclictest3268-21seq09:15:450
813599631,26cyclictest29933-21seq12:32:070
813599630,26cyclictest20492-21taskset12:11:510
813599630,25cyclictest26654-21seq10:06:520
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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