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2026-04-14 - 07:19
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Tue Apr 14, 2026 00:45:37)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
289721530,6sleep01949799cyclictest20:50:270
1841721530,4sleep31950099cyclictest22:35:173
104892790,4sleep00-21swapper/022:15:280
1949799670,3cyclictest602-21sed20:45:280
134491670,3ptp4l0-21swapper/123:28:511
1949799650,30cyclictest11180-21seq00:36:130
134491650,5ptp4l0-21swapper/120:40:021
134491650,22ptp4l9490-21iostat_ios22:15:181
1949799640,29cyclictest29162-21taskset20:40:070
1949799630,29cyclictest5194-21seq19:47:130
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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