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2026-04-25 - 11:11
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Sat Apr 25, 2026 00:45:38)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2325821520,5sleep00-21swapper/020:40:150
2447921410,6sleep31364399cyclictest23:00:233
1364199741,29cyclictest25070-21latency_hist20:45:011
13641997410,22cyclictest22046-21timerwakeupswit20:35:261
134491730,10ptp4l12148-21irqstats19:05:191
1364199720,29cyclictest25510-21seq00:12:001
1364199700,26cyclictest7193-21tune2fs21:15:161
1364199692,28cyclictest0-21swapper/122:00:241
1364199690,29cyclictest18404-21seq23:57:001
1364199684,23cyclictest31783-21phc2sys00:25:251
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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