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2026-08-14 - 17:56
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Fri Aug 14, 2026 12:45:39)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
663321210,6sleep3411399cyclictest10:40:273
134491660,19ptp4l1942-21apt-get08:15:142
134491620,5ptp4l0-21swapper/209:42:352
134491620,5ptp4l0-21swapper/008:45:180
134491620,3ptp4l27438-21apt-get08:00:122
134491620,2ptp4l0-21swapper/210:55:052
134491610,4ptp4l0-21swapper/010:55:190
134491590,3ptp4l0-21swapper/210:11:332
134491580,5ptp4l0-21swapper/107:09:001
134491580,4ptp4l0-21swapper/310:55:193
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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