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2026-08-03 - 10:17
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Mon Aug 03, 2026 00:45:36)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1606499750,31cyclictest22952-21sed20:35:010
134491690,5ptp4l24456-21switchtime20:35:273
134491690,35ptp4l25-21ksoftirqd/121:49:501
16066996732,3cyclictest33-21ksoftirqd/220:10:252
1606599671,32cyclictest20472-21seq20:29:531
1606499672,26cyclictest0-21swapper/022:00:440
1606499672,26cyclictest0-21swapper/021:09:450
1606499672,26cyclictest0-21swapper/019:40:030
1606499672,25cyclictest0-21swapper/022:12:230
1606499662,25cyclictest0-21swapper/000:18:490
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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