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2026-06-25 - 22:16
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Thu Jun 25, 2026 00:45:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1636321520,3sleep20-21swapper/222:45:002
134491700,5ptp4l14861-21awk20:20:280
13169996632,8cyclictest25-21ksoftirqd/120:45:141
13169996627,7cyclictest25-21ksoftirqd/123:40:011
134491650,19ptp4l0-21swapper/000:30:110
13171996528,6cyclictest41-21ksoftirqd/322:30:013
13169996528,4cyclictest25-21ksoftirqd/123:55:241
140042620,5sleep30-21swapper/320:20:193
134491620,4ptp4l11133-21diskstats20:15:160
13171996228,4cyclictest41-21ksoftirqd/319:35:013
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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