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2026-03-10 - 03:55
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Tue Mar 10, 2026 00:45:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2699221540,8sleep1300799cyclictest21:10:171
2968521360,4sleep0300699cyclictest22:25:160
3008997829,4cyclictest33-21ksoftirqd/219:59:592
3007997616,17cyclictest16966-21chrt21:55:291
300699747,24cyclictest13526-21irqrtprio23:00:200
3007997116,16cyclictest21850-21chrt21:00:021
3007997017,17cyclictest10551-21chrt00:02:301
3007996916,17cyclictest24015-21taskset23:22:061
3007996916,16cyclictest30676-21chrt21:15:381
3008996825,4cyclictest33-21ksoftirqd/222:45:202
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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