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2026-09-04 - 08:26
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Fri Sep 04, 2026 00:45:38)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
297221740,3sleep3814099cyclictest21:15:243
3227621460,6sleep20-21swapper/221:10:182
134491770,11ptp4l1301-21snmpd19:05:343
8139997215,54cyclictest0-21swapper/223:15:282
8139997215,17cyclictest9371-21chrt23:46:552
8139997110,18cyclictest9874-21/usr/sbin/munin22:40:222
813999696,60cyclictest0-21swapper/223:25:002
813999689,57cyclictest0-21swapper/222:05:282
813999668,19cyclictest11297-21cpuspeed21:35:132
8139996615,19cyclictest29336-21chrt19:55:042
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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