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2025-12-29 - 10:07
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Mon Dec 29, 2025 00:45:44)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
26893996430,4cyclictest33-21ksoftirqd/220:57:042
2689299643,11cyclictest8128-21latency_hist20:50:001
134491640,4ptp4l9463-21apt-get00:20:140
26893996330,4cyclictest33-21ksoftirqd/200:32:182
26893996231,4cyclictest33-21ksoftirqd/221:33:502
26893996129,4cyclictest33-21ksoftirqd/220:52:182
26893996129,4cyclictest33-21ksoftirqd/220:52:182
26893996127,4cyclictest33-21ksoftirqd/221:39:562
2689299616,10cyclictest13665-21cut21:00:211
26893996030,4cyclictest33-21ksoftirqd/219:59:512
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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