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2026-09-16 - 04:12
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Wed Sep 16, 2026 00:45:47)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
351321390,5sleep22600499cyclictest20:40:172
2853121390,5sleep02600299cyclictest22:40:260
2600399647,7cyclictest22125-21latency_hist22:30:011
134491620,19ptp4l0-21swapper/119:05:171
266872610,3sleep20-21swapper/219:10:192
233572610,7sleep22600499cyclictest22:30:222
134491610,4ptp4l21986-21apt-get21:20:132
2600399608,7cyclictest0-21swapper/123:40:221
2600399606,6cyclictest10000-21cpuspeed_turbos19:45:141
2600399606,6cyclictest10000-21cpuspeed_turbos19:45:141
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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