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2026-04-03 - 22:43
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot1.osadl.org (updated Fri Apr 03, 2026 12:45:32)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
74421970,6sleep1705-21execl07:06:491
86021900,5sleep0838-21execl07:07:450
79721750,3sleep3391rcuc/307:07:113
84521740,5sleep2836-21execl07:07:352
1563821730,6sleep1141199cyclictest09:10:211
1597821670,6sleep0141099cyclictest07:28:100
841521460,4sleep341-21ksoftirqd/307:27:563
1560621240,3sleep00-21swapper/009:10:200
35132760,4sleep23482-21sh07:27:052
119972650,4sleep312003-21spawn07:20:473
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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