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2026-05-06 - 04:19
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rackdslot1.osadl.org (updated Wed May 06, 2026 00:45:38)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
276199670,11cyclictest16397-21cat19:40:002
276199617,7cyclictest0-21swapper/223:10:272
276199608,6cyclictest0-21swapper/220:40:162
276199598,7cyclictest0-21swapper/219:30:262
276199598,7cyclictest0-21swapper/219:30:262
276199597,7cyclictest0-21swapper/200:15:292
276199597,6cyclictest0-21swapper/223:05:212
276199596,7cyclictest0-21swapper/200:35:252
134491590,5ptp4l0-21swapper/219:40:012
134491590,4ptp4l31798-21ntp_states20:10:232
134491590,4ptp4l0-21swapper/222:59:172
24122580,3sleep2276199cyclictest22:35:272
134491580,4ptp4l0-21swapper/123:32:251
276199578,6cyclictest0-21swapper/220:45:282
276199571,11cyclictest10007-21grep20:35:142
134491570,4ptp4l0-21swapper/322:03:583
134491570,4ptp4l0-21swapper/220:24:312
134491570,4ptp4l0-21swapper/122:55:101
134491570,3ptp4l0-21swapper/321:55:223
134491570,3ptp4l0-21swapper/020:16:470
276199567,7cyclictest0-21swapper/219:54:482
276199567,6cyclictest0-21swapper/222:20:272
276199567,6cyclictest0-21swapper/222:20:272
276199566,7cyclictest15093-21grep00:10:272
276199564,7cyclictest23085-21uniq00:30:152
134491560,4ptp4l0-21swapper/323:39:563
134491560,4ptp4l0-21swapper/023:30:160
276199557,6cyclictest0-21swapper/221:20:172
276199557,11cyclictest0-21swapper/220:05:292
276199556,6cyclictest0-21swapper/200:25:162
134491550,4ptp4l0-21swapper/120:45:181
134491550,3ptp4l0-21swapper/100:20:261
276199547,6cyclictest0-21swapper/222:50:182
276199547,6cyclictest0-21swapper/222:50:182
276199544,6cyclictest0-21swapper/222:25:142
134491540,4ptp4l0-21swapper/322:45:023
134491540,4ptp4l0-21swapper/121:41:381
134491540,3ptp4l0-21swapper/123:53:011
134491540,3ptp4l0-21swapper/021:01:330
276199534,7cyclictest5244-21cut19:15:142
276199534,6cyclictest0-21swapper/200:00:202
276199534,6cyclictest0-21swapper/200:00:202
276199533,6cyclictest3212-21latency_hist21:30:002
276199532,38cyclictest0-21swapper/223:50:142
134491530,4ptp4l0-21swapper/322:20:503
134491530,4ptp4l0-21swapper/322:20:503
134491530,4ptp4l0-21swapper/319:35:003
134491530,4ptp4l0-21swapper/319:35:003
134491530,3ptp4l0-21swapper/100:10:181
134491530,3ptp4l0-21swapper/021:32:580
276199525,6cyclictest7221-21cat22:45:272
134491520,4ptp4l0-21swapper/319:13:153
134491520,4ptp4l0-21swapper/123:59:451
134491520,4ptp4l0-21swapper/122:47:281
134491520,3ptp4l0-21swapper/120:10:191
276199517,6cyclictest0-21swapper/221:37:142
276199513,6cyclictest8028-21cut19:20:182
276199512,6cyclictest0-21swapper/223:29:592
276099518,4cyclictest25-21ksoftirqd/100:03:501
276099518,4cyclictest25-21ksoftirqd/100:03:501
134491510,4ptp4l0-21swapper/020:36:130
276199506,7cyclictest13332-21ls00:10:012
276199500,10cyclictest24717-21cut21:05:202
134491500,4ptp4l0-21swapper/100:33:221
134491500,4ptp4l0-21swapper/019:28:370
134491500,11ptp4l0-21swapper/122:29:481
276199498,7cyclictest0-21swapper/221:10:232
276199497,7cyclictest0-21swapper/220:00:222
276199492,6cyclictest3792-21basename21:30:142
276199492,10cyclictest30051-21mailstats21:15:262
276099499,8cyclictest25-21ksoftirqd/121:19:141
134491490,8ptp4l1195-21irqstats19:05:250
134491490,5ptp4l0-21swapper/121:35:271
134491490,4ptp4l0-21swapper/323:24:103
134491490,4ptp4l0-21swapper/221:44:132
134491490,4ptp4l0-21swapper/121:55:421
134491490,4ptp4l0-21swapper/023:35:160
134491490,3ptp4l0-21swapper/119:40:441
276199485,6cyclictest0-21swapper/221:52:272
276199484,6cyclictest0-21swapper/220:55:092
134491480,4ptp4l0-21swapper/321:34:173
134491480,4ptp4l0-21swapper/123:14:321
134491480,4ptp4l0-21swapper/121:51:531
134491480,4ptp4l0-21swapper/121:32:291
134491480,4ptp4l0-21swapper/100:16:021
134491480,4ptp4l0-21swapper/023:06:320
134491480,10ptp4l0-21swapper/021:05:190
276199475,6cyclictest0-21swapper/223:45:192
276199470,6cyclictest33-21ksoftirqd/223:00:252
134491470,7ptp4l1305-21meminfo19:05:261
134491470,4ptp4l0-21swapper/323:31:043
134491470,4ptp4l0-21swapper/123:27:511
134491470,4ptp4l0-21swapper/022:00:560
134491470,10ptp4l0-21swapper/021:40:170
276199467,7cyclictest0-21swapper/200:23:472
276199467,5cyclictest0-21swapper/223:35:522
276199466,6cyclictest0-21swapper/219:14:282
2760994614,7cyclictest25-21ksoftirqd/122:40:251
134491460,4ptp4l0-21swapper/319:23:433
134491460,4ptp4l0-21swapper/123:46:011
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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