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2026-01-31 - 05:23
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rackdslot1.osadl.org (updated Sat Jan 31, 2026 00:45:39)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3088821830,4sleep02738599cyclictest19:15:200
1192321440,6sleep32738899cyclictest20:54:593
134491690,4ptp4l22719-21/usr/sbin/munin21:15:223
11052660,6sleep20-21swapper/219:20:242
134491620,4ptp4l0-21swapper/119:16:201
120142620,4sleep00-21swapper/022:03:400
134491610,5ptp4l20284-21date00:40:002
134491610,4ptp4l0-21swapper/322:40:143
134491600,3ptp4l0-21swapper/119:35:111
27387995925,4cyclictest33-21ksoftirqd/222:50:012
2738699596,6cyclictest3131-21grep22:55:001
134491590,4ptp4l3809-21apt-get00:05:122
134491590,4ptp4l0-21swapper/100:25:351
134491590,4ptp4l0-21swapper/019:40:140
134491590,3ptp4l0-21swapper/022:35:250
134491590,3ptp4l0-21swapper/020:15:270
134491580,4ptp4l0-21swapper/220:52:332
134491570,4ptp4l0-21swapper/123:05:151
134491570,4ptp4l0-21swapper/021:32:420
134491570,3ptp4l0-21swapper/322:05:123
55292560,5sleep00-21swapper/020:40:170
27387995623,4cyclictest33-21ksoftirqd/220:18:252
134491560,4ptp4l0-21swapper/120:02:301
134491560,3ptp4l0-21swapper/323:48:263
134491560,3ptp4l0-21swapper/223:40:012
2738699556,12cyclictest0-21swapper/120:50:211
2738699555,6cyclictest6667-21fschecks_count00:10:181
2738699555,5cyclictest0-21swapper/119:30:141
134491550,6ptp4l25032-21/usr/sbin/munin19:05:102
134491550,4ptp4l0-21swapper/321:49:353
134491550,4ptp4l0-21swapper/022:55:010
134491550,3ptp4l0-21swapper/220:26:292
27387995419,4cyclictest33-21ksoftirqd/222:20:482
27387995417,7cyclictest33-21ksoftirqd/223:28:212
2738699547,6cyclictest0-21swapper/122:00:171
2738699545,7cyclictest4001-21kernelversion21:45:201
2738699541,7cyclictest21552-21sed20:05:171
134491540,4ptp4l0-21swapper/022:12:370
134491540,4ptp4l0-21swapper/019:48:550
27387995322,4cyclictest33-21ksoftirqd/221:47:462
2738699537,11cyclictest0-21swapper/120:15:221
2738699534,7cyclictest27592-21cpuspeed_turbos19:10:121
2738699534,6cyclictest20257-21sed00:40:001
2738699534,6cyclictest0-21swapper/100:05:161
2738699532,6cyclictest17890-21cstates23:25:131
134491530,5ptp4l0-21swapper/320:55:223
134491530,4ptp4l0-21swapper/323:34:223
134491530,4ptp4l0-21swapper/223:30:522
134491530,4ptp4l0-21swapper/223:02:512
134491530,4ptp4l0-21swapper/222:01:042
134491530,3ptp4l0-21swapper/200:20:222
27387995222,4cyclictest33-21ksoftirqd/221:08:552
27387995222,4cyclictest33-21ksoftirqd/220:56:282
27387995220,4cyclictest33-21ksoftirqd/222:15:402
27387995220,4cyclictest33-21ksoftirqd/200:31:502
27387995217,8cyclictest33-21ksoftirqd/220:00:002
2738699525,7cyclictest0-21swapper/121:35:251
2738699524,6cyclictest0-21swapper/120:40:131
27386995218,6cyclictest25-21ksoftirqd/119:45:261
134491520,4ptp4l0-21swapper/222:55:072
134491520,3ptp4l0-21swapper/319:36:113
27387995118,4cyclictest33-21ksoftirqd/200:18:102
2738699513,6cyclictest25-21ksoftirqd/122:25:181
134491510,4ptp4l0-21swapper/322:55:283
134491510,4ptp4l0-21swapper/320:34:423
134491510,4ptp4l0-21swapper/222:07:282
134491510,4ptp4l0-21swapper/219:14:122
2738799509,5cyclictest33-21ksoftirqd/221:00:242
27387995017,4cyclictest33-21ksoftirqd/223:45:012
27387995017,3cyclictest33-21ksoftirqd/220:39:372
27387995016,4cyclictest33-21ksoftirqd/200:04:162
27387995015,4cyclictest33-21ksoftirqd/222:31:042
2738699507,11cyclictest0-21swapper/121:10:241
2738699506,5cyclictest880-21tr21:40:141
2738699504,7cyclictest0-21swapper/122:30:211
2738699503,11cyclictest23486-21taskset21:17:361
2738699502,5cyclictest6965-21timerwakeupswit21:50:261
2738699502,5cyclictest6965-21timerwakeupswit21:50:261
2738699501,6cyclictest10859-21date00:20:011
134491500,4ptp4l0-21swapper/321:13:103
134491500,4ptp4l0-21swapper/223:13:012
134491500,4ptp4l0-21swapper/221:53:222
134491500,4ptp4l0-21swapper/221:53:222
134491500,4ptp4l0-21swapper/023:55:460
134491500,4ptp4l0-21swapper/021:23:250
134491500,4ptp4l0-21swapper/019:31:230
134491500,15ptp4l0-21swapper/021:00:130
27387994919,7cyclictest33-21ksoftirqd/221:41:252
27387994919,7cyclictest33-21ksoftirqd/221:28:282
27387994916,4cyclictest33-21ksoftirqd/222:36:182
27387994915,5cyclictest33-21ksoftirqd/219:45:002
27387994913,5cyclictest33-21ksoftirqd/222:25:112
27387994911,4cyclictest33-21ksoftirqd/219:45:442
2738799490,3cyclictest121rcu_preempt22:00:002
134491490,4ptp4l0-21swapper/321:42:073
134491490,4ptp4l0-21swapper/319:46:143
134491490,4ptp4l0-21swapper/300:17:523
134491490,4ptp4l0-21swapper/022:33:570
134491490,4ptp4l0-21swapper/021:48:170
134491490,4ptp4l0-21swapper/020:24:170
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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