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2026-03-30 - 16:08
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rackdslot1.osadl.org (updated Mon Mar 30, 2026 00:45:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3131221680,6sleep30-21swapper/319:10:013
134691870,11getstats0-21swapper/200:10:122
305162760,3sleep30-21swapper/320:15:283
134491760,9ptp4l30739-21users19:05:261
134491650,5ptp4l0-21swapper/019:45:210
31406996428,10cyclictest25-21ksoftirqd/100:20:251
38622620,6sleep03140599cyclictest19:20:130
58662610,4sleep10-21swapper/121:45:001
3140699616,8cyclictest3432-21latency_hist20:30:001
31406996126,6cyclictest25-21ksoftirqd/123:55:261
134491610,4ptp4l0-21swapper/222:40:142
31406996025,7cyclictest25-21ksoftirqd/121:05:221
31406996025,7cyclictest25-21ksoftirqd/100:25:271
138282600,4sleep00-21swapper/000:20:110
134491600,4ptp4l0-21swapper/220:15:122
31406995928,6cyclictest25-21ksoftirqd/119:45:011
31406995927,3cyclictest25-21ksoftirqd/120:20:161
134491590,7ptp4l41-21ksoftirqd/321:25:313
134491590,4ptp4l0-21swapper/122:11:301
31406995824,3cyclictest25-21ksoftirqd/100:37:441
31406995821,7cyclictest25-21ksoftirqd/123:40:131
134491580,4ptp4l0-21swapper/223:35:462
31406995726,4cyclictest25-21ksoftirqd/122:20:271
134491570,4ptp4l0-21swapper/020:10:160
134491570,3ptp4l0-21swapper/019:10:250
134491570,2ptp4l0-21swapper/020:30:160
3140699563,6cyclictest25-21ksoftirqd/123:05:221
31406995627,10cyclictest25-21ksoftirqd/120:50:011
31406995624,7cyclictest25-21ksoftirqd/122:30:141
134491560,3ptp4l0-21swapper/323:31:323
134491560,3ptp4l0-21swapper/322:40:223
134491560,3ptp4l0-21swapper/000:15:270
3140699555,9cyclictest25-21ksoftirqd/120:10:221
3140699553,9cyclictest25-21ksoftirqd/121:55:161
3140699550,7cyclictest25-21ksoftirqd/119:15:221
134491550,3ptp4l0-21swapper/322:39:563
134491550,3ptp4l0-21swapper/223:23:302
134491550,3ptp4l0-21swapper/021:30:250
3140699545,6cyclictest25-21ksoftirqd/100:17:001
3140699544,9cyclictest25-21ksoftirqd/122:25:161
3140699543,9cyclictest25-21ksoftirqd/122:50:001
31406995419,6cyclictest25-21ksoftirqd/119:24:021
134491540,4ptp4l0-21swapper/323:55:313
134491540,4ptp4l0-21swapper/323:47:313
134491540,3ptp4l723-21mailstats23:50:240
3140699536,7cyclictest25-21ksoftirqd/123:10:271
3140699536,7cyclictest25-21ksoftirqd/123:10:271
3140699535,7cyclictest8548-21df_abs20:40:131
3140699535,7cyclictest8548-21df_abs20:40:131
3140699534,8cyclictest25-21ksoftirqd/122:55:171
3140699534,8cyclictest25-21ksoftirqd/122:50:251
31406995324,8cyclictest25-21ksoftirqd/123:00:251
31406995323,4cyclictest25-21ksoftirqd/119:45:161
134491530,3ptp4l0-21swapper/020:35:260
134491530,3ptp4l0-21swapper/019:35:230
3140699525,3cyclictest121rcu_preempt21:25:201
3140699525,10cyclictest25-21ksoftirqd/123:25:191
3140699523,8cyclictest25-21ksoftirqd/119:30:201
3140699523,8cyclictest25-21ksoftirqd/119:30:201
31406995225,8cyclictest25-21ksoftirqd/100:30:261
3140699521,6cyclictest25-21ksoftirqd/121:45:141
134491520,3ptp4l443-21rs:main3
134491520,3ptp4l0-21swapper/123:31:281
134491520,11ptp4l0-21swapper/300:10:273
3140699515,3cyclictest121rcu_preempt00:10:171
3140699514,7cyclictest8027-21basename20:40:001
3140699514,4cyclictest25-21ksoftirqd/122:35:251
3140699514,10cyclictest25-21ksoftirqd/119:50:261
3140699513,8cyclictest25-21ksoftirqd/123:20:221
3140699510,6cyclictest25-21ksoftirqd/120:30:181
3140699510,6cyclictest23830-21unixbench_singl20:00:291
134491510,9ptp4l28612-21apt-get19:05:032
134491510,4ptp4l0-21swapper/222:48:262
134491510,4ptp4l0-21swapper/021:47:070
3140699506,7cyclictest25-21ksoftirqd/120:05:171
3140699505,9cyclictest25-21ksoftirqd/122:40:251
3140699504,9cyclictest25-21ksoftirqd/123:45:211
3140699503,10cyclictest25-21ksoftirqd/119:55:261
3140699502,7cyclictest25-21ksoftirqd/120:20:011
3140699502,6cyclictest25-21ksoftirqd/119:35:161
31406995018,6cyclictest25-21ksoftirqd/121:00:051
3140699501,7cyclictest25-21ksoftirqd/121:35:011
134491500,4ptp4l0-21swapper/320:08:503
134491500,11ptp4l0-21swapper/221:26:392
134491500,10ptp4l30280-21ps19:05:230
3140699494,7cyclictest25-21ksoftirqd/119:30:001
3140699492,10cyclictest0-21swapper/123:35:251
3140699491,6cyclictest0-21swapper/122:02:371
3140699490,5cyclictest25-21ksoftirqd/122:05:141
3140699490,5cyclictest231rcuc/100:05:201
134491490,3ptp4l0-21swapper/319:59:223
3140699480,7cyclictest26931-21/usr/sbin/munin21:20:141
134491480,4ptp4l0-21swapper/019:44:540
134491480,3ptp4l0-21swapper/320:55:013
134491480,3ptp4l0-21swapper/021:53:130
134491480,10ptp4l0-21swapper/000:06:100
3140799470,2cyclictest121rcu_preempt21:49:382
3140799470,2cyclictest121rcu_preempt20:39:262
3140699476,9cyclictest25-21ksoftirqd/123:15:191
3140699473,7cyclictest25-21ksoftirqd/122:20:001
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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