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2026-08-25 - 11:18
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rackdslot1.osadl.org (updated Tue Aug 25, 2026 00:45:41)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
364199782,33cyclictest0-21swapper/321:10:243
134491700,17ptp4l0-21swapper/120:48:091
3641996828,8cyclictest41-21ksoftirqd/319:12:293
3641996627,5cyclictest41-21ksoftirqd/322:15:013
181682660,5sleep318172-21irqrtprio19:40:193
134491660,5ptp4l0-21swapper/021:25:250
134491660,5ptp4l0-21swapper/021:25:250
3641996531,4cyclictest41-21ksoftirqd/320:30:003
3641996531,4cyclictest41-21ksoftirqd/320:30:003
3641996530,4cyclictest41-21ksoftirqd/319:35:003
3641996527,8cyclictest41-21ksoftirqd/321:29:593
3641996527,8cyclictest41-21ksoftirqd/321:29:593
3641996526,7cyclictest41-21ksoftirqd/321:31:373
134491650,5ptp4l0-21swapper/121:30:301
134491650,11ptp4l0-21swapper/219:35:002
3641996431,6cyclictest41-21ksoftirqd/323:35:313
3641996430,8cyclictest41-21ksoftirqd/321:00:003
3641996430,4cyclictest41-21ksoftirqd/300:35:243
3641996429,4cyclictest41-21ksoftirqd/323:00:173
3641996428,7cyclictest41-21ksoftirqd/321:40:143
3641996428,4cyclictest41-21ksoftirqd/320:50:283
3641996425,8cyclictest41-21ksoftirqd/323:32:383
134491640,4ptp4l0-21swapper/119:55:411
3641996329,7cyclictest41-21ksoftirqd/322:35:013
3641996329,6cyclictest41-21ksoftirqd/300:10:173
3641996327,8cyclictest41-21ksoftirqd/300:02:543
3641996327,7cyclictest41-21ksoftirqd/321:00:163
3641996233,8cyclictest41-21ksoftirqd/321:15:193
3641996229,8cyclictest41-21ksoftirqd/322:00:153
3641996228,3cyclictest41-21ksoftirqd/320:20:233
303662620,3sleep2364099cyclictest21:15:262
134491620,19ptp4l10736-21apt-get21:45:152
3641996132,8cyclictest41-21ksoftirqd/320:15:273
3641996129,8cyclictest41-21ksoftirqd/321:35:143
3641996127,8cyclictest41-21ksoftirqd/319:25:293
3641996127,7cyclictest41-21ksoftirqd/320:10:583
3641996031,8cyclictest41-21ksoftirqd/320:30:243
3641996029,9cyclictest41-21ksoftirqd/300:30:133
3641996029,8cyclictest41-21ksoftirqd/321:55:173
3641996022,9cyclictest41-21ksoftirqd/322:05:213
305922600,5sleep0111rcuc/021:15:280
134491600,4ptp4l0-21swapper/219:07:102
3641995928,3cyclictest41-21ksoftirqd/323:00:013
3641995922,7cyclictest41-21ksoftirqd/322:51:183
134491590,3ptp4l0-21swapper/200:27:042
3641995826,9cyclictest41-21ksoftirqd/319:35:153
3641995822,7cyclictest41-21ksoftirqd/300:20:173
3641995820,7cyclictest41-21ksoftirqd/322:18:043
134491570,4ptp4l0-21swapper/223:44:522
134491570,4ptp4l0-21swapper/100:21:091
364199563,27cyclictest0-21swapper/323:24:533
3641995629,8cyclictest41-21ksoftirqd/321:50:223
3641995625,3cyclictest41-21ksoftirqd/323:25:273
364199562,21cyclictest0-21swapper/323:07:463
3641995523,8cyclictest41-21ksoftirqd/321:05:133
3641995522,7cyclictest41-21ksoftirqd/323:19:343
364199552,26cyclictest0-21swapper/322:37:213
3641995521,7cyclictest41-21ksoftirqd/323:40:293
134491550,4ptp4l0-21swapper/322:45:133
134491550,4ptp4l0-21swapper/220:30:272
134491550,3ptp4l0-21swapper/221:20:372
3641995425,6cyclictest41-21ksoftirqd/319:15:263
3641995424,8cyclictest41-21ksoftirqd/320:00:173
3641995423,10cyclictest41-21ksoftirqd/300:05:173
3638995430,21cyclictest9-21ksoftirqd/020:05:120
134491540,3ptp4l0-21swapper/219:45:242
134491540,3ptp4l0-21swapper/000:21:090
134491540,12ptp4l0-21swapper/220:46:572
364199533,7cyclictest41-21ksoftirqd/323:50:013
3641995322,7cyclictest41-21ksoftirqd/320:44:083
134491530,4ptp4l0-21swapper/221:53:262
134491530,3ptp4l0-21swapper/200:15:002
3641995231,11cyclictest41-21ksoftirqd/319:25:013
364199522,7cyclictest0-21swapper/300:25:193
364199522,26cyclictest0-21swapper/323:55:023
134491520,9ptp4l0-21swapper/200:03:492
134491520,4ptp4l0-21swapper/121:24:111
134491520,4ptp4l0-21swapper/121:18:521
134491520,3ptp4l0-21swapper/121:59:411
134491520,18ptp4l25-21ksoftirqd/121:49:321
134491520,11ptp4l0-21swapper/222:55:242
364199515,3cyclictest121rcu_preempt22:40:523
364199514,3cyclictest121rcu_preempt20:05:263
364199512,7cyclictest41-21ksoftirqd/323:55:003
3641995126,8cyclictest41-21ksoftirqd/320:45:173
364199512,40cyclictest0-21swapper/323:10:153
3641995119,10cyclictest41-21ksoftirqd/319:55:463
134491510,4ptp4l0-21swapper/220:24:092
134491510,4ptp4l0-21swapper/023:24:460
134491510,12ptp4l0-21swapper/220:09:082
134491510,11ptp4l0-21swapper/200:30:302
364199502,25cyclictest0-21swapper/321:22:313
364199501,7cyclictest41-21ksoftirqd/321:45:163
134491500,4ptp4l0-21swapper/119:21:391
134491500,3ptp4l0-21swapper/200:17:272
364199493,7cyclictest41-21ksoftirqd/319:50:003
364199492,6cyclictest11156-21tune2fs20:35:173
134491490,4ptp4l0-21swapper/223:20:162
134491490,4ptp4l0-21swapper/222:10:192
134491490,4ptp4l0-21swapper/123:36:101
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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