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2026-02-27 - 00:35
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 100 highest latencies:
System rackdslot1.osadl.org (updated Thu Feb 26, 2026 12:45:45)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2038821520,3sleep11401699cyclictest07:20:241
2038821520,3sleep11401699cyclictest07:20:241
134491810,4ptp4l0-21swapper/309:09:513
231252710,2sleep323128-21proc_pri09:45:253
134491660,4ptp4l0-21swapper/310:15:243
134491650,3ptp4l25781-21ntp_states12:10:213
134491650,3ptp4l23451-21ntp_states10:55:213
1401699622,24cyclictest3382-21/usr/sbin/munin10:15:141
1401599623,13cyclictest0-21swapper/008:15:250
134491610,3ptp4l27173-21/usr/sbin/munin12:15:113
1401699607,17cyclictest28905-21chrt12:15:491
1401699599,11cyclictest26254-21cat09:54:551
1401699593,11cyclictest143902sleep109:26:161
134491590,3ptp4l0-21swapper/308:35:023
1401699588,11cyclictest28803-21seq11:07:211
1401699588,11cyclictest23384-21seq08:35:411
1401699584,11cyclictest25249-21ps12:10:171
1401699579,12cyclictest25873-21cat07:35:001
1401699577,12cyclictest24332-21seq12:08:581
1401699575,11cyclictest22001-21chrt10:54:391
165552560,4sleep341-21ksoftirqd/307:15:133
1401599565,11cyclictest1317-21runrttasks10:58:060
1401699559,9cyclictest10271-21seq10:29:551
1401699558,13cyclictest23075-21seq07:27:211
1401699558,12cyclictest8118-21seq11:34:011
1401699549,10cyclictest9772-21seq08:09:221
1401699548,11cyclictest2447-21seq07:52:011
1401699547,16cyclictest31082-21chrt11:12:041
1401599546,11cyclictest1317-21runrttasks07:53:250
1401599541,12cyclictest0-21swapper/010:30:000
134491540,4ptp4l0-21swapper/210:43:402
134491540,3ptp4l0-21swapper/312:20:313
1401699538,12cyclictest26679-21seq11:04:411
1401699538,12cyclictest19650-21seq10:49:001
1401699536,15cyclictest17273-21chrt10:43:031
134491530,4ptp4l0-21swapper/311:31:453
134491530,4ptp4l0-21swapper/309:12:313
14017995220,7cyclictest33-21ksoftirqd/211:45:002
14017995220,7cyclictest33-21ksoftirqd/211:45:002
1401699528,11cyclictest5358-21seq09:08:591
1401699527,16cyclictest3787-21chrt12:31:181
1401699527,12cyclictest24382-21taskset10:59:581
1401699525,11cyclictest28311-21seq09:56:481
1401699524,11cyclictest15105-21seq11:49:421
1401599526,11cyclictest0-21swapper/010:21:000
1401599525,19cyclictest27405-21/usr/sbin/munin11:05:160
134491520,5ptp4l0-21swapper/208:04:112
134491520,4ptp4l0-21swapper/308:58:343
134491520,4ptp4l0-21swapper/211:19:522
134491520,4ptp4l0-21swapper/210:22:052
134491520,4ptp4l0-21swapper/207:25:502
134491520,3ptp4l0-21swapper/308:10:423
134491520,2ptp4l15666-21meminfo08:20:183
133312520,4sleep20-21swapper/207:05:262
1401699519,16cyclictest28496-21chrt08:49:141
1401699518,12cyclictest19114-21seq09:37:541
1401699518,11cyclictest10297-21seq09:20:061
1401699517,15cyclictest25811-21chrt08:42:041
1401699516,15cyclictest21912-21chrt12:03:101
1401699515,11cyclictest1317-21runrttasks07:45:071
1401599516,6cyclictest0-21swapper/011:20:210
1401599516,11cyclictest1317-21runrttasks11:51:220
1401599516,11cyclictest1317-21runrttasks11:51:220
1401599515,10cyclictest1317-21runrttasks10:30:510
1401599513,11cyclictest19094-21seq09:37:390
134491510,3ptp4l0-21swapper/312:35:083
134491510,3ptp4l0-21swapper/211:12:022
14017995016,6cyclictest33-21ksoftirqd/210:55:192
1401699507,15cyclictest16639-21chrt09:30:371
1401699507,10cyclictest16435-21taskset08:20:491
1401699506,11cyclictest31522-21chrt12:21:151
1401699506,11cyclictest2841-21taskset10:11:081
1401699506,11cyclictest15772-21seq07:10:571
1401699503,16cyclictest18694-21users08:25:271
1401599505,11cyclictest28317-21seq08:46:570
1401599502,14cyclictest26169-21ls12:10:260
134491500,5ptp4l0-21swapper/007:09:370
134491500,4ptp4l0-21swapper/309:57:443
134491500,4ptp4l0-21swapper/309:15:483
134491500,4ptp4l0-21swapper/307:28:283
134491500,3ptp4l0-21swapper/311:29:123
134491500,3ptp4l0-21swapper/308:30:003
14017994916,6cyclictest33-21ksoftirqd/208:55:252
1401699495,6cyclictest0-21swapper/110:35:021
1401699495,6cyclictest0-21swapper/110:35:021
1401599498,7cyclictest0-21swapper/007:20:120
1401599498,7cyclictest0-21swapper/007:20:120
1401599496,6cyclictest0-21swapper/008:20:240
1401599492,10cyclictest1317-21runrttasks10:17:590
134491490,4ptp4l0-21swapper/309:54:573
134491490,3ptp4l0-21swapper/310:36:153
134491490,3ptp4l0-21swapper/310:36:153
134491490,3ptp4l0-21swapper/307:51:313
134491490,3ptp4l0-21swapper/209:17:032
1401799486,5cyclictest33-21ksoftirqd/208:30:282
14017994821,6cyclictest33-21ksoftirqd/208:35:152
14017994818,4cyclictest33-21ksoftirqd/210:08:282
14017994817,7cyclictest33-21ksoftirqd/211:50:002
14017994814,4cyclictest33-21ksoftirqd/207:59:012
14017994811,4cyclictest33-21ksoftirqd/209:25:152
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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