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2025-05-03 - 01:15
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot1.osadl.org (updated Fri May 02, 2025 12:45:34)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
800121330,3sleep32444799cyclictest12:20:183
2847191630,18ptp4l0-21swapper/309:25:263
2847191610,4ptp4l17877-21apt-get10:25:022
2847191600,4ptp4l1343-21apt-get07:30:142
2847191600,3ptp4l0-21swapper/310:46:473
24445996032,6cyclictest25-21ksoftirqd/107:45:261
2847191590,4ptp4l0-21swapper/211:15:222
2847191590,4ptp4l0-21swapper/010:50:180
24445995932,6cyclictest25-21ksoftirqd/107:15:111
24445995930,3cyclictest25-21ksoftirqd/112:05:211
2847191580,3ptp4l0-21swapper/112:28:381
242212580,5sleep30-21swapper/310:35:273
2847191570,4ptp4l3849-21chrt09:52:352
2847191570,4ptp4l0-21swapper/309:06:493
2847191570,4ptp4l0-21swapper/307:20:033
2847191570,4ptp4l0-21swapper/211:21:212
2847191570,3ptp4l0-21swapper/311:16:303
24445995728,3cyclictest25-21ksoftirqd/111:55:011
24445995723,5cyclictest25-21ksoftirqd/111:39:591
24444995722,6cyclictest9-21ksoftirqd/011:25:000
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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