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2025-10-28 - 17:08
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot1.osadl.org (updated Tue Oct 28, 2025 12:45:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2639622290,5sleep126393-21multi.sh07:09:541
476122140,5sleep04764-21multi.sh07:07:580
1052522030,4sleep310524-21sort07:09:033
3192722020,3sleep231925-21grep07:06:282
323672690,5sleep10-21swapper/107:50:011
469996727,7cyclictest9-21ksoftirqd/008:40:010
248282660,3sleep3391rcuc/307:11:243
2847191640,4ptp4l2047-21multi.sh07:12:251
2847191640,30ptp4l9-21ksoftirqd/007:12:140
472996316,45cyclictest12402-21kworker/2:008:20:292
2847191620,4ptp4l0-21swapper/207:20:062
473996128,4cyclictest41-21ksoftirqd/308:05:003
469996130,7cyclictest9-21ksoftirqd/007:20:000
46999602,9cyclictest9-21ksoftirqd/010:20:360
469995921,5cyclictest9-21ksoftirqd/011:30:150
2847191590,3ptp4l0-21swapper/109:55:221
2847191590,3ptp4l0-21swapper/109:55:221
469995825,6cyclictest9-21ksoftirqd/009:25:010
2847191580,4ptp4l0-21swapper/110:30:581
160352580,4sleep216052-21sort07:10:232
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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