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2025-07-19 - 06:24
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot1.osadl.org (updated Sat Jul 19, 2025 00:45:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2847191780,7ptp4l0-21swapper/221:22:332
2847191780,4ptp4l1778-21gnome-shell21:29:580
2847191640,5ptp4l0-21swapper/219:50:142
117402630,5sleep10-21swapper/123:25:171
117402630,5sleep10-21swapper/123:25:171
2847191620,5ptp4l0-21swapper/323:55:023
2847191620,4ptp4l0-21swapper/200:15:032
2847191610,4ptp4l0-21swapper/219:55:172
2847191600,3ptp4l0-21swapper/220:00:342
2847191600,3ptp4l0-21swapper/220:00:332
21536996027,4cyclictest41-21ksoftirqd/320:40:003
2847191590,4ptp4l0-21swapper/322:42:573
21536995928,4cyclictest41-21ksoftirqd/323:46:253
2847191580,4ptp4l0-21swapper/319:30:153
2847191580,4ptp4l0-21swapper/222:05:202
2847191580,3ptp4l1293-21snmpd22:12:342
2847191580,3ptp4l0-21swapper/223:57:182
2847191580,3ptp4l0-21swapper/220:35:282
2847191570,5ptp4l0-21swapper/023:50:240
2847191570,4ptp4l0-21swapper/023:23:160
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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