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2026-09-15 - 04:23
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rackdslot1.osadl.org (updated Tue Sep 15, 2026 00:45:39)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1146121640,5sleep1283299cyclictest20:35:241
2834997334,8cyclictest41-21ksoftirqd/321:40:003
134491690,4ptp4l15844-21df_inode23:05:131
2834996826,8cyclictest41-21ksoftirqd/320:54:423
201342670,4sleep020137-21irqrtprio20:55:170
2834996532,4cyclictest41-21ksoftirqd/323:40:153
2834996529,4cyclictest41-21ksoftirqd/319:55:223
2834996527,7cyclictest41-21ksoftirqd/323:15:213
2834996526,4cyclictest41-21ksoftirqd/319:15:273
134491650,20ptp4l0-21swapper/119:10:011
2834996427,8cyclictest41-21ksoftirqd/321:12:273
134491640,5ptp4l14562-21/usr/sbin/munin19:35:222
2834996328,11cyclictest41-21ksoftirqd/320:25:133
2834996231,7cyclictest41-21ksoftirqd/319:15:003
2834996230,4cyclictest41-21ksoftirqd/321:45:143
2834996230,3cyclictest41-21ksoftirqd/300:20:203
2834996227,7cyclictest41-21ksoftirqd/323:10:123
2834996224,8cyclictest41-21ksoftirqd/322:58:383
134491620,4ptp4l0-21swapper/223:25:232
2834996133,11cyclictest41-21ksoftirqd/320:00:133
2834996130,4cyclictest41-21ksoftirqd/321:20:193
2834996129,7cyclictest41-21ksoftirqd/300:15:013
2834996122,8cyclictest41-21ksoftirqd/322:01:383
2834996122,8cyclictest41-21ksoftirqd/322:01:383
134491610,4ptp4l11254-21meminfo21:45:200
2834996032,6cyclictest41-21ksoftirqd/319:45:153
2834996028,4cyclictest41-21ksoftirqd/320:30:193
2834996026,6cyclictest41-21ksoftirqd/300:15:273
2834996024,8cyclictest41-21ksoftirqd/319:35:153
2834996024,7cyclictest41-21ksoftirqd/322:35:403
2834996024,10cyclictest41-21ksoftirqd/323:35:103
2834996022,6cyclictest41-21ksoftirqd/319:40:203
2834995932,7cyclictest41-21ksoftirqd/300:00:213
2834995928,7cyclictest41-21ksoftirqd/322:30:153
2834995928,7cyclictest41-21ksoftirqd/322:30:153
2834995926,3cyclictest41-21ksoftirqd/319:35:003
2834995925,6cyclictest41-21ksoftirqd/322:20:213
2834995924,9cyclictest41-21ksoftirqd/300:35:223
2834995924,7cyclictest41-21ksoftirqd/300:35:013
2834995922,8cyclictest41-21ksoftirqd/323:32:123
2834995922,7cyclictest41-21ksoftirqd/322:25:263
2834995921,8cyclictest41-21ksoftirqd/322:48:163
134491590,3ptp4l0-21swapper/119:40:221
2834995824,7cyclictest41-21ksoftirqd/300:05:143
2834995823,7cyclictest41-21ksoftirqd/322:54:253
2834995820,8cyclictest41-21ksoftirqd/321:44:293
134691580,0getstats183-21jbd2/mmcblk1p1-22:15:260
134491580,5ptp4l0-21swapper/020:40:220
134491580,4ptp4l0-21swapper/122:54:561
134491580,4ptp4l0-21swapper/021:30:000
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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