You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-02-18 - 22:22
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rackdslot1.osadl.org (updated Wed Feb 18, 2026 12:45:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1628421530,6sleep02612499cyclictest11:25:180
555721450,4sleep12612599cyclictest07:35:121
267232780,5sleep00-21swapper/008:20:150
124272780,4sleep20-21swapper/211:15:252
254802700,1sleep125479-21memory09:25:201
134491680,9ptp4l0-21swapper/007:45:170
265272640,5sleep30-21swapper/307:10:153
26127996330,8cyclictest41-21ksoftirqd/310:31:253
26127996121,6cyclictest41-21ksoftirqd/309:15:553
26127996121,6cyclictest41-21ksoftirqd/309:15:543
134491590,4ptp4l5348-21apt-get07:35:102
134491590,3ptp4l0-21swapper/309:47:463
134491580,3ptp4l0-21swapper/111:30:261
134491580,3ptp4l0-21swapper/009:30:200
2612799578,5cyclictest121rcu_preempt09:55:013
26127995720,8cyclictest41-21ksoftirqd/312:09:243
134491570,3ptp4l0-21swapper/109:39:381
134491550,2ptp4l15497-21taskset10:15:041
134491550,2ptp4l15497-21taskset10:15:041
134491550,10ptp4l24316-21if_err_enp1s007:05:171
26127995421,4cyclictest41-21ksoftirqd/311:39:083
26127995419,4cyclictest41-21ksoftirqd/311:23:433
26127995319,4cyclictest41-21ksoftirqd/309:43:553
26127995319,4cyclictest41-21ksoftirqd/307:46:283
26127995316,8cyclictest41-21ksoftirqd/312:10:223
134491530,9ptp4l0-21swapper/109:10:431
134491530,13ptp4l0-21swapper/210:35:492
26127995217,4cyclictest41-21ksoftirqd/308:57:053
134491520,4ptp4l0-21swapper/211:28:392
134491520,4ptp4l0-21swapper/110:33:151
134491520,3ptp4l0-21swapper/310:53:293
134491520,12ptp4l0-21swapper/209:30:142
134491510,9ptp4l24900-21ntp_states07:05:220
134491510,9ptp4l0-21swapper/010:20:230
134491510,4ptp4l0-21swapper/208:27:482
134491510,4ptp4l0-21swapper/110:25:281
134491510,4ptp4l0-21swapper/107:42:241
134491510,4ptp4l0-21swapper/012:21:040
134491510,4ptp4l0-21swapper/010:10:190
134491510,3ptp4l0-21swapper/211:40:202
134491510,3ptp4l0-21swapper/010:08:560
2612799503,3cyclictest0-21swapper/311:14:163
26127995018,3cyclictest41-21ksoftirqd/310:04:093
26127995016,7cyclictest41-21ksoftirqd/309:25:013
26127995015,8cyclictest41-21ksoftirqd/310:37:533
134491500,9ptp4l321ktimersoftd/210:05:172
134491500,4ptp4l0-21swapper/310:45:223
134491500,4ptp4l0-21swapper/310:45:213
134491500,4ptp4l0-21swapper/308:33:593
134491500,3ptp4l0-21swapper/009:09:330
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional