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2026-07-10 - 06:08
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rackdslot1.osadl.org (updated Fri Jul 10, 2026 00:45:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
784321410,3sleep1613899cyclictest19:10:291
134491610,4ptp4l0-21swapper/123:00:201
134491610,3ptp4l14934-21memory00:05:231
134491610,3ptp4l0-21swapper/020:28:300
134491600,6ptp4l0-21swapper/319:10:003
134491600,4ptp4l20102-21users23:05:300
134491600,4ptp4l20102-21users23:05:300
134491590,3ptp4l0-21swapper/000:12:280
134491580,5ptp4l22179-21chrt22:02:093
134491580,4ptp4l0-21swapper/100:10:191
134491580,3ptp4l0-21swapper/221:00:272
134491580,3ptp4l0-21swapper/119:39:571
134491580,22ptp4l0-21swapper/123:55:301
134491570,4ptp4l0-21swapper/022:20:260
134491570,4ptp4l0-21swapper/019:48:270
134491570,3ptp4l0-21swapper/200:36:552
134491570,3ptp4l0-21swapper/120:20:201
205052560,4sleep220504-21perf23:10:002
205052560,4sleep220504-21perf23:09:592
134491560,3ptp4l0-21swapper/123:51:011
134491560,3ptp4l0-21swapper/122:33:031
134491560,3ptp4l0-21swapper/122:05:151
134491560,3ptp4l0-21swapper/100:00:261
134491550,4ptp4l0-21swapper/120:13:271
134491550,12ptp4l0-21swapper/221:10:212
134491540,4ptp4l0-21swapper/121:27:201
134491540,4ptp4l0-21swapper/120:41:321
134491540,3ptp4l0-21swapper/120:06:491
134491530,4ptp4l0-21swapper/122:57:131
134491530,3ptp4l9582-21ntp_states19:15:220
134491530,3ptp4l0-21swapper/120:02:491
134491530,3ptp4l0-21swapper/119:50:221
134491520,4ptp4l0-21swapper/123:10:431
134491520,18ptp4l0-21swapper/323:32:523
134491510,3ptp4l0-21swapper/223:35:252
134491510,10ptp4l4111-21diskstats19:05:141
134491500,4ptp4l0-21swapper/119:33:131
134491500,4ptp4l0-21swapper/022:47:140
134491500,3ptp4l0-21swapper/000:38:560
134491490,4ptp4l0-21swapper/320:39:593
134491490,4ptp4l0-21swapper/319:26:163
134491490,4ptp4l0-21swapper/019:39:580
134491490,3ptp4l0-21swapper/222:00:262
614099489,4cyclictest41-21ksoftirqd/321:48:443
614099484,2cyclictest121rcu_preempt20:43:253
614099482,2cyclictest121rcu_preempt19:53:583
614099481,2cyclictest121rcu_preempt00:09:473
134491480,4ptp4l0-21swapper/220:01:042
134491480,4ptp4l0-21swapper/123:25:291
134491480,4ptp4l0-21swapper/119:19:301
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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