You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-02-22 - 22:48
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rackdslot1.osadl.org (updated Sun Feb 22, 2026 12:45:47)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2849299872,82cyclictest0-21swapper/210:50:282
28492998312,67cyclictest5830-21cpuspeed_turbos08:40:132
2849299791,76cyclictest0-21swapper/208:15:292
44932780,5sleep20-21swapper/209:45:182
2849399720,31cyclictest9826-21taskset08:47:493
2849399720,31cyclictest29552-21taskset11:46:003
2849399710,31cyclictest21352-21taskset08:04:493
2849299712,67cyclictest0-21swapper/212:15:282
2849299712,67cyclictest0-21swapper/212:15:282
2849399680,29cyclictest17996-21taskset11:24:033
2849399671,29cyclictest31598-21taskset10:43:513
2849399671,29cyclictest11137-21taskset12:17:143
2849399671,29cyclictest11137-21taskset12:17:143
2849399670,30cyclictest3339-21taskset09:42:453
2849399665,27cyclictest30257-21taskset07:11:043
2849399661,31cyclictest17395-21taskset10:12:133
2849399661,28cyclictest32001-21taskset11:52:553
2849399660,30cyclictest19350-21taskset09:08:153
2849399660,30cyclictest14818-21taskset08:59:213
2849299669,15cyclictest4228-21ntp_states07:25:252
2849399650,31cyclictest1729-21taskset11:55:403
2849399650,30cyclictest32520-21taskset07:15:333
2849399650,30cyclictest13484-21taskset12:22:313
2849399650,28cyclictest3852-21taskset10:53:463
28492996515,11cyclictest12725-21chrt10:04:392
2849399641,31cyclictest14288-21taskset07:48:523
2849399641,28cyclictest21497-21taskset09:11:153
2849399641,28cyclictest21497-21taskset09:11:153
2849399640,31cyclictest8690-21taskset11:03:453
2849399640,29cyclictest23410-21taskset08:06:453
2849399640,29cyclictest11095-21taskset11:09:593
28492996416,11cyclictest19837-21taskset10:16:142
28492996415,10cyclictest26450-21chrt09:22:422
2849399630,28cyclictest1436-21taskset10:48:083
2849399630,27cyclictest3297-21sed12:00:193
28492996319,10cyclictest15633-21taskset11:18:282
28492996313,11cyclictest29620-21chrt10:40:012
28492996310,18cyclictest1874-21ntp_states07:20:242
28492996216,11cyclictest31437-21which11:50:262
28492996215,11cyclictest26954-21chrt10:33:392
134491620,8ptp4l0-21swapper/307:09:103
134491620,8ptp4l0-21swapper/307:09:103
28492996111,47cyclictest23055-21timedrift08:05:272
2849399600,29cyclictest28201-21taskset08:16:283
28492996015,10cyclictest26080-21taskset08:13:472
28492996015,10cyclictest26080-21taskset08:13:472
28492996013,11cyclictest1916-21chrt11:58:002
134491600,4ptp4l0-21swapper/010:14:230
2849299591,56cyclictest0-21swapper/208:05:002
28492995914,11cyclictest7353-21chrt07:33:442
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional