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2026-02-17 - 19:15
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rackdslot1.osadl.org (updated Tue Feb 17, 2026 12:45:44)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1314421470,5sleep12930799cyclictest08:50:261
485021400,5sleep22930899cyclictest08:35:162
2165621380,4sleep02930699cyclictest08:00:200
2930899762,2cyclictest0-21swapper/209:35:292
29309996635,6cyclictest41-21ksoftirqd/312:20:003
29309996633,3cyclictest41-21ksoftirqd/311:20:013
29309996632,8cyclictest41-21ksoftirqd/312:20:133
134491650,4ptp4l0-21swapper/011:30:280
134491650,2ptp4l0-21swapper/112:30:231
29309996431,6cyclictest41-21ksoftirqd/309:50:163
29309996429,3cyclictest41-21ksoftirqd/310:10:283
29309996334,4cyclictest41-21ksoftirqd/312:25:273
29309996331,6cyclictest41-21ksoftirqd/307:35:213
2930999632,17cyclictest0-21swapper/311:56:583
29309996233,7cyclictest41-21ksoftirqd/307:45:283
29309996231,6cyclictest41-21ksoftirqd/309:35:183
29309996231,3cyclictest41-21ksoftirqd/307:32:133
29309996230,8cyclictest41-21ksoftirqd/310:25:273
29309996230,4cyclictest41-21ksoftirqd/309:40:253
29309996229,3cyclictest41-21ksoftirqd/308:05:203
29309996227,4cyclictest41-21ksoftirqd/308:20:213
2930999622,22cyclictest0-21swapper/310:05:593
29309996138,3cyclictest41-21ksoftirqd/308:30:173
29309996129,7cyclictest41-21ksoftirqd/311:00:193
134491610,4ptp4l0-21swapper/208:10:232
29309996033,7cyclictest41-21ksoftirqd/308:35:203
29309996032,3cyclictest41-21ksoftirqd/311:20:163
29309996026,8cyclictest41-21ksoftirqd/310:20:173
134491600,4ptp4l0-21swapper/212:10:162
134491600,4ptp4l0-21swapper/211:36:582
29309995931,7cyclictest41-21ksoftirqd/312:35:003
29309995925,8cyclictest41-21ksoftirqd/309:20:153
29309995921,8cyclictest41-21ksoftirqd/309:02:543
29309995920,7cyclictest41-21ksoftirqd/312:00:423
134491590,4ptp4l31519-21ps10:40:232
134491590,3ptp4l0-21swapper/212:08:102
29309995829,6cyclictest41-21ksoftirqd/308:49:593
29309995829,3cyclictest41-21ksoftirqd/307:55:173
29309995828,6cyclictest41-21ksoftirqd/310:50:013
29309995828,6cyclictest41-21ksoftirqd/310:50:013
29309995827,6cyclictest41-21ksoftirqd/309:55:293
29309995824,7cyclictest41-21ksoftirqd/312:38:223
134491580,4ptp4l0-21swapper/008:10:570
134491580,3ptp4l14821-21apt-get12:25:130
134491580,3ptp4l0-21swapper/109:43:211
29309995730,6cyclictest41-21ksoftirqd/308:52:193
29309995729,6cyclictest41-21ksoftirqd/311:10:153
29309995724,9cyclictest41-21ksoftirqd/310:40:243
134491570,3ptp4l0-21swapper/110:55:261
134491570,3ptp4l0-21swapper/108:24:541
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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