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2026-05-22 - 16:49
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot3.osadl.org (updated Fri May 22, 2026 00:45:54)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
249442229173,45sleep20-21swapper/219:09:592
139491208164,33phc2sys0-21swapper/319:09:543
247092203170,22sleep00-21swapper/019:06:550
246152197164,22sleep10-21swapper/119:05:471
139391670,1ptp4l401ktimersoftd/323:03:233
279602560,2sleep20-21swapper/222:35:252
139391550,1ptp4l401ktimersoftd/321:35:233
139391550,1ptp4l401ktimersoftd/320:42:383
139391550,1ptp4l401ktimersoftd/320:35:213
13372530,2sleep01339-21sendmail_mailst19:25:240
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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