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2025-12-26 - 12:03
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackdslot3.osadl.org (updated Fri Dec 26, 2025 00:45:53)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
252852206173,22sleep00-21swapper/019:08:390
252832204170,23sleep30-21swapper/319:08:373
251642203171,21sleep10-21swapper/119:07:101
252872202169,22sleep20-21swapper/219:08:402
253912167129,13sleep20-21swapper/219:10:002
2568599635,16cyclictest27165-21sed19:10:243
264062590,4sleep026412-21irqrtprio19:10:170
2568599592,18cyclictest9961-21cstates23:05:153
2568599583,15cyclictest30149-21sendmail_mailst23:45:283
2568599583,15cyclictest13535-21awk23:10:283
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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