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2026-04-17 - 23:44
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Fri Apr 17, 2026 12:45:51)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
139491228165,51phc2sys0-21swapper/307:08:583
75852201168,22sleep20-21swapper/207:09:362
75022201168,22sleep10-21swapper/107:08:311
75782196163,22sleep00-21swapper/007:09:300
139391870,2ptp4l18080-21iostat_ios07:30:173
45032650,6sleep3791199cyclictest09:15:253
105302570,1sleep20-21swapper/210:35:232
277192540,4sleep30-21swapper/311:12:143
203582520,3sleep3791199cyclictest07:35:163
16032450,34sleep233-21ksoftirqd/208:04:562
139391440,0ptp4l401ktimersoftd/311:40:353
139391440,0ptp4l401ktimersoftd/309:10:173
7910994336,4cyclictest5174-21cron11:35:012
57898430,8rtkit-daemon0-21swapper/111:18:311
139391430,0ptp4l401ktimersoftd/310:44:023
139391420,1ptp4l391rcuc/311:30:183
139391420,0ptp4l401ktimersoftd/312:15:143
139391420,0ptp4l401ktimersoftd/310:17:083
139391420,0ptp4l401ktimersoftd/308:15:173
7909994135,4cyclictest28985-21cron12:25:001
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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