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2026-05-02 - 22:19
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Sat May 02, 2026 12:45:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
139491207171,25phc2sys0-21swapper/307:07:243
199422203171,21sleep20-21swapper/207:08:082
197542203171,21sleep10-21swapper/107:05:431
199402201168,22sleep00-21swapper/007:08:060
1477021780,5sleep12038799cyclictest10:20:141
139391690,1ptp4l391rcuc/308:50:213
20386996732,10cyclictest9-21ksoftirqd/010:45:010
20387996610,21cyclictest22524-21cpu09:30:141
20386996528,7cyclictest9-21ksoftirqd/009:00:140
2038799630,21cyclictest4642-21sed12:15:001
2038799630,21cyclictest26778-21df_abs10:45:151
20386996327,6cyclictest9-21ksoftirqd/010:20:190
181512630,1sleep20-21swapper/211:35:132
251672620,3sleep30-21swapper/309:35:153
20386996228,6cyclictest9-21ksoftirqd/007:40:010
20386996228,6cyclictest9-21ksoftirqd/007:40:000
20386996226,6cyclictest9-21ksoftirqd/009:35:140
2038799600,22cyclictest5225-21mailstats11:05:251
20386996026,6cyclictest9-21ksoftirqd/010:35:190
20386996026,3cyclictest9-21ksoftirqd/012:15:140
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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