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2026-03-21 - 22:19
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Sat Mar 21, 2026 12:45:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2322021700,6sleep12992799cyclictest08:00:371
953521540,7sleep12992799cyclictest08:19:271
2953729262,21sleep10-21swapper/107:09:191
2947429166,16sleep00-21swapper/007:08:310
1394919165,17phc2sys0-21swapper/307:05:413
2944628965,15sleep20-21swapper/207:08:092
299172830,4sleep229931-21spawn08:13:262
159852790,3sleep10-21swapper/108:21:221
296622710,2sleep20-21swapper/208:21:442
214082710,5sleep221140-21execl08:00:062
232882690,6sleep323260-21execl08:01:163
19772670,3sleep02007-21sh08:21:510
103642610,4sleep310367-21sh08:17:293
254562580,3sleep025441-21sh08:17:420
139391560,0ptp4l401ktimersoftd/307:10:103
219322530,3sleep021141-21execl08:00:160
59522490,3sleep25951-21sh08:19:532
29926994639,4cyclictest23119-21sh12:15:000
29929994413,29cyclictest11797-21kworker/3:009:46:233
139391430,1ptp4l401ktimersoftd/310:17:593
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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