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2026-08-08 - 08:37
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Sat Aug 08, 2026 00:45:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
139491237169,22phc2sys0-21swapper/319:05:273
38092203170,22sleep10-21swapper/119:09:471
37152199166,22sleep20-21swapper/219:08:372
35642196163,22sleep00-21swapper/019:06:380
382628970,11sleep20-21swapper/219:10:012
4120996710,16cyclictest19783-21/usr/sbin/munin19:40:192
139391620,1ptp4l401ktimersoftd/300:11:303
4120996010,15cyclictest19960-21switchtime21:55:252
312482590,4sleep30-21swapper/300:35:143
312482590,4sleep30-21swapper/300:35:143
412099589,10cyclictest14692-21irqrtprio21:45:192
4119995728,3cyclictest25-21ksoftirqd/123:25:241
412099560,11cyclictest26610-21date23:20:002
4119995528,7cyclictest25-21ksoftirqd/100:35:201
4119995528,7cyclictest25-21ksoftirqd/100:35:191
4119995526,4cyclictest25-21ksoftirqd/123:45:181
4119995418,4cyclictest25-21ksoftirqd/100:30:151
4121995346,4cyclictest24170-21wc23:15:003
412099530,12cyclictest409-21cat23:30:212
4119995324,7cyclictest25-21ksoftirqd/122:45:001
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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