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2025-12-24 - 05:24
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Wed Dec 24, 2025 00:45:52)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
21852205170,23sleep30-21swapper/319:06:363
24142204170,23sleep20-21swapper/219:09:272
22452203170,22sleep10-21swapper/119:07:221
21872200167,22sleep00-21swapper/019:06:360
1606421730,6sleep1279699cyclictest21:50:211
934321630,2sleep0279599cyclictest19:20:240
2795997312,19cyclictest16006-21cut00:05:210
279799630,21cyclictest27625-21/usr/sbin/munin00:30:142
279799621,21cyclictest10341-21date21:40:012
279799620,28cyclictest21258-21taskset20:55:012
279599624,27cyclictest32654-21seq21:16:580
279599624,27cyclictest32654-21seq21:16:570
279799610,23cyclictest27976-21sshd21:07:412
279799610,19cyclictest17419-21latency_hist21:55:012
2797995714,17cyclictest28130-21latency_hist23:25:002
279799570,23cyclictest8613-21chrt22:41:152
279599571,23cyclictest18621-21seq20:49:260
279799561,33cyclictest18675-21latency_hist20:50:002
279599550,2cyclictest12401-21seq21:43:460
139391550,1ptp4l401ktimersoftd/322:04:163
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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