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2026-07-29 - 06:39
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Wed Jul 29, 2026 00:45:54)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
205382229201,18sleep10-21swapper/119:05:591
208262205172,22sleep30-21swapper/319:09:473
208182202169,22sleep00-21swapper/019:09:390
205542202169,22sleep20-21swapper/219:06:122
2540721620,4sleep02113899cyclictest19:16:530
21138996830,10cyclictest9-21ksoftirqd/000:35:130
21138996130,4cyclictest9-21ksoftirqd/022:40:010
21138996031,4cyclictest9-21ksoftirqd/020:55:210
21138996029,4cyclictest9-21ksoftirqd/022:45:010
21138996028,4cyclictest9-21ksoftirqd/022:49:590
21138996027,5cyclictest9-21ksoftirqd/019:30:230
21138996027,4cyclictest9-21ksoftirqd/021:20:010
21138995931,4cyclictest9-21ksoftirqd/020:00:260
21138995928,3cyclictest9-21ksoftirqd/021:50:260
21138995926,12cyclictest9-21ksoftirqd/020:05:250
21138995917,9cyclictest9-21ksoftirqd/022:25:160
21138995829,4cyclictest9-21ksoftirqd/023:35:010
21138995829,3cyclictest9-21ksoftirqd/019:45:010
21138995828,4cyclictest9-21ksoftirqd/020:45:200
21138995828,3cyclictest9-21ksoftirqd/020:40:190
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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