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2026-09-22 - 09:06
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Tue Sep 22, 2026 00:45:52)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
139491224161,51phc2sys0-21swapper/319:08:113
243812204170,22sleep10-21swapper/119:09:561
242632203169,23sleep20-21swapper/219:08:242
242612201168,22sleep00-21swapper/019:08:220
2475821800,6sleep02468199cyclictest23:40:010
1394918564,11phc2sys0-21swapper/319:10:003
2438828263,11sleep20-21swapper/219:10:012
24684996218,10cyclictest41-21ksoftirqd/320:55:003
24684995717,4cyclictest41-21ksoftirqd/322:15:263
24683995626,4cyclictest33-21ksoftirqd/223:55:172
24683995625,3cyclictest33-21ksoftirqd/220:45:272
24683995425,4cyclictest33-21ksoftirqd/221:05:192
24683995425,4cyclictest33-21ksoftirqd/221:05:192
24683995424,3cyclictest33-21ksoftirqd/221:20:002
24683995424,3cyclictest33-21ksoftirqd/200:10:002
24683995422,5cyclictest33-21ksoftirqd/221:55:172
24683995422,3cyclictest33-21ksoftirqd/221:40:162
24683995328,7cyclictest33-21ksoftirqd/221:45:132
24683995320,4cyclictest33-21ksoftirqd/219:35:152
139391530,1ptp4l401ktimersoftd/300:01:143
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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