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2026-06-05 - 03:52
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Fri Jun 05, 2026 00:45:42)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
139491234168,23phc2sys0-21swapper/319:05:573
300872203170,22sleep00-21swapper/019:05:340
300932200168,21sleep10-21swapper/119:05:401
300892198165,22sleep20-21swapper/219:05:362
30730997130,4cyclictest33-21ksoftirqd/222:00:282
30730997029,8cyclictest33-21ksoftirqd/223:05:012
30729996812,54cyclictest0-21swapper/122:20:331
139391640,1ptp4l401ktimersoftd/321:25:283
30662610,2sleep20-21swapper/219:20:002
30730996018,8cyclictest33-21ksoftirqd/220:39:372
30730995917,8cyclictest33-21ksoftirqd/223:57:342
117432590,4sleep1241ktimersoftd/119:35:231
30730995819,5cyclictest33-21ksoftirqd/220:05:252
30730995819,4cyclictest33-21ksoftirqd/223:30:192
30730995819,4cyclictest33-21ksoftirqd/222:35:192
30730995729,8cyclictest33-21ksoftirqd/219:45:132
30730995720,9cyclictest33-21ksoftirqd/223:20:262
30730995720,9cyclictest33-21ksoftirqd/220:35:002
30730995719,9cyclictest33-21ksoftirqd/200:10:222
30730995719,8cyclictest33-21ksoftirqd/222:40:122
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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