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2025-12-03 - 11:30
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Wed Dec 03, 2025 00:45:45)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1531722460,7sleep341-21ksoftirqd/319:05:273
160432236169,22sleep20-21swapper/219:09:482
159222202169,22sleep10-21swapper/119:08:151
159212200167,23sleep00-21swapper/019:08:130
191432660,7sleep01635099cyclictest22:35:300
16350996310,12cyclictest24777-21grep22:50:130
289082610,6sleep128904-21ps00:05:201
16350996110,17cyclictest23914-21sort19:25:150
16350996110,11cyclictest4788-21wc19:50:280
136991610,1ptp4l28081-21irqstats20:40:183
1635099609,18cyclictest4305-21chrt21:00:050
1635099588,11cyclictest3218-21/usr/sbin/munin00:20:150
1635099586,15cyclictest0-21swapper/021:05:170
97722570,3sleep30-21swapper/320:00:283
1635099578,11cyclictest21145-21date21:35:010
1635099576,15cyclictest0-21swapper/020:50:230
16350995711,19cyclictest22233-21/usr/sbin/munin21:35:220
1635099568,17cyclictest478-21dbus-daemon23:45:240
1635099568,11cyclictest6684-21grep23:20:120
1635099568,10cyclictest29163-21cat19:35:200
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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