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2025-11-28 - 07:07
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Fri Nov 28, 2025 00:45:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
120382230163,22sleep20-21swapper/219:08:272
137191206172,22phc2sys0-21swapper/319:06:033
120462202168,23sleep00-21swapper/019:08:330
119042201168,22sleep10-21swapper/119:06:531
1210021700,5sleep11250699cyclictest20:15:201
739821370,2sleep20-21swapper/220:05:222
12508997011,57cyclictest16359-21kworker/3:220:33:473
136991570,1ptp4l391rcuc/323:58:063
1250899576,26cyclictest19526-21taskset23:52:283
12505995649,3cyclictest11157-21ls22:30:000
144732530,2sleep0101ktimersoftd/022:35:200
59298520,12rtkit-daemon591-21rtkit-daemon21:55:461
281932500,3sleep20-21swapper/219:40:232
1250899493,22cyclictest0-21swapper/320:38:173
1250899483,24cyclictest0-21swapper/321:58:243
1250899454,22cyclictest0-21swapper/300:38:543
59298440,2rtkit-daemon591-21rtkit-daemon23:41:350
136991430,0ptp4l401ktimersoftd/323:02:273
1250899436,26cyclictest12363-21taskset23:37:073
1250899436,23cyclictest8385-21seq20:09:013
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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