You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-02-07 - 11:13
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Sat Feb 07, 2026 00:45:42)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
139491204170,22phc2sys0-21swapper/319:05:063
196462202169,22sleep20-21swapper/219:09:072
195582202168,22sleep10-21swapper/119:07:581
195572197164,22sleep00-21swapper/019:07:580
634321630,6sleep32001099cyclictest22:00:213
139391770,0ptp4l401ktimersoftd/323:40:233
20009996934,4cyclictest33-21ksoftirqd/222:15:012
20009996534,4cyclictest33-21ksoftirqd/220:05:222
20009996431,7cyclictest33-21ksoftirqd/222:20:002
98242630,6sleep09811-21cron22:10:000
20009996331,4cyclictest33-21ksoftirqd/221:10:002
20009996327,7cyclictest33-21ksoftirqd/200:29:592
20009996231,3cyclictest33-21ksoftirqd/219:40:132
20009996229,4cyclictest33-21ksoftirqd/223:55:132
20009996223,7cyclictest33-21ksoftirqd/222:45:152
20009996126,5cyclictest33-21ksoftirqd/221:30:222
20009996031,4cyclictest33-21ksoftirqd/223:20:212
20009996030,4cyclictest33-21ksoftirqd/200:05:002
20009996029,4cyclictest33-21ksoftirqd/222:50:232
20009996028,4cyclictest33-21ksoftirqd/221:35:132
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional