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2026-08-22 - 11:20
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Sat Aug 22, 2026 00:45:54)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
139491232164,23phc2sys0-21swapper/319:08:263
139491232164,23phc2sys0-21swapper/319:08:263
242792207173,23sleep20-21swapper/219:05:052
242792207173,23sleep20-21swapper/219:05:042
262002204171,22sleep10-21swapper/119:07:121
262002204171,22sleep10-21swapper/119:07:121
263082202170,22sleep00-21swapper/019:08:360
263082202170,22sleep00-21swapper/019:08:350
2544121620,7sleep22671199cyclictest20:15:002
139391800,1ptp4l391rcuc/321:55:233
139391800,1ptp4l391rcuc/321:55:233
139391720,1ptp4l391rcuc/322:25:213
220892620,1sleep2311rcuc/221:15:142
86112610,4sleep08587-21cron19:40:010
86112610,4sleep08587-21cron19:40:000
2671299582,16cyclictest24304-21egrep21:20:133
149202570,5sleep014925-21cpuspeed_turbos21:00:110
2671299562,12cyclictest2759-21grep23:55:243
2671199560,2cyclictest30343-21/usr/sbin/munin19:15:232
173642560,1sleep20-21swapper/223:20:142
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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