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2026-07-01 - 17:40
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Wed Jul 01, 2026 12:45:44)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
370022100,5sleep00-21swapper/007:05:140
54582206173,22sleep20-21swapper/207:07:022
139491206173,22phc2sys0-21swapper/307:05:043
55702202169,22sleep10-21swapper/107:08:211
862021740,7sleep0598799cyclictest08:20:250
2541521430,5sleep2598999cyclictest10:05:012
2649621420,3sleep3599099cyclictest10:05:223
139391930,1ptp4l27852-21diskstats07:55:153
5987997528,4cyclictest9-21ksoftirqd/012:04:590
5987996727,5cyclictest9-21ksoftirqd/009:55:120
599099660,25cyclictest29173-21sendmail_mailqu10:10:243
5987996626,5cyclictest9-21ksoftirqd/010:00:140
5987996527,5cyclictest9-21ksoftirqd/012:15:130
5987996527,5cyclictest9-21ksoftirqd/012:15:130
5987996425,10cyclictest9-21ksoftirqd/009:30:010
5987996128,4cyclictest9-21ksoftirqd/012:30:280
5987996125,4cyclictest9-21ksoftirqd/010:40:250
5987996028,4cyclictest9-21ksoftirqd/011:40:130
5987996026,4cyclictest9-21ksoftirqd/011:20:000
5987995926,4cyclictest9-21ksoftirqd/007:30:180
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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