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2025-11-29 - 08:13
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Sat Nov 29, 2025 00:45:54)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
99602205171,23sleep30-21swapper/319:06:113
99232201168,22sleep20-21swapper/219:05:422
81332201167,22sleep10-21swapper/119:05:081
100142200167,22sleep00-21swapper/019:06:530
1950021620,5sleep21056099cyclictest22:50:152
837521290,4sleep28376-21grep20:10:242
837521290,4sleep28376-21grep20:10:242
136991810,1ptp4l391rcuc/321:50:263
136991810,1ptp4l391rcuc/320:00:103
10561996828,10cyclictest41-21ksoftirqd/323:10:003
10561996734,5cyclictest41-21ksoftirqd/319:59:593
65242650,4sleep36528-21fschecks_time21:15:163
10561996533,9cyclictest41-21ksoftirqd/300:20:013
10561996429,11cyclictest41-21ksoftirqd/319:55:003
10561996327,7cyclictest41-21ksoftirqd/320:15:003
10561996326,8cyclictest41-21ksoftirqd/321:00:233
10561996325,9cyclictest41-21ksoftirqd/319:35:003
10561996226,4cyclictest41-21ksoftirqd/320:45:183
10561996225,10cyclictest41-21ksoftirqd/323:20:173
10561996224,9cyclictest41-21ksoftirqd/319:20:253
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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