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2025-12-10 - 20:21
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Wed Dec 10, 2025 12:45:44)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
137191207173,22phc2sys0-21swapper/307:05:083
25792204170,23sleep10-21swapper/107:08:011
25462204170,22sleep00-21swapper/007:07:350
24252203169,22sleep20-21swapper/207:06:012
2552621620,5sleep1303899cyclictest07:55:171
2360121590,6sleep3304099cyclictest07:50:213
63132670,5sleep1303899cyclictest10:35:241
85122650,2sleep30-21swapper/309:35:013
3038996523,5cyclictest25-21ksoftirqd/111:40:131
3038996330,3cyclictest25-21ksoftirqd/109:45:011
3038996322,3cyclictest25-21ksoftirqd/108:45:221
3037996131,4cyclictest9-21ksoftirqd/007:35:000
3038996028,3cyclictest25-21ksoftirqd/112:15:001
3038995923,4cyclictest25-21ksoftirqd/109:09:071
3038995829,4cyclictest25-21ksoftirqd/107:10:241
3037995825,6cyclictest9-21ksoftirqd/010:45:260
3038995727,4cyclictest25-21ksoftirqd/110:40:151
3038995723,9cyclictest25-21ksoftirqd/108:29:591
3038995722,7cyclictest25-21ksoftirqd/112:00:001
3038995721,4cyclictest25-21ksoftirqd/108:10:211
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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