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2026-06-24 - 07:42
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Wed Jun 24, 2026 00:45:54)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
324332219154,21sleep10-21swapper/119:05:501
139491209174,24phc2sys0-21swapper/319:07:043
326592205172,22sleep00-21swapper/019:08:470
325062203169,23sleep20-21swapper/219:06:492
1207921230,2sleep360999cyclictest00:00:293
112252660,4sleep0101ktimersoftd/021:45:190
139391640,0ptp4l401ktimersoftd/321:18:003
280342630,2sleep20-21swapper/200:35:182
608996126,5cyclictest33-21ksoftirqd/223:50:152
608996126,5cyclictest33-21ksoftirqd/221:00:232
608996124,9cyclictest33-21ksoftirqd/200:20:262
608996030,3cyclictest33-21ksoftirqd/219:20:182
608996029,4cyclictest33-21ksoftirqd/223:20:162
608996026,9cyclictest33-21ksoftirqd/222:55:272
608996026,9cyclictest33-21ksoftirqd/222:20:192
608996026,5cyclictest33-21ksoftirqd/220:35:242
608995920,6cyclictest33-21ksoftirqd/200:00:232
608995828,9cyclictest33-21ksoftirqd/219:15:192
608995825,6cyclictest33-21ksoftirqd/219:30:152
608995825,4cyclictest33-21ksoftirqd/200:10:222
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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