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2026-06-21 - 04:34
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Sun Jun 21, 2026 00:45:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
205382206173,22sleep10-21swapper/119:09:411
203252206172,22sleep20-21swapper/219:06:572
203262205173,21sleep30-21swapper/319:06:573
202292203170,22sleep00-21swapper/019:05:470
139391680,1ptp4l401ktimersoftd/321:40:183
307442590,6sleep22085699cyclictest20:35:232
4582570,5sleep12085599cyclictest19:35:001
171022550,6sleep02085499cyclictest23:30:190
287062530,2sleep30-21swapper/319:25:153
20856995214,5cyclictest33-21ksoftirqd/222:00:012
139391520,0ptp4l401ktimersoftd/323:01:523
139391520,0ptp4l401ktimersoftd/320:14:593
92352490,1sleep39237-21grep19:50:233
20857994537,5cyclictest8717-21cron21:00:013
139391450,0ptp4l401ktimersoftd/320:52:173
20857994437,4cyclictest23192-21cron21:30:003
139391430,1ptp4l401ktimersoftd/300:06:403
139391430,0ptp4l401ktimersoftd/322:00:533
139391430,0ptp4l401ktimersoftd/322:00:533
139391430,0ptp4l401ktimersoftd/321:33:493
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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