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2026-06-20 - 04:08
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Sat Jun 20, 2026 00:45:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1488122280,14sleep30-21swapper/319:05:273
153702206172,23sleep20-21swapper/219:08:522
152042205173,21sleep10-21swapper/119:06:431
154362204171,22sleep00-21swapper/019:09:430
2341821440,7sleep01574999cyclictest21:40:140
2709421370,2sleep21575199cyclictest19:30:342
1590621320,5sleep11575099cyclictest21:25:021
1545828262,11sleep10-21swapper/119:10:001
15749996811,21cyclictest14123-21seq20:12:440
65462640,1sleep10-21swapper/122:10:241
1575099626,54cyclictest0-21swapper/120:21:131
15749996010,22cyclictest12844-21df_abs22:25:140
293622580,2sleep10-21swapper/100:05:251
139391550,1ptp4l401ktimersoftd/321:25:183
139391540,1ptp4l401ktimersoftd/322:45:573
139391530,1ptp4l401ktimersoftd/300:25:203
139391500,1ptp4l401ktimersoftd/321:56:093
15751994742,3cyclictest22795-21sh21:40:002
15751994538,4cyclictest9910-21cron22:20:002
57898440,2rtkit-daemon0-21swapper/221:17:352
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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