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2026-06-26 - 12:35
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Fri Jun 26, 2026 00:45:53)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
139491207173,22phc2sys0-21swapper/319:07:113
218892204170,22sleep10-21swapper/119:09:141
218812204171,22sleep00-21swapper/019:09:100
217272204170,23sleep20-21swapper/219:07:152
3103321690,7sleep12223999cyclictest20:35:191
259672750,1sleep00-21swapper/021:30:250
2224099642,60cyclictest11169-21kworker/2:100:25:342
2224099616,16cyclictest14180-21chrt23:22:402
2224099595,17cyclictest9464-21smartctl19:50:162
34742570,2sleep00-21swapper/020:45:170
2224099557,10cyclictest16688-21taskset21:11:242
122152550,6sleep02223899cyclictest19:55:180
2224099547,11cyclictest30674-21chrt23:56:272
2224099546,11cyclictest24101-21taskset21:29:542
2224099544,17cyclictest26460-21/usr/sbin/munin23:50:162
2224099544,10cyclictest323772sleep220:39:132
2224099537,13cyclictest28752-21chrt21:38:502
2224099537,12cyclictest29775-21chrt22:47:102
2224099536,12cyclictest29134-21taskset19:24:532
2224099536,11cyclictest1435-21chrt19:34:342
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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