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2026-08-05 - 20:53
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Wed Aug 05, 2026 12:45:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
139491233168,23phc2sys0-21swapper/307:05:243
87792212145,22sleep00-21swapper/007:06:080
88352204171,22sleep10-21swapper/107:06:521
87212202168,22sleep20-21swapper/207:05:222
9372997039,2cyclictest41-21ksoftirqd/312:40:003
9372996933,7cyclictest41-21ksoftirqd/311:19:353
9372996933,5cyclictest41-21ksoftirqd/311:20:033
9372996736,7cyclictest41-21ksoftirqd/311:55:003
9372996528,7cyclictest41-21ksoftirqd/311:57:393
9372996337,3cyclictest41-21ksoftirqd/312:07:283
89462630,5sleep1616-21gdbus11:19:421
9372996029,4cyclictest41-21ksoftirqd/311:30:013
9372996028,7cyclictest41-21ksoftirqd/310:50:013
9372995929,4cyclictest41-21ksoftirqd/308:19:593
9372995928,4cyclictest41-21ksoftirqd/309:05:013
936999598,7cyclictest9-21ksoftirqd/011:57:400
9372995830,7cyclictest41-21ksoftirqd/311:15:013
9372995829,7cyclictest41-21ksoftirqd/311:45:223
9372995829,7cyclictest41-21ksoftirqd/311:30:243
9372995829,7cyclictest41-21ksoftirqd/310:35:303
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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