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2026-06-14 - 14:44
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Sun Jun 14, 2026 00:45:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
299422244200,34sleep20-21swapper/219:07:592
299422244200,34sleep20-21swapper/219:07:592
298742237171,22sleep10-21swapper/119:07:091
298742237171,22sleep10-21swapper/119:07:091
139491232164,23phc2sys0-21swapper/319:09:503
139491232164,23phc2sys0-21swapper/319:09:503
299972203170,22sleep00-21swapper/019:08:410
299972203170,22sleep00-21swapper/019:08:410
199752690,7sleep03039099cyclictest22:10:010
312832630,7sleep33039399cyclictest23:40:173
30393996128,3cyclictest41-21ksoftirqd/323:25:273
141942580,2sleep30-21swapper/320:50:173
54782550,3sleep30-21swapper/319:25:123
139391520,0ptp4l401ktimersoftd/300:37:273
30392995145,3cyclictest15907-21sh20:54:592
30393994926,15cyclictest41-21ksoftirqd/321:15:243
30393994924,7cyclictest41-21ksoftirqd/300:30:143
3039199491,45cyclictest20033-21idleruntime-cro00:24:591
30393994815,3cyclictest41-21ksoftirqd/322:15:203
30393994718,3cyclictest41-21ksoftirqd/320:30:123
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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