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2025-12-02 - 09:01
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Tue Dec 02, 2025 00:45:46)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
59272204168,24sleep30-21swapper/319:05:073
77572203171,21sleep10-21swapper/119:06:101
77582200167,22sleep20-21swapper/219:06:102
77512197163,23sleep00-21swapper/019:06:040
1302621470,6sleep1836199cyclictest21:35:001
2087821400,3sleep1836199cyclictest00:05:161
272252710,4sleep027221-21irqrtprio23:10:190
8363996024,6cyclictest41-21ksoftirqd/322:55:153
8363995922,3cyclictest41-21ksoftirqd/300:05:173
8363995629,3cyclictest41-21ksoftirqd/321:30:263
8363995525,7cyclictest41-21ksoftirqd/322:20:013
136991550,1ptp4l401ktimersoftd/300:10:063
136991500,1ptp4l401ktimersoftd/323:55:313
8363994914,7cyclictest41-21ksoftirqd/320:49:593
8363994818,7cyclictest41-21ksoftirqd/321:05:003
8363994739,4cyclictest223-21systemd-journal23:50:003
8363994739,4cyclictest223-21systemd-journal23:50:003
8363994618,4cyclictest41-21ksoftirqd/300:25:183
8363994615,4cyclictest41-21ksoftirqd/323:35:173
8363994516,4cyclictest41-21ksoftirqd/323:10:173
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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