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2026-04-23 - 04:53
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Thu Apr 23, 2026 00:45:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
139491226159,23phc2sys0-21swapper/319:06:093
260752209176,22sleep10-21swapper/119:08:251
261012202169,22sleep20-21swapper/219:08:462
261292201168,22sleep00-21swapper/019:09:090
26638995713,22cyclictest7879-21/usr/sbin/munin20:45:173
57898490,12rtkit-daemon577-21rtkit-daemon00:15:140
26636994943,3cyclictest19660-21basename23:25:001
139391490,1ptp4l0-21swapper/319:45:053
82962430,1sleep20-21swapper/221:50:242
26637994337,4cyclictest26840-21cron21:25:002
26637994334,3cyclictest33-21ksoftirqd/220:40:002
139391430,0ptp4l401ktimersoftd/321:35:203
139391420,0ptp4l401ktimersoftd/300:25:353
139391420,0ptp4l401ktimersoftd/300:25:343
139391420,0ptp4l401ktimersoftd/300:01:153
1394914132,5phc2sys0-21swapper/319:10:023
26637994036,2cyclictest29207-21cron21:30:002
26636993934,3cyclictest25-21ksoftirqd/119:45:011
139391390,1ptp4l391rcuc/320:05:113
26636993832,4cyclictest25-21ksoftirqd/121:00:121
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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