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2026-08-30 - 03:40
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Sun Aug 30, 2026 00:46:07)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
139491214181,22phc2sys0-21swapper/319:09:133
135332204171,22sleep10-21swapper/119:09:551
133922202169,22sleep00-21swapper/019:08:060
135292201169,22sleep20-21swapper/219:09:532
525821830,7sleep01383299cyclictest23:20:230
525821830,7sleep01383299cyclictest23:20:230
1354028162,10sleep20-21swapper/219:10:002
139391790,1ptp4l391rcuc/320:50:193
139391790,1ptp4l391rcuc/320:50:193
13834997433,5cyclictest33-21ksoftirqd/220:40:002
139391730,1ptp4l391rcuc/320:35:243
13834996734,5cyclictest33-21ksoftirqd/200:10:002
13832996732,8cyclictest9-21ksoftirqd/022:05:140
13834996632,6cyclictest33-21ksoftirqd/220:00:232
13834996632,6cyclictest33-21ksoftirqd/220:00:232
13834996630,6cyclictest33-21ksoftirqd/220:40:152
13834996625,6cyclictest33-21ksoftirqd/223:50:122
13834996625,6cyclictest33-21ksoftirqd/223:50:122
13834996527,6cyclictest33-21ksoftirqd/222:30:002
1383599647,10cyclictest3296-21grep19:55:133
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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