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2026-04-25 - 20:49
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Sat Apr 25, 2026 12:45:52)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
139491206172,23phc2sys0-21swapper/307:05:083
229932205172,22sleep20-21swapper/207:07:052
232032201168,22sleep00-21swapper/007:09:480
231772200167,22sleep10-21swapper/107:09:281
1581021540,5sleep32351799cyclictest08:00:163
38021470,4sleep12351599cyclictest11:55:271
179021360,4sleep02351499cyclictest12:00:140
108592650,7sleep32351799cyclictest08:55:233
23515996326,10cyclictest25-21ksoftirqd/111:50:201
23515996026,9cyclictest25-21ksoftirqd/109:25:001
98792590,2sleep20-21swapper/212:15:242
131072580,3sleep313103-21ls12:25:013
2351499544,11cyclictest1913-21grep09:45:180
306042530,2sleep10-21swapper/107:25:001
2351499531,17cyclictest15531-21/usr/sbin/munin10:15:240
2351599505,6cyclictest25-21ksoftirqd/108:35:201
2351599501,5cyclictest25-21ksoftirqd/110:15:131
2351599493,6cyclictest25-21ksoftirqd/112:30:121
23515994930,8cyclictest25-21ksoftirqd/111:25:001
2351599492,5cyclictest25-21ksoftirqd/111:05:151
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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