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2026-06-11 - 00:01
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Wed Jun 10, 2026 12:45:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
210092229166,52sleep20-21swapper/207:09:102
139491204169,23phc2sys0-21swapper/307:05:113
208382203170,22sleep00-21swapper/007:07:030
208142203171,21sleep10-21swapper/107:06:431
21370995711,22cyclictest5655-21/usr/sbin/munin07:45:203
199252570,3sleep319922-21apt-config08:15:013
139391500,1ptp4l391rcuc/312:07:173
57898480,2rtkit-daemon0-21swapper/110:20:561
57898440,2rtkit-daemon0-21swapper/108:45:561
57898430,8rtkit-daemon0-21swapper/107:34:241
57898430,7rtkit-daemon0-21swapper/111:56:321
139391430,0ptp4l401ktimersoftd/312:00:193
139391430,0ptp4l401ktimersoftd/309:03:123
139391430,0ptp4l401ktimersoftd/308:06:323
57898420,8rtkit-daemon0-21swapper/108:23:081
21369994236,4cyclictest5542-21sh09:59:592
21369994211,18cyclictest24171-21df_abs11:45:142
21369994211,18cyclictest24171-21df_abs11:45:142
139391420,0ptp4l401ktimersoftd/311:25:403
139391420,0ptp4l401ktimersoftd/311:07:473
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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