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2026-06-03 - 16:38
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Wed Jun 03, 2026 00:45:43)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
49252205172,22sleep20-21swapper/219:09:572
46972205174,21sleep10-21swapper/119:06:591
47462203170,22sleep30-21swapper/319:07:373
47432201168,22sleep00-21swapper/019:07:340
139391960,3ptp4l522499cyclictest19:20:513
5223997229,6cyclictest33-21ksoftirqd/222:00:182
139391650,0ptp4l401ktimersoftd/322:07:293
5223996329,6cyclictest33-21ksoftirqd/222:25:002
5223996327,6cyclictest33-21ksoftirqd/220:05:002
5223996227,5cyclictest33-21ksoftirqd/220:35:192
5223996226,6cyclictest33-21ksoftirqd/200:00:142
5223996226,5cyclictest33-21ksoftirqd/200:20:192
139391620,1ptp4l401ktimersoftd/300:39:543
5223996130,3cyclictest33-21ksoftirqd/223:30:142
5223996129,4cyclictest33-21ksoftirqd/219:45:192
5223996127,4cyclictest33-21ksoftirqd/221:35:212
5223996126,6cyclictest33-21ksoftirqd/200:10:222
5223996126,6cyclictest33-21ksoftirqd/200:10:222
157032610,4sleep125-21ksoftirqd/119:40:201
139391610,10ptp4l401ktimersoftd/319:14:443
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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