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2025-11-19 - 10:50
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Wed Nov 19, 2025 00:45:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
259282230164,23sleep30-21swapper/319:09:233
257422202169,22sleep20-21swapper/219:06:582
258022201168,22sleep00-21swapper/019:07:430
257082201168,22sleep10-21swapper/119:06:351
3080021740,5sleep22627199cyclictest23:45:252
26269996725,6cyclictest9-21ksoftirqd/022:29:540
26269996627,3cyclictest9-21ksoftirqd/000:15:300
136991660,1ptp4l401ktimersoftd/322:20:163
26269996426,10cyclictest9-21ksoftirqd/021:35:010
26269996425,9cyclictest9-21ksoftirqd/021:15:160
26269996425,9cyclictest9-21ksoftirqd/021:15:150
26269996425,10cyclictest9-21ksoftirqd/021:55:250
26269996326,9cyclictest9-21ksoftirqd/020:05:150
319102620,5sleep22627199cyclictest19:20:202
26269996123,10cyclictest9-21ksoftirqd/022:05:160
26269996121,8cyclictest9-21ksoftirqd/019:45:170
26269996121,10cyclictest9-21ksoftirqd/023:05:150
33992600,2sleep00-21swapper/020:35:240
26269996024,9cyclictest9-21ksoftirqd/020:30:200
26269996023,4cyclictest9-21ksoftirqd/023:35:250
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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