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2026-07-16 - 23:22
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Thu Jul 16, 2026 12:45:46)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
279192239169,23sleep20-21swapper/207:05:552
139491209176,22phc2sys0-21swapper/307:05:313
281312204172,22sleep10-21swapper/107:08:381
281252202169,22sleep00-21swapper/007:08:340
170392980,3sleep117042-21mailstats07:50:231
139391800,1ptp4l29065-21timerandwakeup08:15:273
139391690,1ptp4l401ktimersoftd/309:25:163
38612630,2sleep10-21swapper/108:30:261
139391580,1ptp4l401ktimersoftd/309:55:113
139391560,1ptp4l401ktimersoftd/307:18:553
2291825420,9sleep125-21ksoftirqd/108:05:151
46422520,2sleep00-21swapper/010:50:130
58722510,1sleep25873-21ls07:30:012
226272510,1sleep20-21swapper/212:35:132
28671994741,3cyclictest25870-21latency_hist09:19:593
139391420,0ptp4l401ktimersoftd/308:41:403
28671994135,4cyclictest28176-21dump-pmu-power11:40:003
28670994127,12cyclictest33-21ksoftirqd/209:00:192
139391410,34ptp4l0-21swapper/307:10:013
28670994036,3cyclictest33-21ksoftirqd/210:55:002
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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