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2026-07-07 - 23:09
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackdslot3.osadl.org (updated Tue Jul 07, 2026 12:45:40)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
139491211169,31phc2sys0-21swapper/307:06:013
273972207174,22sleep00-21swapper/007:05:360
276382204170,23sleep20-21swapper/207:08:052
273932202170,21sleep10-21swapper/107:05:341
3187721390,3sleep22808999cyclictest10:40:132
1790221170,3sleep10-21swapper/107:55:171
139391800,1ptp4l4959-21taskset11:55:443
160582620,3sleep30-21swapper/311:15:003
46482610,6sleep02808799cyclictest11:55:250
9782560,2sleep3983-21hwlatdetect07:20:153
139391560,1ptp4l401ktimersoftd/309:06:413
2809099549,11cyclictest41-21ksoftirqd/308:45:003
28090995120,7cyclictest41-21ksoftirqd/310:20:013
109932500,1sleep310995-21missed_timers09:55:213
28090994919,7cyclictest41-21ksoftirqd/309:25:013
28089994932,15cyclictest16878-21cron07:55:002
65172480,2sleep10-21swapper/109:45:241
28090994816,8cyclictest41-21ksoftirqd/310:50:003
28090994717,2cyclictest41-21ksoftirqd/310:55:193
28090994615,4cyclictest41-21ksoftirqd/309:30:013
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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