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2026-11-10 - 09:32
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot1.osadl.org (updated Mon Nov 09, 2026 12:43:47)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1319981320,76rtkit-daemon0-21swapper/307:07:173
1239881211958,48sleep10-21swapper/107:08:191
1239907211859,20sleep20-21swapper/207:08:412
1239962211358,42sleep00-21swapper/007:09:230
15416902290,2sleep30-21swapper/310:30:393
16610452230,1sleep20-21swapper/211:40:252
16119422200,1sleep20-21swapper/211:14:182
14914792190,1sleep00-21swapper/010:02:520
1240266991812,5cyclictest0-21swapper/309:16:283
124026699171,15cyclictest1724218-21sh12:19:593
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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