You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-09-10 - 17:16
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 10 highest latencies:
System rackeslot2.osadl.org (updated Thu Sep 10, 2026 12:43:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
61411221100,2sleep30-21swapper/311:54:373
46558821100,2sleep1465586-21munin-run10:30:011
62749621060,2sleep0627491-21ssh12:04:330
2832892970,1sleep00-21swapper/008:40:080
6226042310,2sleep1622608-21kthreadcore11:59:361
4035612250,3sleep30-21swapper/309:54:433
156161992518,6cyclictest1188-21runrttasks10:15:370
156161992418,2cyclictest82050irq/121-eno109:09:420
156162992320,2cyclictest296852-21systemd-run08:50:011
156161992314,8cyclictest540943-21kthreadcore11:14:350
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional