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2026-08-24 - 06:49
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackeslot2.osadl.org (updated Mon Aug 24, 2026 00:43:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
86062021120,2sleep30-21swapper/323:55:013
77261321060,2sleep20-21swapper/223:05:012
6120712840,2sleep30-21swapper/321:35:023
5421182810,1sleep0542122-21tr20:50:060
5421182810,1sleep0542122-21tr20:50:060
6581742340,2sleep20-21swapper/222:00:032
6668312250,2sleep20-21swapper/222:05:042
403440992522,2cyclictest592277-21cpuspeed_turbos21:24:570
403440992415,5cyclictest376-21systemd-journal21:13:100
40344299230,7cyclictest0-21swapper/223:19:402
7069282210,2sleep30-21swapper/322:27:143
403441992116,1cyclictest191rcu_preempt22:25:081
40344199209,5cyclictest376-21systemd-journal00:07:111
403441992017,2cyclictest24813-21gsd-housekeepin23:02:501
40344099208,7cyclictest0-21swapper/022:49:470
403440992012,2cyclictest24615-21JS14:54:060
403442991916,1cyclictest0-21swapper/222:45:002
40344199193,9cyclictest738912-1kthreadcore22:45:041
403441991915,3cyclictest376-21systemd-journal19:20:021
40344199191,3cyclictest664942-21munin-run22:05:021
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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