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2026-08-15 - 22:14
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackeslot2.osadl.org (updated Sat Aug 15, 2026 12:43:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
206839721080,1sleep016-21ksoftirqd/007:30:240
22939562420,1sleep10-21swapper/110:20:251
2041417992616,5cyclictest838-21gmain10:35:050
22501602250,3sleep12250165-21sed09:50:271
2041421992514,4cyclictest0-21swapper/210:40:012
204141799258,8cyclictest0-21swapper/010:14:580
2041421992421,1cyclictest0-21swapper/212:25:012
2041420992420,2cyclictest0-21swapper/112:35:031
2041420992420,2cyclictest0-21swapper/112:35:031
2041420992320,2cyclictest2392376-21grep11:30:011
2041420992320,2cyclictest2384992-21/usr/sbin/munin11:25:011
2041417992314,8cyclictest0-21swapper/011:24:570
2041417992219,2cyclictest1-21systemd09:15:010
2041421992119,1cyclictest0-21swapper/211:55:022
2041421992118,1cyclictest0-21swapper/210:35:012
2041420992118,2cyclictest2473809-21/usr/sbin/munin12:25:011
2041417992118,2cyclictest2392494-21systemd-run11:30:020
2041417992118,2cyclictest2260604-21grep10:00:210
2041417992118,2cyclictest2075551-21sh07:40:010
2041417992115,1cyclictest2408114-21expr11:40:170
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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