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2026-05-22 - 11:33
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackeslot2.osadl.org (updated Fri May 22, 2026 00:43:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
320292521600,2sleep30-21swapper/322:05:013
337786721100,3sleep13355489-21kworker/1:0+cgroup_destroy23:59:591
32759462990,2sleep30-21swapper/322:50:063
31476862980,2sleep30-21swapper/321:27:333
32872732370,3sleep11-21systemd23:00:021
33300782360,0sleep13330079-21/usr/sbin/munin23:25:111
2969959993229,2cyclictest3393736-21apt-key00:10:010
31417632300,2sleep03141625-21ssh21:25:010
31797222290,2sleep20-21swapper/221:50:012
2969962992522,2cyclictest3417047-21latency_hist00:25:031
31125852240,2sleep0171ktimers/021:05:010
2969967992421,1cyclictest0-21swapper/223:25:022
2969967992421,1cyclictest0-21swapper/220:35:002
2969967992421,1cyclictest0-21swapper/219:55:012
2969959992421,2cyclictest3093549-21apt20:50:000
2969959992421,2cyclictest1290-21dbus-daemon23:50:010
2969959992413,6cyclictest0-21swapper/000:25:010
2969962992315,3cyclictest0-21swapper/123:50:001
2969959992312,6cyclictest3424625-21packagekitd00:34:570
2969959992312,6cyclictest0-21swapper/000:10:080
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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