You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-08-13 - 19:39
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackeslot2.osadl.org (updated Thu Aug 13, 2026 12:43:58)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
286735021050,1sleep00-21swapper/011:30:320
26184552550,2sleep30-21swapper/308:40:213
2510008993016,5cyclictest0-21swapper/009:20:000
2510008992918,10cyclictest2895166-21kthreadcore11:50:270
2510009992825,2cyclictest2965084-21latency_hist12:40:011
2510009992825,2cyclictest2965084-21latency_hist12:40:011
2510012992522,1cyclictest0-21swapper/210:15:022
2510008992521,3cyclictest664-21dbus-daemon12:00:030
2510008992420,2cyclictest0-21swapper/011:05:020
251001299232,8cyclictest0-21swapper/209:50:022
26898552220,2sleep30-21swapper/309:31:553
2510012992220,1cyclictest0-21swapper/211:30:022
2510009992219,2cyclictest2574693-21sh08:05:011
2510009992219,2cyclictest2510004-21cyclictest11:15:021
2510009992217,1cyclictest69250irq/121-eno112:30:021
2510009992211,6cyclictest759-1atopacctd11:04:091
2510012992119,1cyclictest0-21swapper/212:25:022
2510012992118,1cyclictest0-21swapper/211:35:012
2510012992118,1cyclictest0-21swapper/207:55:022
2510009992118,2cyclictest2735467-21latency_hist10:05:021
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional