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2026-09-05 - 09:42
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackeslot2.osadl.org (updated Sat Sep 05, 2026 00:43:58)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
152935821740,2sleep30-21swapper/300:09:483
145694221690,2sleep30-21swapper/323:29:433
145320721200,1sleep01453196-21apt-get23:29:200
121689221040,2sleep30-21swapper/321:14:413
153826321010,2sleep30-21swapper/300:14:493
15392972980,2sleep30-21swapper/300:15:093
11206782980,1sleep30-21swapper/320:04:433
13913172270,2sleep30-21swapper/322:53:513
1045305992517,4cyclictest1247818-21proc_pri21:29:470
1045306992413,3cyclictest932-1atopacctd22:19:461
1045306992413,3cyclictest932-1atopacctd22:19:461
1045306992412,3cyclictest0-21swapper/122:05:011
1045305992410,8cyclictest0-21swapper/000:35:350
1045306992314,3cyclictest1382976-21aten_repower_vo22:49:321
2213291221,4phc2sys0-21swapper/322:10:033
1045306992211,3cyclictest0-21swapper/123:15:011
1045305992218,3cyclictest1150910-21timerwakeupswit20:24:500
104530699216,4cyclictest0-21swapper/100:04:201
104530599218,9cyclictest0-21swapper/022:20:380
1045305992118,2cyclictest1192240-21mailstats20:54:480
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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