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2026-09-03 - 05:05
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackeslot2.osadl.org (updated Thu Sep 03, 2026 00:43:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
10325782930,1sleep30-21swapper/319:59:233
967349992815,8cyclictest1377330-21aten_repower_en23:29:280
967349992716,10cyclictest813-21systemd-logind23:40:040
96734999270,5cyclictest1418852-21tr23:49:520
967349992614,8cyclictest1232559-21threads22:04:520
967349992412,8cyclictest1334015-21irqcore23:04:470
967349992412,8cyclictest1139393-21kthreadcore21:14:480
96734999231,3cyclictest1466833-21diskstats00:19:400
96734999223,6cyclictest11019862ls20:49:410
967349992217,4cyclictest997378-21cron19:30:010
2213291225,2phc2sys0-21swapper/322:12:003
96734999216,10cyclictest0-21swapper/021:22:470
96734999215,2cyclictest0-21swapper/022:52:490
96734999215,10cyclictest0-21swapper/023:09:290
96734999215,10cyclictest0-21swapper/023:09:290
96734999214,4cyclictest1213438-21cut21:54:480
967349992115,5cyclictest24615-21JS14:54:060
96734999210,3cyclictest1243007-21chrt22:12:000
96734999208,11cyclictest1437209-21munin-run00:00:010
96734999207,8cyclictest0-21swapper/000:39:430
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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