You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-07-17 - 22:23
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackeslot2.osadl.org (updated Fri Jul 17, 2026 12:43:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
335716321040,2sleep30-21swapper/311:21:163
33072062780,1sleep03307208-21kthreadcore10:46:180
32717552730,1sleep03271746-21ssh10:21:250
32862002310,1sleep30-21swapper/310:31:183
32668432260,2sleep30-21swapper/310:21:123
3012880992320,2cyclictest3142781-21latency_hist08:55:001
1157598230,8rtkit-daemon1309-21mta-sts-daemon09:26:141
3012880992219,2cyclictest3012877-21cyclictest11:10:011
3012880992216,2cyclictest0-21swapper/112:10:031
3012879992219,2cyclictest3198406-21apt-key09:35:010
3012879992219,2cyclictest0-21swapper/010:06:140
3012881992119,0cyclictest0-21swapper/209:40:012
3012881992118,1cyclictest0-21swapper/211:10:012
3012880992118,2cyclictest3377620-21idleruntime-cro11:35:011
3012880992118,2cyclictest3020084-21systemd07:15:021
3012880992118,2cyclictest1-21systemd09:20:021
3012880992115,4cyclictest1-21systemd11:30:011
3012880992115,2cyclictest69250irq/121-eno111:45:291
3012879992113,7cyclictest0-21swapper/007:40:010
3012881992017,1cyclictest0-21swapper/207:30:002
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional