You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-06-24 - 22:22
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackeslot2.osadl.org (updated Wed Jun 24, 2026 12:43:55)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
40800112990,2sleep30-21swapper/307:10:033
1102252680,1sleep0110223-21ssh10:02:130
3111392670,1sleep1311138-21ssh12:17:411
41423792350,1sleep00-21swapper/008:00:100
1978022330,1sleep20-21swapper/211:00:102
1728102310,2sleep30-21swapper/310:45:083
4079464992823,3cyclictest0-21swapper/107:20:001
4079463992718,7cyclictest163659-21cpuspeed_turbos10:40:030
4079464992623,2cyclictest4079534-21latency_hist07:10:021
4079465992521,2cyclictest0-21swapper/208:50:022
4079464992522,2cyclictest304888-21cpuspeed_turbos12:15:011
4079463992415,5cyclictest104025-21systemd-run10:00:010
4079464992320,2cyclictest126160-21latency_hist10:15:001
4079464992317,2cyclictest67250irq/126-eno111:05:021
4079464992314,3cyclictest0-21swapper/108:50:011
407946399233,13cyclictest660-21dbus-daemon07:40:010
4079463992320,2cyclictest66932-21aten_repower_fr09:35:030
4079463992320,2cyclictest148438-21systemd10:30:010
4079463992317,5cyclictest0-21swapper/009:10:010
4079463992316,6cyclictest210989-21kthreadcore11:10:090
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional