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2026-08-12 - 14:48
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackeslot2.osadl.org (updated Wed Aug 12, 2026 00:43:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
415974721700,2sleep30-21swapper/322:10:023
7502721110,2sleep30-21swapper/323:20:333
1271222740,1sleep0127120-21ssh23:55:450
508412730,1sleep050845-21tr23:05:310
41138342390,2sleep30-21swapper/321:36:233
3922283992724,2cyclictest4159672-21grep22:10:021
3922282992320,2cyclictest3985515-21munin-plugin-st20:00:010
3922282992320,2cyclictest0-21swapper/022:25:010
3922282992314,6cyclictest38274-21timerwakeupswit22:55:350
3922284992219,1cyclictest0-21swapper/223:05:292
3922283992219,2cyclictest4122662-21grep21:45:021
3922282992219,2cyclictest0-21swapper/023:45:020
3922282992218,3cyclictest0-21swapper/021:55:010
3922282992212,5cyclictest714-21gdbus21:05:020
3922284992118,1cyclictest0-21swapper/223:25:012
3922283992118,2cyclictest91583-21cron23:35:011
3922283992118,2cyclictest4167050-21grep22:15:021
3922283992118,2cyclictest188472-21gpgconf00:40:011
3922282992115,5cyclictest17450-21cron22:45:000
3922282992115,2cyclictest4073679-21grep21:10:300
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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