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2026-06-27 - 16:16
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackeslot2.osadl.org (updated Sat Jun 27, 2026 12:43:55)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
13699812960,2sleep20-21swapper/208:25:022
15848752460,1sleep11584879-21wc10:55:061
1279263993229,2cyclictest1699832-21systemd12:15:020
1279263992917,10cyclictest1462012-21systemd09:35:020
1279263992712,5cyclictest0-21swapper/011:10:010
1279263992710,5cyclictest0-21swapper/009:38:180
1279269992624,1cyclictest0-21swapper/211:20:052
1279263992617,8cyclictest1491831-21irqcore09:55:020
1279263992614,2cyclictest1655003-21sh11:45:020
1279263992516,2cyclictest1247-21mta-sts-daemon10:35:010
1279263992514,2cyclictest1369752-21gltestperf08:25:010
1279265992421,2cyclictest660-21dbus-daemon10:40:021
1279265992421,2cyclictest1-21systemd07:15:011
1279263992421,2cyclictest1692308-21grep12:10:020
1279263992414,2cyclictest1419300-21latency_hist09:05:030
1279263992414,2cyclictest1340094-21kthreadcore08:00:030
1279265992320,2cyclictest1580845-21if_enp1s0.810:55:021
1279263992320,2cyclictest1363131-21http08:20:000
3153791221,2phc2sys0-21swapper/310:04:563
1279265992219,2cyclictest1424401-21ssh09:10:011
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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