You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2025-12-18 - 18:14
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackeslot2.osadl.org (updated Thu Dec 18, 2025 12:43:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
12223192980,1sleep11222320-21ls10:13:321
12223192980,1sleep11222320-21ls10:13:321
1001600992819,8cyclictest1-21systemd07:15:021
2649091271,4phc2sys0-21swapper/310:18:283
1001601992220,1cyclictest0-21swapper/211:50:022
1001600992214,7cyclictest1290-21dbus-daemon09:45:011
1001600992211,3cyclictest1171300-21kthreadcore09:28:371
1001600992211,2cyclictest1089708-21gltestperf08:23:311
1001599992219,2cyclictest1294314-21sh11:10:010
100160199217,9cyclictest0-21swapper/207:50:022
100160199213,15cyclictest1282134-21chrt11:00:012
100160099218,5cyclictest1140912-21tr09:03:371
1001600992112,8cyclictest1058300-21apt-key07:55:011
1001600992111,9cyclictest1106528-21idleruntime-cro08:35:001
1001600992110,3cyclictest1039335-21pmu-power07:38:401
1001599992118,2cyclictest1327-21in:imuxsock08:35:010
1001599992118,2cyclictest1290-21dbus-daemon07:15:020
100160099209,3cyclictest1235414-21kthreadcore10:23:351
1001600992017,2cyclictest1290-21dbus-daemon12:40:011
1001600992017,2cyclictest1290-21dbus-daemon11:10:001
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional