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2026-06-19 - 19:29
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackeslot2.osadl.org (updated Fri Jun 19, 2026 12:43:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
332519822260,2sleep30-21swapper/309:50:113
317076921070,2sleep30-21swapper/307:50:173
31232792470,2sleep30-21swapper/307:15:023
34571042400,3sleep30-21swapper/311:19:133
3116405992521,3cyclictest3501669-21grep11:50:011
3116405992417,2cyclictest191rcu_preempt09:50:021
3116405992417,2cyclictest191rcu_preempt07:45:011
311640599231,19cyclictest3368692-21/usr/sbin/munin10:20:011
311640599229,7cyclictest36-21ksoftirqd/112:10:001
311640599222,10cyclictest36-21ksoftirqd/107:20:011
3116405992214,1cyclictest191rcu_preempt09:25:141
3116405992213,3cyclictest36-21ksoftirqd/107:15:021
3116405992211,2cyclictest0-21swapper/109:55:081
311640499222,11cyclictest660-21dbus-daemon08:05:020
3116404992212,6cyclictest3527735-21kthreadcore12:05:190
3116404992210,7cyclictest0-21swapper/009:20:100
311640599219,4cyclictest1050-21snmpd12:35:211
311640599211,14cyclictest3546139-21apt-get12:20:091
3116405992111,4cyclictest3184503-21tr08:00:171
3116405992110,5cyclictest3349400-21cut10:05:161
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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