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2026-06-21 - 03:54
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackeslot2.osadl.org (updated Sun Jun 21, 2026 00:43:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
180063221060,2sleep30-21swapper/320:10:133
202865821030,2sleep12028429-21ssh22:55:141
21798992570,1sleep02179897-21ssh00:39:180
1723437992517,7cyclictest1993818-21kthreadcore22:30:160
1723438992411,6cyclictest2099401-21munin-run23:45:001
1723438992320,2cyclictest660-21dbus-daemon23:30:011
1723438992313,3cyclictest2010574-21runrttasks22:42:261
1723438992311,3cyclictest0-21swapper/123:45:131
1723439992219,1cyclictest0-21swapper/219:15:012
1723438992210,3cyclictest0-21swapper/122:20:021
1723437992219,2cyclictest1744081-21systemd-run19:25:010
1723437992217,4cyclictest1946283-21sort22:00:100
1723437992213,5cyclictest1887833-21sed21:20:130
1723437992212,6cyclictest0-21swapper/022:30:010
1723437992211,6cyclictest0-21swapper/021:30:170
3153791210,2phc2sys0-21swapper/322:00:073
1723439992119,1cyclictest0-21swapper/219:20:012
1723439992118,1cyclictest0-21swapper/222:05:002
1723439992115,2cyclictest0-21swapper/200:15:062
1723438992117,3cyclictest1997922-21idleruntime22:35:101
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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