You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-08-21 - 19:43
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackeslot2.osadl.org (updated Fri Aug 21, 2026 12:43:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
72778621120,2sleep30-21swapper/309:00:113
88456421030,2sleep1341rcuc/110:50:031
9487302720,1sleep1948729-21ssh11:31:591
9438402330,2sleep1943812-21munin-run11:30:031
8633962310,2sleep20-21swapper/210:35:052
591604992918,7cyclictest714-21gdbus09:35:090
591606992623,1cyclictest0-21swapper/211:30:022
591605992421,2cyclictest780062-21cstates09:40:021
591604992418,5cyclictest935551-21idleruntime-cro11:25:010
591604992416,4cyclictest883997-21latency_hist10:50:010
591604992316,6cyclictest972279-21cstates11:50:010
591606992219,1cyclictest0-21swapper/210:49:582
591606992219,1cyclictest0-21swapper/209:15:012
591605992219,2cyclictest979898-21/usr/sbin/munin11:55:021
591605992219,2cyclictest824558-21latency_hist10:10:011
591605992219,2cyclictest772855-21latency_hist09:35:011
591605992219,2cyclictest662345-21hddtemp_smartct08:10:021
591604992212,5cyclictest0-21swapper/010:55:030
591606992119,1cyclictest0-21swapper/210:20:042
591606992119,1cyclictest0-21swapper/210:05:022
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional