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2026-09-10 - 02:19
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackeslot2.osadl.org (updated Wed Sep 09, 2026 12:43:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
24094162980,2sleep20-21swapper/209:08:182
24933622500,2sleep30-21swapper/309:54:383
25594082340,2sleep10-21swapper/110:33:401
224770699249,8cyclictest0-21swapper/011:54:140
2247706992213,6cyclictest2592885-21appstreamcli10:50:020
2247706992213,6cyclictest2592885-21appstreamcli10:50:020
2447398210,3rtkit-daemon2548839-21munin-run10:25:020
2247707992118,2cyclictest24648-21gmain09:56:191
2447398200,2rtkit-daemon241rcuc/011:02:350
2247708992016,2cyclictest0-21swapper/211:23:592
224770699209,7cyclictest376-21systemd-journal09:20:020
2247706992012,5cyclictest2554071-21kthreadcore10:29:380
2247708991916,1cyclictest0-21swapper/207:55:012
2247708991916,1cyclictest0-21swapper/207:55:012
2247708991916,1cyclictest0-21swapper/207:44:392
2247707991916,2cyclictest376-21systemd-journal11:40:011
2247707991916,2cyclictest2334301-21gltestperf08:14:331
2247707991911,3cyclictest2486498-21latency_hist09:50:011
2247707991910,3cyclictest501rcuop/209:42:391
2247706991913,2cyclictest17850irq/132-ahci[0000:00:17.0]10:10:000
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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