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2026-06-30 - 08:03
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackeslot2.osadl.org (updated Tue Jun 30, 2026 00:43:55)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
21347012570,1sleep02134699-21ssh23:43:140
21457692510,1sleep02145768-21cut23:50:000
1765284993128,2cyclictest765-1atopacctd00:15:010
1765284993121,8cyclictest0-21swapper/021:20:020
1765284992910,14cyclictest2071439-21kthreadcore22:59:580
176528499276,16cyclictest0-21swapper/022:42:200
1765284992718,8cyclictest1944250-21aten2.4-expect21:34:520
1765284992717,8cyclictest0-21swapper/021:55:010
1765293992623,1cyclictest0-21swapper/221:05:012
1765284992622,2cyclictest1985799-21grep22:00:030
1765284992618,5cyclictest2029648-21apt-config22:30:010
1765284992616,9cyclictest2110326-21kthreadcore23:25:010
1765293992421,1cyclictest0-21swapper/200:15:012
1765289992421,2cyclictest660-21dbus-daemon23:30:011
1765289992419,1cyclictest67250irq/126-eno122:15:031
1765289992416,3cyclictest2205277-21kthreadcore00:30:001
176528499244,1cyclictest67250irq/126-eno122:15:000
1765284992415,8cyclictest2158202-21sed23:59:540
1765284992415,8cyclictest1863858-21missed_timers20:30:000
1765284992414,8cyclictest2111139-21pmu-power23:25:040
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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