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2026-05-26 - 01:54
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackeslot2.osadl.org (updated Mon May 25, 2026 12:43:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
174972521020,2sleep20-21swapper/212:20:012
16897752730,1sleep20-21swapper/211:40:002
16100102570,1sleep11610009-21ssh10:46:081
16624192340,1sleep01662420-21ptp4l11:20:060
1313586993423,2cyclictest134050irq/121-eno109:40:031
1313586993421,12cyclictest1476375-21systemd-run09:20:011
1313586993319,5cyclictest134050irq/121-eno112:00:011
1313586992920,8cyclictest1290-21dbus-daemon09:45:011
1313590992523,1cyclictest0-21swapper/209:15:022
1313586992510,8cyclictest2845942-21sshd10:58:081
1313581992522,2cyclictest1699828-21latency11:45:000
1313581992515,6cyclictest1462170-21kthreadcore09:10:020
1313586992421,2cyclictest1669876-21open_files11:25:011
1313586992415,8cyclictest1531366-21kthreadcore09:55:001
1313586992415,8cyclictest1431045-21kthreadcore08:45:001
1313586992415,8cyclictest1361105-21kthreadcore07:50:021
1313586992413,10cyclictest1443850-21kthreadcore08:55:011
1313581992413,6cyclictest0-21swapper/009:45:010
1313586992320,2cyclictest1996-21runrttasks12:21:341
1313586992320,2cyclictest1729938-21kthreadcore12:05:011
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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