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2026-04-20 - 17:58
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackeslot2.osadl.org (updated Mon Apr 20, 2026 12:43:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
175820321070,2sleep01758135-21ssh12:30:570
175820321070,2sleep01758135-21ssh12:30:570
15699772960,2sleep20-21swapper/210:25:572
16978572950,2sleep20-21swapper/211:50:552
17075552750,1sleep01707553-21ssh12:00:430
16998562690,1sleep11699855-21ssh11:55:151
16466102560,1sleep01646608-21ssh11:18:540
1297785992915,6cyclictest1511155-21systemd09:50:000
1297785992617,2cyclictest1290-21dbus-daemon11:40:010
1297790992519,2cyclictest17350irq/127-ahci[0000:00:17.0]08:40:001
1297795992321,1cyclictest0-21swapper/211:40:012
1297790992319,3cyclictest1-21systemd11:20:001
1297785992320,2cyclictest1496229-21systemd-run09:40:020
1297785992320,2cyclictest1304491-21systemd-run07:15:010
1297790992219,2cyclictest1752184-21systemd12:30:011
1297790992216,2cyclictest134050irq/121-eno111:08:411
1297795992119,1cyclictest0-21swapper/211:20:012
1297795992118,1cyclictest0-21swapper/208:35:002
1297790992118,2cyclictest1714708-21sh12:05:011
1297790992118,2cyclictest1304240-21proc_pri07:15:011
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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