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2026-08-26 - 06:16
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackeslot2.osadl.org (updated Wed Aug 26, 2026 00:43:58)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
58273521880,2sleep30-21swapper/320:09:383
8757122510,2sleep30-21swapper/323:08:123
8397772360,2sleep30-21swapper/322:46:393
504205993111,13cyclictest0-21swapper/000:39:370
504205993111,13cyclictest0-21swapper/000:39:370
5276302290,2sleep30-21swapper/319:25:573
504205992616,6cyclictest953131-21/usr/sbin/munin23:50:030
2213291261,5phc2sys0-21swapper/321:34:363
50420599258,10cyclictest0-21swapper/022:39:350
504205992510,9cyclictest0-21swapper/000:19:360
9970132240,2sleep0778-21dbus-daemon00:15:030
504212992414,4cyclictest838514-21systemd-run22:45:031
504212992317,2cyclictest82050irq/121-eno100:20:011
5832112220,1sleep0583101-21cstates20:09:550
504212992215,3cyclictest376-21systemd-journal22:45:031
504205992215,5cyclictest24648-21gmain22:55:310
504205992210,8cyclictest0-21swapper/022:20:030
504212992118,2cyclictest913120-21kthreadcore23:30:011
50420599219,8cyclictest759034-21ptp4l-jitter22:00:050
504205992110,7cyclictest922028-21kthreadcore23:34:570
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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