You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-01-13 - 05:08
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackeslot2.osadl.org (updated Tue Jan 13, 2026 00:43:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
9098722380,0sleep0909876-21tr23:08:030
553735993120,6cyclictest0-21swapper/200:40:012
553734992522,2cyclictest1290-21dbus-daemon00:00:021
553733992410,8cyclictest0-21swapper/023:58:050
553735992219,1cyclictest0-21swapper/222:00:012
7082822210,2sleep30-21swapper/321:18:003
553733992113,7cyclictest899881-21kthreadcore23:03:040
553733992113,4cyclictest768653-21unin-run21:50:010
553733992111,5cyclictest0-21swapper/022:58:050
553733992111,4cyclictest877120-21latency_hist22:50:010
553735992017,1cyclictest0-21swapper/222:17:572
553735992017,1cyclictest0-21swapper/221:00:002
553734992017,2cyclictest732463-21apt-key21:30:001
553734992017,2cyclictest29021-21rtkit-daemon23:39:101
55373399209,6cyclictest0-21swapper/021:30:000
553733992013,6cyclictest801829-21kthreadcore22:08:040
553733992012,4cyclictest1014329-21aten_repower_po00:07:590
553733992011,5cyclictest553731-21cyclictest00:15:010
553733992011,5cyclictest553731-21cyclictest00:15:010
2649091200,2phc2sys0-21swapper/323:56:533
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional