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2026-03-26 - 12:13
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackeslot2.osadl.org (updated Thu Mar 26, 2026 00:43:58)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
287220221040,2sleep30-21swapper/323:06:243
29140632960,2sleep30-21swapper/323:31:213
27564742730,1sleep10-21swapper/121:57:491
26737172310,2sleep20-21swapper/221:11:212
27135262230,2sleep30-21swapper/321:33:183
2524045992311,7cyclictest0-21swapper/023:00:000
2649091221,10phc2sys0-21swapper/322:06:173
2524047992219,1cyclictest0-21swapper/219:50:022
2524047992219,1cyclictest0-21swapper/200:20:012
2524046992213,4cyclictest0-21swapper/121:51:301
2524045992211,6cyclictest0-21swapper/022:45:010
2524047992118,1cyclictest0-21swapper/200:00:002
2524046992114,3cyclictest2674214-21irqrtprio21:11:231
2524045992118,2cyclictest2680334-21perf21:15:000
2524045992118,2cyclictest1326-21systemd-logind21:40:000
2524045992113,4cyclictest2849236-21kthreadcore22:51:250
252404599211,14cyclictest2801691-21apt-get22:26:160
2649091201,3phc2sys0-21swapper/322:37:083
2524047992017,1cyclictest0-21swapper/223:15:002
2524046992011,4cyclictest0-21swapper/122:55:021
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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