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2026-09-06 - 04:50
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackeslot2.osadl.org (updated Sun Sep 06, 2026 00:43:58)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
325482621260,2sleep30-21swapper/320:09:423
35831562670,0sleep03583155-21fschecks_count23:29:370
35831562670,0sleep03583155-21fschecks_count23:29:370
35625952390,3sleep30-21swapper/323:15:013
34586772340,1sleep03458679-21rm22:17:580
34484762290,3sleep30-21swapper/322:10:033
3174415992410,9cyclictest3392031-21tr21:39:440
3174415992213,5cyclictest3507375-21kthreadcore22:44:460
36947052210,2sleep00-21swapper/000:30:310
3174415992112,5cyclictest3353548-21/usr/sbin/munin21:19:430
3174417992015,1cyclictest0-21swapper/222:09:522
317441699202,12cyclictest3358520-21grep21:19:451
317441599209,5cyclictest3548240-21/usr/sbin/munin23:09:410
3174415992013,2cyclictest3677011-21latency_hist00:20:030
3174415992012,7cyclictest3483459-21systemd-run22:30:020
3174415992012,3cyclictest3518673-21munin-run22:50:010
2213291200,2phc2sys0-21swapper/323:35:193
36678702190,3sleep13667875-21dump-pmu-power00:15:001
3174416991915,3cyclictest3426039-21kthreadcore21:59:431
3174416991915,3cyclictest3318648-21kthreadcore20:54:431
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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