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2025-11-25 - 18:41
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackeslot2.osadl.org (updated Tue Nov 25, 2025 12:43:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
302487291372,12phc2sys0-21swapper/311:30:013
1198562370,2sleep30-21swapper/309:50:333
4090068992315,4cyclictest207111-21sendmail_mailtr10:40:330
4090069992219,2cyclictest7979-21grep08:40:001
4090068992211,6cyclictest0-21swapper/009:35:020
4090070992119,1cyclictest0-21swapper/211:45:012
4090070992118,1cyclictest0-21swapper/207:20:002
4090068992111,5cyclictest0-21swapper/011:20:010
4090068992110,6cyclictest0-21swapper/012:10:010
835298200,3rtkit-daemon4096169-21munin-node11:27:190
835298200,3rtkit-daemon2025-21snmpd10:50:030
4090070992017,1cyclictest0-21swapper/210:55:012
4090070992017,1cyclictest0-21swapper/210:25:012
4090070992017,1cyclictest0-21swapper/207:45:002
4090069992017,2cyclictest1629-21avahi-daemon11:40:001
4090069992013,3cyclictest74256-21kthreadcore09:25:301
4090068992011,5cyclictest117134-21kthreadcore09:50:300
408872200,3sleep30-21swapper/309:05:283
835298190,2rtkit-daemon0-21swapper/007:52:500
4090070991916,1cyclictest0-21swapper/208:24:552
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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