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2026-05-14 - 18:41
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 20 highest latencies:
System rackeslot2.osadl.org (updated Thu May 14, 2026 12:43:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
126720321640,2sleep20-21swapper/209:15:162
13302102850,1sleep00-21swapper/009:58:150
12735062720,1sleep01273507-21grep09:20:160
14522832690,1sleep11452282-21ssh11:18:331
12851382350,2sleep21285128-21turbostat09:30:002
15210242310,1sleep10-21swapper/112:03:261
1100472992516,5cyclictest1364374-21kthreadcore10:20:170
1100473992418,2cyclictest134050irq/121-eno109:05:091
1100472992419,3cyclictest3851875-21systemd-journal07:25:000
1100473992320,2cyclictest1326-21systemd-logind07:15:021
1100473992314,5cyclictest1996-21runrttasks11:02:371
1100473992314,5cyclictest1996-21runrttasks11:02:371
1100472992314,5cyclictest0-21swapper/012:11:020
383433398220,8rtkit-daemon3851704-21mta-sts-daemon11:25:180
26490912211,3phc2sys0-21swapper/312:20:013
14910332220,2sleep30-21swapper/311:45:003
110047399224,12cyclictest1547917-21cut12:20:161
110047399224,12cyclictest1547917-21cut12:20:161
1100473992216,2cyclictest17350irq/127-ahci[0000:00:17.0]08:25:011
1100473992210,3cyclictest3834328-21sendmail-mta11:08:311
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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