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2025-08-31 - 09:24
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rackeslot2.osadl.org (updated Sun Aug 31, 2025 00:44:00)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
31058082540,0sleep03105810-21tail20:39:540
31058082540,0sleep03105810-21tail20:39:540
3058512993128,1cyclictest0-21swapper/223:35:002
3058510993117,6cyclictest3317608-21kthreadcore22:50:010
3058512992320,1cyclictest0-21swapper/222:30:012
3058511992320,2cyclictest1-21systemd22:50:001
3058510992219,2cyclictest3275537-21grep22:25:020
3058510992219,2cyclictest3275537-21grep22:25:020
305851099221,17cyclictest3387477-21munin-run23:30:010
3058512992118,1cyclictest0-21swapper/223:20:012
3058512992118,1cyclictest0-21swapper/200:20:002
3058511992118,2cyclictest3507793-21phc2sys00:40:011
3058511992113,3cyclictest3264310-21kthreadcore22:19:591
3058510992118,2cyclictest1666-21polkitd23:40:000
3058510992118,2cyclictest0-21swapper/022:45:030
3058510992117,3cyclictest70-21kcompactd021:55:010
3058510992113,7cyclictest3241108-21head22:05:040
3058510992113,7cyclictest3241108-21head22:05:040
3058510992112,4cyclictest0-21swapper/021:25:010
797898200,3rtkit-daemon1625-21avahi-daemon00:01:151
3058512992017,1cyclictest0-21swapper/221:05:002
3058512992017,1cyclictest0-21swapper/221:00:002
3058512992017,1cyclictest0-21swapper/200:10:002
3058512992016,2cyclictest0-21swapper/222:45:032
3058511992017,2cyclictest1-21systemd21:20:011
3058511992017,2cyclictest0-21swapper/100:19:591
305851199200,2cyclictest3188759-21latency_hist21:35:001
3058510992017,2cyclictest3445435-21cron00:05:000
3058510992010,5cyclictest0-21swapper/021:49:580
2555591200,2phc2sys0-21swapper/323:46:073
2555591200,2phc2sys0-21swapper/321:31:163
2555591200,2phc2sys0-21swapper/321:17:133
3058512991917,1cyclictest0-21swapper/222:50:002
3058512991916,1cyclictest0-21swapper/222:00:012
3058512991916,1cyclictest0-21swapper/200:39:522
3058511991916,2cyclictest3335881-21readlink23:00:001
3058511991916,2cyclictest3058508-21cyclictest00:25:021
3058511991916,2cyclictest1-21systemd22:15:011
3058511991915,3cyclictest3075787-21tail20:14:501
3058511991914,2cyclictest3201258-21aten2.4-expect21:44:531
3058511991911,3cyclictest3356606-21/usr/sbin/munin23:14:571
305851099199,5cyclictest0-21swapper/023:24:560
305851099199,5cyclictest0-21swapper/021:29:590
305851099199,5cyclictest0-21swapper/021:29:590
3058510991916,2cyclictest3361749-21ptp4l-jitter23:15:020
3058510991916,2cyclictest3323266-21kthreadcore22:54:560
3058510991916,2cyclictest3068327-21perf20:05:010
3058510991912,2cyclictest3279523-21hddtemp_smartct22:29:540
3058510991910,8cyclictest0-21swapper/023:05:020
305851099190,14cyclictest0-21swapper/021:41:170
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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