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2026-01-25 - 09:07
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rackeslot2.osadl.org (updated Sun Jan 25, 2026 00:43:58)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1920362820,1sleep10-21swapper/100:32:481
1198342440,1sleep20-21swapper/223:52:452
3878348992612,4cyclictest0-21swapper/122:07:391
3878347992616,5cyclictest4171386-21kthreadcore22:32:460
3878348992521,1cyclictest134050irq/121-eno100:25:001
3878348992421,2cyclictest27546-21latency_hist23:00:001
39675092230,1sleep13966989-21kthreadcore20:22:471
3878347992315,7cyclictest29581-21/usr/sbin/munin23:02:430
3878347992213,5cyclictest176670-21kthreadcore00:22:490
1432432220,2sleep30-21swapper/300:04:483
3878349992115,4cyclictest0-21swapper/200:35:012
3878348992118,2cyclictest4061457-21latency_hist21:30:021
3878347992119,1cyclictest103603-21sed23:42:470
3878347992116,4cyclictest187899-21latency_hist00:30:010
3878347992114,4cyclictest3878345-21cyclictest23:17:480
3878347992111,5cyclictest0-21swapper/023:55:020
2649091215,2phc2sys0-21swapper/322:04:303
2649091211,2phc2sys0-21swapper/322:19:133
3878348992017,2cyclictest3878345-21cyclictest21:50:011
3878348992013,3cyclictest2018-21lldpd00:26:351
387834799208,4cyclictest4162533-21kthreadcore22:27:470
3878347992013,6cyclictest4123903-21systemd22:05:020
3878347992011,5cyclictest3965155-21wc20:20:000
3878347992011,5cyclictest0-21swapper/021:55:000
3878349991916,1cyclictest0-21swapper/221:40:012
3878349991916,1cyclictest0-21swapper/220:40:002
3878349991910,4cyclictest0-21swapper/200:17:382
3878348991911,3cyclictest69545-21kthreadcore23:22:481
3878348991911,3cyclictest69545-21kthreadcore23:22:481
3878348991910,4cyclictest0-21swapper/123:45:021
387834799198,6cyclictest0-21swapper/022:40:010
387834799198,6cyclictest0-21swapper/021:50:010
387834799198,6cyclictest0-21swapper/000:12:480
3878347991916,2cyclictest134440-40updatedb.mlocat00:00:020
3878347991916,2cyclictest1326-21systemd-logind21:15:000
3878347991916,2cyclictest13196-21sed22:52:460
3878347991911,4cyclictest4081062-21/usr/sbin/munin21:42:460
2649091191,2phc2sys0-21swapper/321:33:283
2649091190,2phc2sys0-21swapper/322:49:433
2649091190,2phc2sys0-21swapper/320:07:523
2042092190,2sleep1204203-21ssh00:37:531
3878349991815,1cyclictest0-21swapper/223:45:002
3878349991815,1cyclictest0-21swapper/223:25:002
3878349991815,1cyclictest0-21swapper/223:25:002
3878349991815,1cyclictest0-21swapper/222:50:012
3878349991815,1cyclictest0-21swapper/222:02:462
3878349991814,2cyclictest0-21swapper/222:52:492
387834899188,4cyclictest0-21swapper/123:20:001
3878348991815,2cyclictest134586-21latency_hist00:00:021
3878348991815,2cyclictest1296-21polkitd22:55:021
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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