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2026-08-12 - 16:18
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Wed Aug 12, 2026 12:43:51)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1046795997241,29cyclictest1256710-21kworker/1:212:25:131
1046795997241,29cyclictest1256710-21kworker/1:212:25:121
1046795997240,31cyclictest1098765-21kworker/1:009:45:011
1046795997033,36cyclictest3616534-1kworker/1:1H07:24:591
1046795996942,25cyclictest1223559-21kworker/1:111:45:151
1046795996940,27cyclictest1083293-21kworker/1:109:55:131
1046795996842,24cyclictest1128927-21kworker/1:010:00:161
1046795996738,27cyclictest3616534-1kworker/1:1H10:10:131
1046795996735,30cyclictest1193219-21kworker/1:111:10:141
1046795996735,30cyclictest1085790-21kworker/1:309:15:141
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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