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2026-05-22 - 04:49
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Fri May 22, 2026 00:43:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1416615997337,34cyclictest1451563-21kworker/1:021:00:141
1416615997233,38cyclictest1485199-21kworker/1:021:50:141
1416615997140,29cyclictest1625346-21kworker/1:000:15:131
1416615997140,29cyclictest1434354-21kworker/1:220:45:121
1416615996740,26cyclictest1457885-21kworker/1:021:20:141
1416615996739,27cyclictest1424379-21kworker/1:019:35:131
1416615996638,26cyclictest1469733-21kworker/1:221:25:141
1416615996636,28cyclictest1514411-21kworker/1:022:40:131
1416615996636,28cyclictest1473657-1kworker/1:2H21:47:501
1416615996634,30cyclictest1424379-21kworker/1:020:05:121
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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