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2025-12-15 - 12:39
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Mon Dec 15, 2025 00:43:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
287626799681,2cyclictest0-21swapper/120:21:591
2876267996662,2cyclictest0-21swapper/119:46:461
2876267996446,16cyclictest2910799-21kworker/1:221:00:141
2876267996360,2cyclictest0-21swapper/122:53:411
2876267996346,16cyclictest1284072-1kworker/1:2H23:25:181
287626799631,1cyclictest0-21swapper/120:03:121
2876267996145,15cyclictest2937861-21kworker/1:322:40:011
2876267996142,17cyclictest2899755-21kworker/1:120:35:171
2876267996141,18cyclictest2968936-21kworker/1:000:10:131
2876267996056,2cyclictest0-21swapper/123:50:141
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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