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2026-08-24 - 18:49
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Mon Aug 24, 2026 12:43:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3270696996633,15cyclictest3438236-21kworker/1:011:55:191
3270696996359,2cyclictest0-21swapper/112:27:161
3270696996345,17cyclictest3410405-21kworker/1:011:05:161
3270696996246,15cyclictest3266839-21kworker/1:107:25:151
3270696996240,20cyclictest3834693-1kworker/1:1H07:39:591
3270696996044,15cyclictest3385314-21kworker/1:110:43:451
3270696996042,17cyclictest3284180-21kworker/1:108:00:011
3270696996041,18cyclictest3834693-1kworker/1:1H10:50:001
3270696996041,18cyclictest3307347-21kworker/1:009:10:151
3270696996040,18cyclictest3834693-1kworker/1:1H10:20:001
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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