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2026-08-21 - 17:20
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Fri Aug 21, 2026 12:43:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1675502996360,2cyclictest0-21swapper/109:05:551
1675502996259,2cyclictest0-21swapper/108:47:181
1675502996258,2cyclictest1682637-21fschecks_count07:30:131
1675502996245,16cyclictest1756804-21kworker/1:010:05:151
1675502996143,17cyclictest1872441-21kworker/1:112:05:151
167550299610,60cyclictest0-21swapper/112:38:131
1675502996044,15cyclictest1700861-21kworker/1:108:43:461
1675502995944,14cyclictest1771429-21kworker/1:210:35:141
1675502995943,16cyclictest1713258-21kworker/1:009:20:151
1675502995943,15cyclictest1881732-21kworker/1:112:17:481
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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