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2026-04-06 - 12:56
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Mon Apr 06, 2026 00:43:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1451171996663,2cyclictest0-21swapper/119:44:561
1451171996562,2cyclictest0-21swapper/119:15:271
1451171996559,4cyclictest0-21swapper/120:51:021
1451171996545,19cyclictest1607071-21kworker/1:323:35:001
1451171996540,24cyclictest1641408-21kworker/1:200:20:001
145117199650,3cyclictest251rcuc/120:20:131
145117199650,2cyclictest0-21swapper/120:47:341
145117199650,2cyclictest0-21swapper/120:47:331
1451171996360,2cyclictest0-21swapper/120:35:151
1451171996359,2cyclictest0-21swapper/119:25:411
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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