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2025-11-04 - 08:12
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Tue Nov 04, 2025 00:43:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3703607996532,20cyclictest3764880-21kworker/1:222:15:211
3703607996443,16cyclictest3714013-21kworker/1:020:08:061
370360799640,63cyclictest0-21swapper/122:52:531
3703607996359,3cyclictest0-21swapper/120:20:151
3703607996245,16cyclictest3176282-1kworker/1:2H21:55:061
3703607996242,19cyclictest3176282-1kworker/1:2H23:58:171
3703607996242,18cyclictest3768183-21kworker/1:123:00:181
3703607996157,2cyclictest0-21swapper/122:22:411
3703607996144,16cyclictest3176282-1kworker/1:2H20:00:121
3703607996144,16cyclictest3176282-1kworker/1:2H00:28:271
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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