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2026-08-18 - 17:32
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Tue Aug 18, 2026 12:43:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
23135997540,33cyclictest2012883-1kworker/1:0H11:20:161
23135997241,28cyclictest48462-21kworker/1:008:40:151
23135997142,28cyclictest177640-21kworker/1:211:25:151
23135996943,16cyclictest53729-21kworker/1:308:50:131
23135996841,15cyclictest81451-21kworker/1:109:40:071
23135996835,21cyclictest2012883-1kworker/1:0H07:40:011
23135996738,18cyclictest2012883-1kworker/1:0H07:30:011
2313599650,63cyclictest23638-21fschecks_time07:10:151
23135996461,2cyclictest0-21swapper/110:03:241
2313599640,62cyclictest0-21swapper/109:20:411
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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