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2026-05-25 - 06:11
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Mon May 25, 2026 00:43:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3165335996461,2cyclictest0-21swapper/121:46:521
3165335996438,25cyclictest3350697-21kworker/1:100:15:141
3165335996361,1cyclictest0-21swapper/120:10:271
3165335996360,2cyclictest0-21swapper/120:57:121
3165335996360,2cyclictest0-21swapper/120:36:211
3165335996360,2cyclictest0-21swapper/100:25:011
316533599630,62cyclictest0-21swapper/121:38:221
316533599630,62cyclictest0-21swapper/119:16:441
3165335996259,2cyclictest0-21swapper/122:32:361
3165335996245,15cyclictest1902607-1kworker/1:0H20:20:141
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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