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2026-04-23 - 18:42
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Thu Apr 23, 2026 12:43:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
225929997152,18cyclictest238648-21kworker/1:007:50:011
22592999651,63cyclictest0-21swapper/109:01:071
22592999640,63cyclictest0-21swapper/108:30:061
22592999630,61cyclictest0-21swapper/107:29:291
225932996240,9cyclictest1677842-1kworker/3:0H11:25:143
225932996240,8cyclictest1677842-1kworker/3:0H11:10:143
225929996139,20cyclictest319206-21kworker/1:210:30:131
225929996139,20cyclictest319206-21kworker/1:210:30:131
225929996045,14cyclictest242563-21kworker/1:108:10:131
225929995941,17cyclictest256549-21kworker/1:308:50:131
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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