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2026-04-22 - 03:35
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Wed Apr 22, 2026 00:43:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1501499997531,42cyclictest1541655-21kworker/1:121:20:151
1501499997444,28cyclictest1618251-21kworker/1:323:05:151
1501499997444,28cyclictest1524314-21kworker/1:220:20:151
1501499997441,30cyclictest1597228-1kworker/1:1H23:20:151
1501499997138,31cyclictest3642831-1kworker/1:0H20:11:171
1501499996941,26cyclictest3642831-1kworker/1:0H21:15:171
1501499996941,26cyclictest3642831-1kworker/1:0H21:15:161
1501499996839,26cyclictest1597228-1kworker/1:1H22:45:261
1501499996739,25cyclictest1673806-21kworker/1:123:55:121
1501499996738,27cyclictest1579289-21kworker/1:022:05:161
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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