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2026-03-28 - 03:41
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Sat Mar 28, 2026 00:43:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
787647996562,2cyclictest0-21swapper/122:24:591
78764799650,64cyclictest0-21swapper/123:27:001
78764799650,63cyclictest0-21swapper/121:30:101
787647996462,1cyclictest0-21swapper/122:40:351
78764799641,62cyclictest0-21swapper/119:55:061
787647996360,2cyclictest0-21swapper/120:24:001
787647996344,18cyclictest817886-21kworker/1:020:50:151
78764799630,62cyclictest0-21swapper/122:03:051
78764799630,2cyclictest0-21swapper/123:15:471
78764799630,1cyclictest0-21swapper/119:33:341
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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