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2026-07-31 - 13:18
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Fri Jul 31, 2026 00:43:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
106362099641,61cyclictest0-21swapper/120:25:141
1063620996342,19cyclictest1131589-21kworker/1:121:45:141
106362099630,62cyclictest0-21swapper/123:15:011
106362099630,62cyclictest0-21swapper/123:15:001
1063620996242,18cyclictest531449-1kworker/1:2H20:15:001
1063620996158,2cyclictest0-21swapper/123:16:441
1063620996058,1cyclictest0-21swapper/100:01:151
1063620996042,16cyclictest1254609-21kworker/1:200:05:151
1063620996040,18cyclictest1071700-21kworker/1:119:35:141
1063620996035,23cyclictest1126430-21kworker/1:022:00:151
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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