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2026-04-27 - 20:22
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Mon Apr 27, 2026 12:43:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2406176996764,2cyclictest0-21swapper/109:59:471
240617699660,64cyclictest0-21swapper/111:45:231
2406176996146,14cyclictest2553943-21kworker/1:211:35:151
2406176996057,2cyclictest0-21swapper/110:54:471
2406176996041,18cyclictest1314742-1kworker/1:2H08:20:001
2406176996040,18cyclictest2532172-21kworker/1:111:25:141
2406182995953,3cyclictest1677842-1kworker/3:0H12:01:193
2406176995941,17cyclictest2507730-21kworker/1:010:35:171
2406176995939,18cyclictest1314742-1kworker/1:2H11:20:011
2406176995856,1cyclictest0-21swapper/109:16:491
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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