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2026-07-10 - 07:25
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Fri Jul 10, 2026 00:43:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2248291997442,31cyclictest2267933-21kworker/1:120:15:151
2248291996544,19cyclictest2279352-21kworker/1:320:50:141
2248291996544,19cyclictest2279352-21kworker/1:320:50:131
224829199650,64cyclictest0-21swapper/100:37:111
2248291996462,1cyclictest0-21swapper/120:27:581
224829199640,63cyclictest0-21swapper/122:48:261
224829199640,63cyclictest0-21swapper/120:04:041
2248291996361,1cyclictest0-21swapper/121:57:371
224829199630,62cyclictest0-21swapper/121:08:351
224829199630,62cyclictest0-21swapper/119:50:201
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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