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2026-03-15 - 21:33
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Sun Mar 15, 2026 12:43:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
286378997248,5cyclictest379-21systemd-journal10:44:071
286378997238,19cyclictest264306-1kworker/1:0H11:34:121
28637899720,5cyclictest379-21systemd-journal11:49:131
286378996938,18cyclictest299926-21kworker/1:008:00:151
286378996850,5cyclictest634-21sshd08:48:541
286378996842,16cyclictest386821-21kworker/1:310:25:171
286378996837,20cyclictest308801-21kworker/1:108:54:591
28637899681,2cyclictest0-21swapper/109:50:491
286378996738,18cyclictest337134-21kworker/1:209:25:111
28637899671,56cyclictest0-21swapper/109:38:581
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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