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2026-05-20 - 04:51
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Wed May 20, 2026 00:43:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
263712997241,30cyclictest267156-21kworker/1:219:40:131
26371299650,64cyclictest0-21swapper/121:22:121
26371299650,3cyclictest359293-21kworker/1:022:15:151
263712996440,22cyclictest881507-1kworker/1:0H21:40:001
263712996140,20cyclictest422640-21kworker/1:023:25:141
263712995944,14cyclictest456920-21kworker/1:000:10:151
263712995941,17cyclictest267156-21kworker/1:219:35:151
263712995940,18cyclictest881507-1kworker/1:0H20:05:011
263712995940,17cyclictest262340-21kworker/1:019:15:141
263713995845,11cyclictest3402818-1kworker/2:1H20:45:152
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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