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2026-03-09 - 21:27
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Mon Mar 09, 2026 12:43:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1138246997239,14cyclictest1201868-21kworker/1:309:45:161
1138246996646,18cyclictest4070345-1kworker/1:1H10:15:001
113824699640,62cyclictest0-21swapper/111:35:111
113824699640,2cyclictest0-21swapper/111:29:141
1138246996246,15cyclictest1196755-21kworker/1:009:35:151
1138246996246,15cyclictest1178942-21kworker/1:209:23:391
1138246995942,16cyclictest4070345-1kworker/1:1H12:15:051
1138246995942,16cyclictest1149367-21kworker/1:107:45:111
1138246995942,15cyclictest4070345-1kworker/1:1H11:55:131
1138246995941,17cyclictest1303964-21kworker/1:011:45:131
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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