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2026-08-27 - 19:47
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Thu Aug 27, 2026 12:43:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
731754997141,28cyclictest2764988-1kworker/1:2H10:10:151
731754996937,30cyclictest858385-21kworker/1:111:00:201
731754996838,28cyclictest927254-21kworker/1:112:10:141
731754996834,31cyclictest837117-21kworker/1:010:45:141
731754996741,25cyclictest755862-21kworker/1:208:25:141
731754996642,23cyclictest917656-21kworker/1:012:00:141
731754996640,23cyclictest897822-21kworker/1:311:45:151
731754996638,27cyclictest730186-21kworker/1:207:20:141
731754996637,27cyclictest2764988-1kworker/1:2H10:30:131
731754996537,27cyclictest2764988-1kworker/1:2H08:20:081
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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