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2026-06-12 - 20:41
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Fri Jun 12, 2026 12:43:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2629926996244,17cyclictest2807185-21kworker/1:212:05:131
2629926996145,15cyclictest2094997-1kworker/1:2H10:56:301
2629926996057,2cyclictest0-21swapper/111:08:021
2629926996043,16cyclictest2777379-21kworker/1:211:20:021
2629926996043,16cyclictest2657083-21kworker/1:208:35:131
2629926996042,17cyclictest2731805-21kworker/1:110:25:001
2629926996041,17cyclictest2652190-21kworker/1:108:25:161
2629926995957,1cyclictest0-21swapper/108:18:301
2629926995944,14cyclictest2714540-21kworker/1:010:05:151
2629926995944,14cyclictest2714540-21kworker/1:010:05:141
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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