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2026-03-13 - 06:09
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Fri Mar 13, 2026 00:43:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
983258996761,4cyclictest0-21swapper/120:08:551
983258996443,18cyclictest2641011-1kworker/1:2H23:50:141
983258996359,2cyclictest0-21swapper/120:50:061
983258996343,18cyclictest1007231-21kworker/1:120:30:141
983258996341,21cyclictest2641011-1kworker/1:2H20:45:011
983258996341,20cyclictest1116708-21kworker/1:023:10:151
983258996341,20cyclictest1116708-21kworker/1:023:10:151
98325899630,1cyclictest0-21swapper/119:51:541
983258996257,3cyclictest0-21swapper/122:20:241
983258996244,17cyclictest982101-21kworker/1:219:15:151
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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