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2026-06-03 - 08:16
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Wed Jun 03, 2026 00:43:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3883258996662,2cyclictest3969846-21fschecks_count22:10:151
388325899626,2cyclictest4022049-21fschecks_count23:10:141
3883258996158,2cyclictest0-21swapper/121:07:251
3883258996144,16cyclictest3895181-21kworker/1:220:04:561
3883258996144,15cyclictest2611354-1kworker/1:2H22:20:151
3883258996142,17cyclictest3989508-21kworker/1:122:35:141
3883258996044,15cyclictest3989508-21kworker/1:122:42:351
3883258996044,15cyclictest3900668-21kworker/1:320:20:171
3883258996044,15cyclictest3900668-21kworker/1:320:20:161
3883258996043,16cyclictest4066929-21kworker/1:100:10:131
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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