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2026-03-12 - 12:50
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Thu Mar 12, 2026 00:43:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
435226996461,2cyclictest0-21swapper/122:51:241
43522699640,1cyclictest0-21swapper/123:28:001
435226996361,1cyclictest0-21swapper/100:20:051
435226996342,20cyclictest454133-21kworker/1:020:13:261
43522699630,1cyclictest0-21swapper/123:45:051
435226996260,1cyclictest0-21swapper/120:30:561
435226996245,16cyclictest961764-1kworker/1:0H20:02:551
435226996241,19cyclictest576204-21kworker/1:223:15:151
435226996232,28cyclictest469811-21kworker/1:321:05:141
435226996144,16cyclictest592167-21kworker/1:123:40:141
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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