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2026-05-18 - 03:15
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Sun May 17, 2026 12:43:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
893722996935,32cyclictest1045766-21kworker/1:311:30:141
893722996841,26cyclictest939955-21kworker/1:109:35:161
893722996840,27cyclictest1078950-21kworker/1:211:55:001
893722996833,33cyclictest1036324-21kworker/1:211:05:151
893722996833,33cyclictest1036324-21kworker/1:211:05:151
893722996739,27cyclictest881507-1kworker/1:0H08:40:051
893722996641,24cyclictest881507-1kworker/1:0H12:00:151
893722996440,23cyclictest997231-21kworker/1:110:25:151
893722996437,25cyclictest881507-1kworker/1:0H10:15:011
893728996349,3cyclictest3655225-1kworker/3:2H07:50:143
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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