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2026-08-06 - 15:41
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Thu Aug 06, 2026 12:43:51)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
214580499640,63cyclictest0-21swapper/110:15:131
214580499630,61cyclictest0-21swapper/111:05:131
2145804996246,15cyclictest1616836-1kworker/1:0H08:57:261
2145804996244,17cyclictest2162050-21kworker/1:308:00:141
214580499620,61cyclictest0-21swapper/108:10:011
2145804996143,17cyclictest2361081-21kworker/1:312:25:161
2145804996040,19cyclictest2226628-21kworker/1:210:05:151
2145804996039,20cyclictest2154563-21kworker/1:207:35:131
2145804995943,15cyclictest2179046-21kworker/1:108:55:001
2145804995943,15cyclictest2147378-21kworker/1:207:18:161
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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