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2026-05-17 - 02:14
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Sat May 16, 2026 12:43:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
292643996562,2cyclictest0-21swapper/111:05:261
292643996438,25cyclictest305634-21kworker/1:207:55:161
29264399641,1cyclictest0-21swapper/109:31:011
29264399631,60cyclictest0-21swapper/108:12:011
29264399630,62cyclictest0-21swapper/107:16:441
292643996258,2cyclictest391687-21fschecks_time10:15:141
292643996158,2cyclictest0-21swapper/111:15:411
292643996158,2cyclictest0-21swapper/111:15:411
292643996158,2cyclictest0-21swapper/107:12:311
292643996157,2cyclictest0-21swapper/109:40:411
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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