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2026-03-14 - 17:32
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Sat Mar 14, 2026 12:43:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
390979799630,61cyclictest0-21swapper/107:19:001
3909797996237,24cyclictest3981427-21kworker/1:109:50:121
3909797996144,15cyclictest2641011-1kworker/1:2H11:25:471
3909797996057,2cyclictest0-21swapper/108:05:141
3909797996043,16cyclictest4051301-21kworker/1:111:17:381
390979799600,59cyclictest0-21swapper/109:34:311
3909797995957,1cyclictest0-21swapper/110:59:551
3909797995956,2cyclictest0-21swapper/112:37:241
3909797995944,14cyclictest4109271-21kworker/1:012:25:151
3909797995944,14cyclictest3959312-21kworker/1:109:25:011
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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