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2026-07-25 - 11:59
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Sat Jul 25, 2026 00:43:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1994462996741,24cyclictest2033185-21kworker/1:121:10:151
199446299671,65cyclictest0-21swapper/121:45:001
1994462996644,21cyclictest2004083-21kworker/1:019:40:131
199446299651,2cyclictest0-21swapper/100:14:371
1994462996360,2cyclictest0-21swapper/120:24:301
199446299630,2cyclictest0-21swapper/123:20:411
1994462996260,1cyclictest0-21swapper/121:35:131
1994462996260,1cyclictest0-21swapper/121:35:131
1994461996260,1cyclictest2151523-21kworker/0:000:00:000
1994462996041,18cyclictest1454764-1kworker/1:2H20:30:001
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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