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2026-04-25 - 10:04
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Sat Apr 25, 2026 00:43:48)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3123563997839,19cyclictest3686827-1kworker/1:0H00:40:001
3123563996919,49cyclictest0-21swapper/123:15:061
312356399630,62cyclictest0-21swapper/122:32:301
3123563996142,17cyclictest3686827-1kworker/1:0H22:05:001
3123563996140,20cyclictest3301453-21kworker/1:300:00:151
3123563996044,14cyclictest3686827-1kworker/1:0H19:35:131
3123563996038,20cyclictest3686827-1kworker/1:0H00:25:001
3123563995956,2cyclictest0-21swapper/121:11:351
3123563995942,15cyclictest3149175-21kworker/1:320:35:121
3123563995941,17cyclictest3124955-21kworker/1:120:00:001
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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