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2026-06-22 - 01:18
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Sun Jun 21, 2026 12:43:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
316336999701,67cyclictest0-21swapper/107:14:011
3163369996837,15cyclictest3289329-21kworker/1:311:25:131
316336999680,66cyclictest0-21swapper/111:17:271
3163369996762,3cyclictest0-21swapper/110:55:391
3163369996727,38cyclictest3255916-21kworker/1:310:20:131
316336999650,1cyclictest0-21swapper/107:43:541
3163369996460,2cyclictest0-21swapper/111:00:531
3163369996460,2cyclictest0-21swapper/107:17:571
3163369996340,21cyclictest3229437-21kworker/1:209:45:151
3163369996259,2cyclictest0-21swapper/111:45:271
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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