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2026-07-13 - 08:14
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Mon Jul 13, 2026 00:43:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
381420099661,64cyclictest0-21swapper/123:20:001
381420099630,51cyclictest0-21swapper/123:23:411
3814200996141,19cyclictest3846912-21kworker/1:221:15:151
3814200996138,22cyclictest3925818-21kworker/1:022:30:161
3814200996042,17cyclictest3934803-21kworker/1:322:43:421
3814200996042,17cyclictest3909353-21kworker/1:022:16:151
3814200996042,16cyclictest3833632-21kworker/1:120:15:151
3814200995944,14cyclictest3809635-21kworker/1:019:35:141
3814200995942,16cyclictest3809635-21kworker/1:019:15:011
3814200995925,33cyclictest3846912-21kworker/1:220:55:161
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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