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2025-12-03 - 00:59
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Tue Dec 02, 2025 12:43:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2364523996562,2cyclictest0-21swapper/107:14:551
2364523996360,2cyclictest0-21swapper/110:20:421
2364523996343,18cyclictest2446793-21kworker/1:211:45:151
2364523996335,27cyclictest2380942-21kworker/1:107:59:551
2364523996335,27cyclictest2380942-21kworker/1:107:59:551
2364523996258,2cyclictest1756130-21systemd-journal08:40:011
2364523996240,20cyclictest2197392-1kworker/1:2H10:40:001
2364523996138,22cyclictest2197392-1kworker/1:2H12:10:161
2364523996044,15cyclictest2197392-1kworker/1:2H11:36:511
2364523996036,15cyclictest2197392-1kworker/1:2H12:08:541
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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