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2025-11-02 - 23:37
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Sun Nov 02, 2025 12:43:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1244922997243,28cyclictest1294600-21kworker/1:210:05:001
1244922997239,30cyclictest1311874-21kworker/1:110:35:151
1244922997141,28cyclictest1239385-21kworker/1:207:35:151
1244922997040,28cyclictest1294600-21kworker/1:209:50:131
1244922996742,23cyclictest1333223-21kworker/1:012:30:301
1244922996740,25cyclictest1333223-21kworker/1:012:20:141
1244922996727,38cyclictest1259994-21kworker/1:308:15:151
1244922996541,23cyclictest3382256-1kworker/1:1H07:55:011
1244922996432,30cyclictest3382256-1kworker/1:1H12:05:131
1244922996432,30cyclictest1294600-21kworker/1:209:55:131
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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