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2026-05-31 - 06:06
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Sun May 31, 2026 00:43:51)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2296285997238,32cyclictest3109315-1kworker/1:0H23:45:001
229628599691,3cyclictest2312349-21cron20:00:001
2296285996562,2cyclictest0-21swapper/122:04:311
2296285996536,28cyclictest2296408-21kworker/1:219:10:131
2296285996340,21cyclictest3109315-1kworker/1:0H23:55:001
2296285996331,30cyclictest2324991-21kworker/1:120:45:171
229628599630,2cyclictest0-21swapper/122:22:541
229628599630,1cyclictest0-21swapper/122:14:011
2296285996241,19cyclictest3109315-1kworker/1:0H19:20:011
2296285996158,2cyclictest0-21swapper/100:29:311
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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