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2026-01-10 - 01:57
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Fri Jan 09, 2026 12:43:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
380984699740,11cyclictest0-21swapper/109:53:551
3809846996461,2cyclictest0-21swapper/110:30:071
3809846996461,2cyclictest0-21swapper/109:30:221
3809846996439,16cyclictest3840126-21kworker/1:008:49:021
380984699643,60cyclictest0-21swapper/108:04:251
380984699640,63cyclictest0-21swapper/109:55:551
3809846996360,2cyclictest0-21swapper/110:08:261
3809846996347,15cyclictest3848349-21kworker/1:109:20:131
3809846996334,28cyclictest3825710-21kworker/1:008:00:011
3809846996259,2cyclictest0-21swapper/109:44:411
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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