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2026-04-03 - 11:24
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Fri Apr 03, 2026 00:43:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3968147996763,2cyclictest0-21swapper/123:00:461
396814799663,1cyclictest0-21swapper/120:40:451
3968147996447,16cyclictest4142349-21kworker/1:200:00:121
3968147996143,17cyclictest535011-1kworker/1:2H23:40:001
3968147996143,17cyclictest3974697-21kworker/1:219:45:131
3968147996057,2cyclictest0-21swapper/121:29:161
3968147996057,2cyclictest0-21swapper/100:40:001
3968147996045,14cyclictest4137220-21kworker/1:123:50:171
3968147996043,15cyclictest535011-1kworker/1:2H20:45:141
3968147995943,15cyclictest3990651-21kworker/1:220:25:141
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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