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2026-04-01 - 05:48
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Wed Apr 01, 2026 00:43:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2918715996737,28cyclictest535011-1kworker/1:2H21:30:221
2918715996637,27cyclictest2920080-21kworker/1:219:15:141
2918715996535,28cyclictest2957099-21kworker/1:021:20:141
2918715996430,32cyclictest535011-1kworker/1:2H20:09:591
291871599620,60cyclictest0-21swapper/120:21:271
2918715996142,18cyclictest535011-1kworker/1:2H23:10:001
2918715996139,21cyclictest2983998-21kworker/1:221:45:141
2918715996130,29cyclictest3083006-21kworker/1:223:45:131
2918715996129,31cyclictest535011-1kworker/1:2H22:35:001
2918715996045,14cyclictest2930362-21kworker/1:119:45:131
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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