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2026-07-16 - 09:18
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Thu Jul 16, 2026 00:43:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1235418996259,2cyclictest0-21swapper/120:20:431
1235418996259,2cyclictest0-21swapper/119:54:021
1235418996244,16cyclictest1405451-21kworker/1:223:51:261
1235418996244,16cyclictest1405451-21kworker/1:223:51:261
1235418996158,2cyclictest0-21swapper/120:38:561
1235418996136,24cyclictest1265808-21kworker/1:120:45:151
123541899611,59cyclictest0-21swapper/119:12:251
1235418996043,16cyclictest701039-1kworker/1:0H20:55:131
1235418995957,1cyclictest0-21swapper/122:03:521
1235418995941,16cyclictest1273518-21kworker/1:121:25:141
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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