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2026-03-17 - 21:05
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Tue Mar 17, 2026 12:43:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1430108997338,34cyclictest1446524-21kworker/1:208:00:141
1430108997242,29cyclictest1578039-21kworker/1:311:20:131
1430108997039,29cyclictest3445000-1kworker/1:1H12:39:181
1430108996835,31cyclictest1562080-21kworker/1:211:05:131
1430108996641,23cyclictest1508732-21kworker/1:110:00:121
143010899652,62cyclictest0-21swapper/109:21:381
143010899650,63cyclictest0-21swapper/110:50:001
1430108996360,2cyclictest0-21swapper/111:37:401
1430108996360,2cyclictest0-21swapper/110:05:131
1430108996245,16cyclictest1508732-21kworker/1:109:58:401
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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