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2026-05-10 - 20:41
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Sun May 10, 2026 12:43:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1044791997038,30cyclictest1087479-21kworker/1:009:30:131
1044791996849,18cyclictest1059352-21kworker/1:008:15:151
1044791996763,2cyclictest0-21swapper/111:50:271
1044791996762,3cyclictest0-21swapper/111:02:321
1044791996560,3cyclictest0-21swapper/109:05:141
1044791996460,2cyclictest0-21swapper/111:29:501
104479199640,1cyclictest0-21swapper/110:45:261
1044791996343,18cyclictest1041852-21kworker/1:207:10:141
1044791996343,18cyclictest1041852-21kworker/1:207:10:141
104479199630,2cyclictest1216138-21cat11:35:161
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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