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2026-03-16 - 10:41
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot3.osadl.org (updated Mon Mar 16, 2026 00:43:49)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2673731997341,31cyclictest2718018-21kworker/1:121:20:131
2673731997338,33cyclictest264306-1kworker/1:0H19:45:131
2673731997040,28cyclictest2702024-21kworker/1:320:40:131
2673731997038,30cyclictest264306-1kworker/1:0H19:15:001
2673731997038,30cyclictest264306-1kworker/1:0H19:14:591
2673731996941,27cyclictest2691225-21kworker/1:320:05:161
2673731996941,27cyclictest264306-1kworker/1:0H20:50:151
2673731996737,28cyclictest264306-1kworker/1:0H19:35:151
2673731996663,2cyclictest0-21swapper/122:54:261
2673731996538,26cyclictest2697412-21kworker/1:220:25:181
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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