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2026-05-25 - 20:32

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #e, slot #3

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rackeslot3s.osadl.org (updated Mon May 25, 2026 12:45:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
41820839911182,26cyclictest0-21swapper/011:35:020
4182083998581,2cyclictest0-21swapper/007:25:020
4182092997124,10cyclictest30-21ksoftirqd/212:35:012
4182092996915,8cyclictest30-21ksoftirqd/212:05:012
4182092996915,8cyclictest30-21ksoftirqd/212:05:002
418208999680,48cyclictest0-21swapper/107:40:021
418208399661,34cyclictest131rcu_preempt10:55:000
4182083996526,18cyclictest59559-21ssh11:25:010
4182092996421,8cyclictest30-21ksoftirqd/212:08:362
4182092996414,9cyclictest30-21ksoftirqd/209:35:022
4182083996460,2cyclictest0-21swapper/009:40:020
4182092996316,9cyclictest30-21ksoftirqd/210:58:522
418209299626,7cyclictest38247-21ssh10:40:292
418209299626,7cyclictest38247-21ssh10:40:292
4182092996223,7cyclictest30-21ksoftirqd/210:32:462
4182092996220,8cyclictest30-21ksoftirqd/212:24:532
4182092996220,8cyclictest131rcu_preempt10:17:452
4182092996213,8cyclictest30-21ksoftirqd/210:15:022
4182089996251,6cyclictest0-21swapper/107:10:011
4182092996117,8cyclictest30-21ksoftirqd/210:35:292
4182083996153,6cyclictest19350irq/34-mmc108:15:020
4182083996125,33cyclictest12-21ksoftirqd/011:16:380
4182083996123,3cyclictest131rcu_preempt10:55:290
418208399611,58cyclictest0-21swapper/009:10:010
4182092996024,8cyclictest131rcu_preempt10:24:342
4182092996018,9cyclictest30-21ksoftirqd/210:45:052
4182092996015,6cyclictest30-21ksoftirqd/209:38:442
418209699599,28cyclictest361rcuc/308:55:013
418209699597,12cyclictest37-21ksoftirqd/310:54:333
418209299597,9cyclictest30-21ksoftirqd/209:50:002
4182092995915,9cyclictest30-21ksoftirqd/211:25:022
4182083995955,2cyclictest0-21swapper/012:30:030
4182083995929,15cyclictest80934-21ssh12:09:180
4182083995925,3cyclictest131rcu_preempt11:53:430
4182096995823,27cyclictest0-21swapper/311:50:023
4182092995819,7cyclictest131rcu_preempt12:20:012
4182092995816,6cyclictest30-21ksoftirqd/211:52:192
4182092995814,7cyclictest30-21ksoftirqd/211:30:432
4182092995813,9cyclictest30-21ksoftirqd/212:39:002
4182092995813,8cyclictest30-21ksoftirqd/209:20:002
418209699577,10cyclictest37-21ksoftirqd/310:14:343
4182096995711,7cyclictest131rcu_preempt11:33:163
4182092995735,15cyclictest66814-21systemctl11:40:002
4182092995717,8cyclictest30-21ksoftirqd/209:58:082
4182092995710,9cyclictest30-21ksoftirqd/211:04:112
4182092995710,10cyclictest30-21ksoftirqd/211:17:562
4182083995727,15cyclictest25127-21ssh10:13:460
4182083995721,21cyclictest19350irq/34-mmc109:50:020
418209699567,7cyclictest37-21ksoftirqd/307:30:023
4182096995640,11cyclictest1-21systemd08:50:013
418209699561,9cyclictest311-21rs:main3
418209299563,15cyclictest83315-21ssh12:14:082
4182092995617,9cyclictest131rcu_preempt10:03:112
4182092995613,8cyclictest30-21ksoftirqd/210:26:282
4182083995627,13cyclictest5076-21ssh09:32:060
418208399562,47cyclictest37753-21ssh10:39:590
4182083995622,3cyclictest131rcu_preempt09:57:070
418209699559,11cyclictest37-21ksoftirqd/310:20:013
4182096995517,9cyclictest37-21ksoftirqd/311:40:013
4182096995513,5cyclictest131rcu_preempt11:53:483
4182096995510,6cyclictest131rcu_preempt09:36:163
418209299556,10cyclictest30-21ksoftirqd/209:45:012
4182092995538,12cyclictest3467602-21systemd-journal09:10:002
4182092995535,15cyclictest3467602-21systemd-journal08:40:002
4182092995535,15cyclictest3467602-21systemd-journal08:40:002
4182092995515,7cyclictest30-21ksoftirqd/211:47:482
4182092995514,12cyclictest30-21ksoftirqd/209:13:242
4182092995512,10cyclictest30-21ksoftirqd/207:25:002
4182083995526,14cyclictest35160-21ssh10:34:330
418208399551,3cyclictest131rcu_preempt12:40:000
418209699549,5cyclictest131rcu_preempt10:27:083
418209699549,11cyclictest37-21ksoftirqd/311:00:013
418209699542,9cyclictest37-21ksoftirqd/310:49:593
4182096995417,8cyclictest37-21ksoftirqd/312:24:433
4182096995411,5cyclictest131rcu_preempt08:35:023
4182096995411,5cyclictest131rcu_preempt08:35:013
418209299548,11cyclictest30-21ksoftirqd/208:25:022
418209299545,10cyclictest30-21ksoftirqd/209:54:592
4182092995415,9cyclictest30-21ksoftirqd/209:21:472
4182089995416,8cyclictest131rcu_preempt10:25:001
4182083995447,5cyclictest19350irq/34-mmc111:40:020
418209699538,7cyclictest95859-21munin-run12:40:013
418209699538,6cyclictest131rcu_preempt10:24:573
418209699533,10cyclictest37-21ksoftirqd/309:55:093
418209699531,7cyclictest93380-21unin-run12:35:013
4182096995317,10cyclictest37-21ksoftirqd/311:02:053
4182096995315,15cyclictest37-21ksoftirqd/312:30:003
4182096995312,6cyclictest131rcu_preempt09:55:003
418209299538,10cyclictest30-21ksoftirqd/211:56:432
418209299537,10cyclictest30-21ksoftirqd/207:40:012
418209299532,10cyclictest30-21ksoftirqd/210:06:112
4182092995316,7cyclictest30-21ksoftirqd/211:10:322
4182092995311,10cyclictest88979-21sh12:25:332
4182092995310,9cyclictest30-21ksoftirqd/209:27:592
4182083995326,12cyclictest86406-21ssh12:20:120
418208399532,46cyclictest69359-21cat11:45:020
418209699527,12cyclictest37-21ksoftirqd/311:11:283
418209699526,7cyclictest131rcu_preempt09:47:043
418209699525,10cyclictest37-21ksoftirqd/309:43:163
418209699524,8cyclictest37-21ksoftirqd/310:45:013
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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