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2026-08-25 - 11:45

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #e, slot #3

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rackeslot3s.osadl.org (updated Tue Aug 25, 2026 00:45:18)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
4166470999610,82cyclictest0-21swapper/023:05:030
4166474998040,17cyclictest3467602-21systemd-journal22:15:001
416647699752,54cyclictest4189563-21sh21:45:022
4166470997514,25cyclictest4192461-21rm21:51:040
416647099741,40cyclictest0-21swapper/022:35:020
416647099722,40cyclictest3467602-21systemd-journal23:16:540
4166470997167,2cyclictest0-21swapper/020:10:020
4166470997167,2cyclictest0-21swapper/020:10:020
4166470997119,33cyclictest0-21swapper/021:15:450
4166470997059,3cyclictest12-21ksoftirqd/023:45:010
416647099692,36cyclictest5094-21latency_hist22:05:010
4166470996916,13cyclictest4167615-21latency_hist19:30:020
4166470996861,5cyclictest12-21ksoftirqd/020:35:010
4166470996823,9cyclictest16837-21latency_hist22:30:010
416647099681,37cyclictest0-21swapper/022:05:440
4166479996629,12cyclictest37-21ksoftirqd/322:20:003
416647999635,10cyclictest37-21ksoftirqd/300:40:013
4166479996316,11cyclictest37-21ksoftirqd/323:10:023
4166470996342,18cyclictest0-21swapper/022:41:490
4166470996337,21cyclictest275-21dbus-daemon21:39:590
4166474996242,15cyclictest3467602-21systemd-journal19:25:001
4166470996225,33cyclictest33528-21latency_hist23:05:020
416647099621,27cyclictest61914-21latency_hist00:05:010
416647699613,8cyclictest131rcu_preempt20:10:002
416647699613,8cyclictest131rcu_preempt20:10:002
4166470996120,32cyclictest16850irq/134-800000023:27:570
416647099611,26cyclictest50149-21ls23:40:020
4166470996028,15cyclictest64682-21ssh00:10:350
4166470996015,11cyclictest275-21dbus-daemon22:15:000
416647099601,32cyclictest0-21swapper/023:58:090
4166470995955,2cyclictest0-21swapper/023:50:020
4166470995922,30cyclictest16850irq/134-800000000:17:200
416647999585,10cyclictest37-21ksoftirqd/319:40:013
416647999581,24cyclictest0-21swapper/323:14:393
4166470995818,5cyclictest16850irq/134-800000023:12:370
4166470995816,33cyclictest16850irq/134-800000021:57:380
416647999574,9cyclictest37-21ksoftirqd/300:00:033
416647999572,9cyclictest37-21ksoftirqd/322:30:013
416647999572,7cyclictest37-21ksoftirqd/323:20:013
4166479995713,6cyclictest131rcu_preempt19:17:003
416647499578,45cyclictest59491-40mandb00:00:031
4166470995735,5cyclictest16850irq/134-800000022:50:010
416647099571,26cyclictest4172677-21diskmemload22:50:530
416647999565,12cyclictest37-21ksoftirqd/321:22:593
4166479995616,8cyclictest37-21ksoftirqd/321:56:133
4166476995647,5cyclictest14501-21kworker/2:200:36:192
4166476995646,6cyclictest4158139-21kworker/2:023:39:092
4166470995627,14cyclictest56078-21ssh23:52:320
4166470995621,18cyclictest16850irq/134-800000021:46:000
4166470995621,18cyclictest16850irq/134-800000021:45:590
4166470995619,32cyclictest16850irq/134-800000023:21:570
416647099561,31cyclictest0-21swapper/022:16:310
4166479995543,8cyclictest37-21ksoftirqd/320:05:003
4166476995547,5cyclictest4158139-21kworker/2:023:12:382
4166476995547,5cyclictest4158139-21kworker/2:022:15:392
4166476995547,5cyclictest4158139-21kworker/2:021:35:572
4166476995547,5cyclictest4158139-21kworker/2:021:23:112
4166476995546,6cyclictest4158139-21kworker/2:020:05:022
4166476995546,5cyclictest4189472-21kworker/2:321:55:012
4166470995523,14cyclictest31104-21ssh23:00:000
4166470995521,17cyclictest16850irq/134-800000000:37:110
416647999545,8cyclictest37-21ksoftirqd/321:35:363
4166479995412,5cyclictest131rcu_preempt23:39:423
4166476995446,5cyclictest4189472-21kworker/2:322:00:192
4166476995446,5cyclictest14501-21kworker/2:200:24:432
4166476995445,5cyclictest4158139-21kworker/2:023:54:242
4166476995445,5cyclictest4158139-21kworker/2:022:37:232
4166476995444,6cyclictest4158139-21kworker/2:023:26:282
4166476995444,6cyclictest4158139-21kworker/2:021:18:062
4166476995427,8cyclictest4158139-21kworker/2:023:08:202
416647099543,7cyclictest1-21systemd21:30:010
4166470995428,10cyclictest4183549-21ssh21:32:250
416647999538,4cyclictest131rcu_preempt21:44:043
416647999533,12cyclictest37-21ksoftirqd/322:59:323
4166479995310,6cyclictest131rcu_preempt19:21:093
416647699538,26cyclictest4158139-21kworker/2:019:10:012
4166476995345,5cyclictest4158139-21kworker/2:021:13:332
4166476995345,5cyclictest4158139-21kworker/2:000:01:432
4166476995344,6cyclictest4158139-21kworker/2:023:45:062
4166476995344,6cyclictest4158139-21kworker/2:023:03:212
4166476995344,6cyclictest4158139-21kworker/2:022:52:332
4166476995344,6cyclictest4158139-21kworker/2:022:33:442
4166476995344,6cyclictest4158139-21kworker/2:021:45:552
4166476995344,6cyclictest4158139-21kworker/2:021:45:542
4166476995344,6cyclictest4158139-21kworker/2:021:30:112
4166476995344,5cyclictest4158139-21kworker/2:022:43:082
4166476995318,5cyclictest0-21swapper/221:56:572
4166474995335,14cyclictest1-21systemd00:10:001
4166470995345,5cyclictest12-21ksoftirqd/019:40:030
4166470995317,27cyclictest16850irq/134-800000022:22:270
4166470995315,29cyclictest16850irq/134-800000022:38:330
4166470995312,32cyclictest16850irq/134-800000000:32:530
416647999525,6cyclictest4965-21ssh22:05:003
416647999525,11cyclictest37-21ksoftirqd/322:45:013
4166479995214,5cyclictest131rcu_preempt00:32:303
4166476995244,5cyclictest4189472-21kworker/2:322:13:062
4166476995244,5cyclictest4158139-21kworker/2:023:58:132
4166476995244,5cyclictest4158139-21kworker/2:023:21:062
4166476995244,5cyclictest4158139-21kworker/2:022:46:212
4166476995244,5cyclictest4158139-21kworker/2:020:35:022
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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