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2026-03-10 - 09:03

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #e, slot #3

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rackeslot3s.osadl.org (updated Tue Mar 10, 2026 00:45:29)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1135940991371,3cyclictest0-21swapper/000:10:020
113594099132123,6cyclictest12-21ksoftirqd/020:00:020
11359569910214,8cyclictest131rcu_preempt22:20:033
113594799991,22cyclictest23-21ksoftirqd/120:45:021
1135947998048,9cyclictest23-21ksoftirqd/122:08:121
113594799697,13cyclictest23-21ksoftirqd/121:25:021
113594799697,13cyclictest23-21ksoftirqd/121:25:021
1135951996640,8cyclictest1229370-21kworker/2:300:34:082
113594099667,6cyclictest131rcu_preempt22:25:010
113594799654,8cyclictest23-21ksoftirqd/120:00:001
1135947996522,8cyclictest131rcu_preempt23:37:321
1135947996522,8cyclictest131rcu_preempt23:37:321
1135951996354,7cyclictest30-21ksoftirqd/223:10:022
1135951996339,13cyclictest1180124-21kworker/2:123:22:482
1135947996325,13cyclictest23-21ksoftirqd/121:20:001
1135947996314,7cyclictest1141617-21systemd-run21:00:001
113594099629,9cyclictest12-21ksoftirqd/022:41:220
113595199617,6cyclictest131rcu_preempt22:55:022
113595199614,9cyclictest30-21ksoftirqd/200:25:002
1135951996137,16cyclictest1224867-21kworker/2:000:17:442
1135951996137,16cyclictest1224867-21kworker/2:000:17:442
1135951996114,6cyclictest131rcu_preempt21:46:432
1135947996118,13cyclictest23-21ksoftirqd/123:10:011
1135947996114,5cyclictest131rcu_preempt00:16:551
1135947996114,5cyclictest131rcu_preempt00:16:551
113594099618,34cyclictest12-21ksoftirqd/023:17:120
1135940996138,14cyclictest0-21swapper/022:05:010
1135951996012,6cyclictest131rcu_preempt23:38:382
1135951996012,6cyclictest131rcu_preempt23:38:382
1135947996014,12cyclictest23-21ksoftirqd/121:50:011
113594099601,11cyclictest12-21ksoftirqd/022:28:070
113594099601,11cyclictest12-21ksoftirqd/022:28:070
1135951995936,13cyclictest1224867-21kworker/2:000:37:062
1135951995915,6cyclictest131rcu_preempt00:05:062
1135951995914,6cyclictest131rcu_preempt23:18:592
1135951995914,6cyclictest131rcu_preempt19:24:592
1135951995914,6cyclictest131rcu_preempt00:26:522
1135951995911,7cyclictest131rcu_preempt20:10:022
113594799591,16cyclictest23-21ksoftirqd/123:45:121
1135951995832,10cyclictest30-21ksoftirqd/223:50:562
113594799587,10cyclictest23-21ksoftirqd/123:20:591
113594799584,13cyclictest23-21ksoftirqd/123:15:021
113594799584,13cyclictest23-21ksoftirqd/123:15:021
113594799582,8cyclictest23-21ksoftirqd/122:45:021
113594799582,11cyclictest23-21ksoftirqd/121:30:011
1135947995815,12cyclictest23-21ksoftirqd/121:55:021
1135947995814,9cyclictest23-21ksoftirqd/100:05:001
1135947995814,10cyclictest23-21ksoftirqd/100:28:181
1135947995813,12cyclictest23-21ksoftirqd/100:37:241
113594099589,6cyclictest131rcu_preempt23:55:010
1135940995842,10cyclictest1135944-21cat19:10:010
113594099583,4cyclictest131rcu_preempt22:15:010
1135940995830,24cyclictest11426751ssh21:11:050
1135940995829,13cyclictest1150991-21ssh21:29:540
113594099581,51cyclictest274-21cron00:00:000
113594099581,51cyclictest274-21cron00:00:000
113595699578,5cyclictest131rcu_preempt00:10:013
113595199578,6cyclictest131rcu_preempt23:30:012
1135951995712,6cyclictest131rcu_preempt22:58:592
1135951995711,5cyclictest131rcu_preempt22:19:042
113594799575,7cyclictest23-21ksoftirqd/100:00:021
113594799575,7cyclictest23-21ksoftirqd/100:00:021
113594799575,11cyclictest23-21ksoftirqd/121:15:011
113594799575,11cyclictest23-21ksoftirqd/100:20:291
1135947995739,14cyclictest1-21systemd22:25:011
1135947995716,9cyclictest23-21ksoftirqd/123:45:001
1135947995716,12cyclictest0-21swapper/123:35:011
1135947995713,9cyclictest23-21ksoftirqd/122:14:201
1135940995730,13cyclictest12-21ksoftirqd/020:50:020
1135940995730,13cyclictest12-21ksoftirqd/020:50:020
1135940995719,33cyclictest16850irq/134-800000022:51:500
1135940995713,10cyclictest12-21ksoftirqd/022:09:170
113595199567,4cyclictest131rcu_preempt21:05:012
113595199567,4cyclictest131rcu_preempt21:05:012
113595199566,12cyclictest30-21ksoftirqd/223:35:012
113595199565,9cyclictest30-21ksoftirqd/222:00:012
1135951995642,5cyclictest1137974-21kworker/2:321:11:002
1135951995618,21cyclictest30-21ksoftirqd/221:35:072
1135951995616,6cyclictest131rcu_preempt00:00:002
1135951995616,6cyclictest131rcu_preempt00:00:002
1135951995616,5cyclictest131rcu_preempt22:27:512
1135951995616,5cyclictest131rcu_preempt22:27:512
1135951995615,5cyclictest131rcu_preempt22:35:252
1135951995614,6cyclictest131rcu_preempt23:47:002
1135951995614,5cyclictest131rcu_preempt22:42:172
1135951995613,5cyclictest131rcu_preempt21:17:142
1135951995611,6cyclictest131rcu_preempt23:14:322
1135951995611,6cyclictest131rcu_preempt23:14:322
1135951995611,6cyclictest131rcu_preempt22:25:012
1135951995610,6cyclictest131rcu_preempt21:25:292
1135951995610,6cyclictest131rcu_preempt20:30:022
113594799569,8cyclictest0-21swapper/121:45:031
113594799567,8cyclictest23-21ksoftirqd/123:30:021
1135947995611,11cyclictest23-21ksoftirqd/122:28:331
1135947995611,11cyclictest23-21ksoftirqd/122:28:331
113594099565,4cyclictest131rcu_preempt20:45:020
1135940995627,22cyclictest0-21swapper/000:21:410
1135940995620,31cyclictest16850irq/134-800000022:33:500
1135940995619,32cyclictest16850irq/134-800000021:41:550
113595699553,12cyclictest37-21ksoftirqd/300:05:003
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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