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2026-01-29 - 07:29
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot4.osadl.org (updated Thu Jan 29, 2026 00:43:44)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3711625993431,2cyclictest3989407-21idleruntime-cro23:40:002
371162899320,12cyclictest3963239-21awk23:15:003
371162899302,21cyclictest3865898-21apt-get21:40:133
371162899292,24cyclictest3747352-21apt-get19:45:103
3711628992920,6cyclictest3824912-21apt-get21:00:113
371162899291,2cyclictest0-21swapper/320:05:123
371162899290,2cyclictest0-21swapper/321:25:113
371162899290,19cyclictest0-21swapper/320:55:123
371162099290,28cyclictest509-21systemd-logind19:25:430
371162899282,23cyclictest3845149-21apt-get21:20:123
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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