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2026-05-22 - 19:36

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #e, slot #4

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackeslot4s.osadl.org (updated Fri May 22, 2026 00:44:06)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
618649994744,2cyclictest758843-21kworker/u8:2+events_unbound21:25:093
618649994037,2cyclictest737885-21kworker/u8:3+events_unbound21:05:153
618649993937,2cyclictest607721-21kworker/u8:1+events_unbound19:17:083
618626993932,5cyclictest660077-21latency_hist19:50:010
618649993734,2cyclictest665818-21kworker/u8:0+events_unbound19:56:093
618649993734,2cyclictest634045-21kworker/u8:2+events_unbound19:53:063
618642993731,4cyclictest706657-21/usr/sbin/munin20:35:132
618636993730,5cyclictest731882-21ntpq20:55:201
618649993633,2cyclictest665818-21kworker/u8:0+events_unbound20:20:183
618626993632,3cyclictest852892-21kworker/u8:3+events_unbound23:00:190
618626993530,3cyclictest665818-21kworker/u8:0+flush-259:020:20:000
618649993432,2cyclictest831749-21kworker/u8:4+events_unbound22:55:243
618649993432,2cyclictest831749-21kworker/u8:4+events_unbound22:55:243
618649993431,2cyclictest820786-21kworker/u8:0+events_unbound22:40:083
618626993431,2cyclictest680920-21kworker/u8:4+flush-259:020:10:210
618649993330,2cyclictest863078-21kworker/u8:1+events_unbound23:25:243
618649993330,2cyclictest852892-21kworker/u8:3+events_unbound23:00:203
618649993330,2cyclictest665818-21kworker/u8:0+events_unbound20:10:133
618649993329,3cyclictest863078-21kworker/u8:1+events_unbound00:12:443
618649993328,2cyclictest665818-21kworker/u8:0+events_unbound20:30:143
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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