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2026-05-22 - 20:21
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot5.osadl.org (updated Fri May 22, 2026 00:44:22)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1153299333,29cyclictest621-21dbus-daemon21:35:003
1152599322,2cyclictest633-21in:imuxsock23:20:010
1153299300,1cyclictest307-21systemd-journal00:25:013
11530993027,2cyclictest22156-21cron21:50:011
1153099300,29cyclictest621-21dbus-daemon22:04:591
1152599300,29cyclictest649-21gdbus21:00:010
1152599300,29cyclictest16090-21cron19:20:010
1153299290,28cyclictest9851-21apt-get23:40:123
1153299290,28cyclictest0-21swapper/322:50:123
1153299290,1cyclictest12479-21apt-get23:45:123
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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