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2026-10-27 - 16:09

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #e, slot #5

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackeslot5s.osadl.org (updated Tue Oct 27, 2026 12:44:22)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
12104992822,5cyclictest25655-21perf12:20:000
1210499280,23cyclictest0-21swapper/009:53:030
1210499280,22cyclictest4640-21latency_hist10:35:000
12104992721,5cyclictest12257-21sh09:15:040
12104992719,7cyclictest14629-21sh10:15:010
1210499270,26cyclictest0-21swapper/010:35:140
1210499270,26cyclictest0-21swapper/010:27:060
1210499270,1cyclictest5863-21diskmemload11:51:390
12104992621,4cyclictest0-21swapper/011:17:590
1210499260,25cyclictest0-21swapper/010:01:090
1210499260,25cyclictest0-21swapper/009:48:360
1210499260,22cyclictest0-21swapper/012:02:270
1210499260,0cyclictest0-21swapper/012:34:460
1210499260,0cyclictest0-21swapper/011:25:530
1211199250,24cyclictest0-21swapper/311:46:013
12106992523,1cyclictest0-21swapper/210:03:002
1210699250,24cyclictest5863-21diskmemload10:37:212
1210699250,24cyclictest0-21swapper/211:56:402
1210599250,24cyclictest0-21swapper/109:58:041
1210599250,24cyclictest0-21swapper/109:46:021
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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