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2026-08-25 - 10:01

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #e, slot #5

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackeslot5s.osadl.org (updated Tue Aug 25, 2026 00:44:20)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1481399280,1cyclictest0-21swapper/022:40:380
1481399270,1cyclictest0-21swapper/023:05:000
1481499261,1cyclictest24743-21diskmemload23:16:581
1481399260,1cyclictest9434-21latency_hist00:05:000
1481399260,1cyclictest32528-21dump-pmu-power23:25:000
1481399260,1cyclictest28840-21ssh22:25:000
1481699250,24cyclictest0-21swapper/300:11:403
1481599250,24cyclictest8429-21diskmemload22:55:352
1481599250,21cyclictest28255-21ssh22:51:092
1481499250,24cyclictest8429-21diskmemload00:17:411
1481399250,24cyclictest8429-21diskmemload21:36:250
1481399250,24cyclictest28056-21ssh21:55:210
1481399250,24cyclictest14047-21ssh21:42:050
1481399250,1cyclictest20284-21sh00:14:130
1481399250,1cyclictest15327-21sh00:10:000
1481399250,0cyclictest0-21swapper/023:27:490
14816992423,1cyclictest0-21swapper/322:13:063
1481699240,23cyclictest8553-21ssh22:05:443
1481699240,23cyclictest8429-21diskmemload21:32:133
1481699240,23cyclictest8429-21diskmemload21:16:033
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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