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2026-09-01 - 10:36

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #e, slot #5

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackeslot5s.osadl.org (updated Tue Sep 01, 2026 00:44:24)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
169499260,25cyclictest27773-21diskmemload22:08:343
169499260,25cyclictest27773-21diskmemload22:08:343
169499250,24cyclictest27773-21diskmemload23:41:253
169099250,24cyclictest0-21swapper/223:42:252
169099250,24cyclictest0-21swapper/223:16:512
169099250,1cyclictest0-21swapper/221:45:202
1689992522,2cyclictest7835-21rm23:41:351
168999250,1cyclictest0-21swapper/122:32:391
168899250,24cyclictest0-21swapper/000:30:010
169499240,23cyclictest27773-21diskmemload21:34:493
169499240,23cyclictest27773-21diskmemload21:16:063
169499240,23cyclictest0-21swapper/321:54:573
169499240,23cyclictest0-21swapper/320:31:093
1690992424,0cyclictest0-21swapper/200:08:452
1690992423,1cyclictest0-21swapper/200:25:442
169099240,23cyclictest27773-21diskmemload22:54:022
169099240,23cyclictest27773-21diskmemload21:40:272
169099240,23cyclictest0-21swapper/223:30:562
169099240,1cyclictest0-21swapper/221:18:392
1689992424,0cyclictest0-21swapper/121:27:071
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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