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2026-02-13 - 17:29
[ 290.152] (II) VESA: driver for VESA chipsets: vesa

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #e, slot #5

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackeslot5s.osadl.org (updated Fri Feb 13, 2026 12:44:22)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
27527992623,2cyclictest28630-21sh09:17:543
27527992522,2cyclictest10798-21ssh10:32:153
27527992521,3cyclictest22212-21sh09:42:033
2752799250,24cyclictest0-21swapper/312:17:143
2752699250,24cyclictest0-21swapper/210:33:452
2752199252,22cyclictest20187-21kworker/u8:210:49:361
2752199250,1cyclictest5911-21ssh09:57:261
2751999251,23cyclictest62550irq/127-eno109:30:370
27527992423,1cyclictest21252-21diskmemload10:41:403
2752799240,23cyclictest0-21swapper/309:46:203
2752799240,22cyclictest0-21swapper/312:09:153
2752799240,1cyclictest30974-21apt10:20:013
2752799240,1cyclictest30974-21apt10:20:013
2752799240,0cyclictest21252-21diskmemload12:35:383
2752799240,0cyclictest21252-21diskmemload12:04:543
2752799240,0cyclictest0-21swapper/310:58:073
2752699243,1cyclictest4728-21perf09:25:012
2752699240,24cyclictest21252-21diskmemload11:40:002
2752699240,23cyclictest21252-21diskmemload11:22:302
2752699240,23cyclictest0-21swapper/211:55:022
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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