You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2025-12-04 - 14:06
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot8.osadl.org (updated Thu Dec 04, 2025 00:43:55)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2671178992421,1cyclictest0-21swapper/319:25:473
2671178992320,1cyclictest0-21swapper/321:45:203
2671178992320,1cyclictest0-21swapper/300:00:003
2671178992219,1cyclictest0-21swapper/319:45:003
2671178992017,1cyclictest0-21swapper/323:41:403
2671178992017,1cyclictest0-21swapper/321:15:013
2671178991917,0cyclictest0-21swapper/300:15:183
2671178991916,1cyclictest0-21swapper/323:20:003
2671178991916,1cyclictest0-21swapper/323:14:593
2671178991916,1cyclictest0-21swapper/321:30:003
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional