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2026-07-29 - 21:21
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot8.osadl.org (updated Wed Jul 29, 2026 12:43:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
24194421220,2sleep00-21swapper/011:08:380
396322850,1sleep2421rcuc/208:55:212
3266702730,1sleep0221rcuc/012:00:280
4091134992825,1cyclictest0-21swapper/311:10:153
4091134992522,1cyclictest0-21swapper/308:55:263
4091134992522,1cyclictest0-21swapper/308:10:213
4091134992320,1cyclictest0-21swapper/311:20:143
4091134992320,1cyclictest0-21swapper/310:40:253
4091134992320,1cyclictest0-21swapper/310:20:293
4091134992320,1cyclictest0-21swapper/309:40:223
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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