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2026-03-31 - 21:39
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot8.osadl.org (updated Tue Mar 31, 2026 12:43:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
4144103992623,1cyclictest0-21swapper/311:40:243
4144103992623,1cyclictest0-21swapper/310:05:283
4144103992421,1cyclictest0-21swapper/310:50:203
4144103992421,1cyclictest0-21swapper/310:30:003
4144103992421,1cyclictest0-21swapper/310:10:143
4144103992421,1cyclictest0-21swapper/309:00:253
4144103992320,1cyclictest0-21swapper/312:15:133
4144103992320,1cyclictest0-21swapper/310:35:003
4144103992219,1cyclictest0-21swapper/312:10:263
4144103992219,1cyclictest0-21swapper/311:05:183
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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