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2026-06-25 - 23:11
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot8.osadl.org (updated Thu Jun 25, 2026 12:43:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
248960421060,1sleep22489605-21cat07:35:142
2454700993330,1cyclictest0-21swapper/309:20:013
2454700992825,1cyclictest0-21swapper/311:20:123
2454700992623,1cyclictest0-21swapper/310:40:003
2454700992623,1cyclictest0-21swapper/308:40:003
2454700992623,1cyclictest0-21swapper/307:20:133
2454700992421,1cyclictest0-21swapper/311:40:103
2454700992421,1cyclictest0-21swapper/310:20:143
2454700992320,1cyclictest0-21swapper/311:05:243
2454700992320,1cyclictest0-21swapper/310:15:183
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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