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2026-04-12 - 07:45
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot8.osadl.org (updated Sun Apr 12, 2026 00:43:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
7144132930,1sleep30-21swapper/319:50:183
656261993431,1cyclictest0-21swapper/323:30:003
656261992724,1cyclictest0-21swapper/323:00:013
9378122240,2sleep2421rcuc/222:30:182
656261992421,1cyclictest0-21swapper/320:25:003
656261992321,1cyclictest0-21swapper/322:36:143
656261992320,1cyclictest0-21swapper/320:50:143
656261992220,1cyclictest0-21swapper/323:20:023
656261992219,1cyclictest0-21swapper/323:10:273
656261992118,1cyclictest0-21swapper/319:25:273
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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