You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2025-11-17 - 07:28
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot8.osadl.org (updated Mon Nov 17, 2025 00:43:55)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3910256992422,1cyclictest0-21swapper/300:00:013
3910256992421,1cyclictest0-21swapper/300:10:263
3910256992320,1cyclictest0-21swapper/322:45:143
3910256992220,1cyclictest0-21swapper/321:15:273
3910256992219,1cyclictest0-21swapper/323:40:013
3910256992219,1cyclictest0-21swapper/319:15:013
391025699221,15cyclictest192341-21taskset00:30:013
3910256992210,8cyclictest71443-21turbostat23:15:003
3910256992119,1cyclictest0-21swapper/321:50:013
3910256992118,1cyclictest0-21swapper/300:40:013
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional