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2026-04-08 - 22:18
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot8.osadl.org (updated Wed Apr 08, 2026 12:43:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2662476993128,1cyclictest0-21swapper/307:50:013
2662476992622,1cyclictest0-21swapper/309:37:493
2662476992522,1cyclictest0-21swapper/308:49:593
2662476992421,1cyclictest0-21swapper/311:20:113
2662476992421,1cyclictest0-21swapper/311:20:013
2662476992421,1cyclictest0-21swapper/310:20:003
2662476992321,1cyclictest0-21swapper/311:40:013
2662476992320,1cyclictest0-21swapper/308:10:223
2662476992220,1cyclictest0-21swapper/308:00:013
2662476992219,1cyclictest0-21swapper/311:15:013
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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