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2026-08-27 - 00:34
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot8.osadl.org (updated Wed Aug 26, 2026 12:43:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2282698993229,1cyclictest0-21swapper/311:30:013
27551572310,1sleep0221rcuc/012:30:170
2282698993027,1cyclictest0-21swapper/312:40:003
2282698993026,1cyclictest0-21swapper/310:15:003
2282698992623,1cyclictest0-21swapper/309:00:013
2282698992623,1cyclictest0-21swapper/308:40:203
2282698992623,1cyclictest0-21swapper/307:20:013
2282698992522,1cyclictest0-21swapper/312:06:523
2282698992522,1cyclictest0-21swapper/311:15:003
2282698992522,1cyclictest0-21swapper/309:21:003
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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