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2026-04-08 - 07:03
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot8.osadl.org (updated Wed Apr 08, 2026 00:43:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
37162582270,3sleep1321rcuc/120:50:191
3579850992724,1cyclictest0-21swapper/319:25:063
3579850992622,1cyclictest0-21swapper/300:20:003
3579850992522,1cyclictest0-21swapper/319:50:003
3579850992219,1cyclictest0-21swapper/323:20:013
3579850992219,1cyclictest0-21swapper/322:00:013
3579850992219,1cyclictest0-21swapper/321:35:153
129998220,1rtkit-daemon0-21swapper/222:56:542
357985099212,15cyclictest3736846-21taskset21:06:373
3579850992118,1cyclictest0-21swapper/323:20:183
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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