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2026-01-09 - 06:01
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot8.osadl.org (updated Fri Jan 09, 2026 00:43:55)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3366972992623,1cyclictest0-21swapper/323:45:143
3366972992622,1cyclictest0-21swapper/319:50:003
3366972992522,1cyclictest0-21swapper/320:15:003
3366972992522,1cyclictest0-21swapper/319:15:143
336697299251,20cyclictest3769047-21turbostat00:25:003
336697299241,16cyclictest3756395-21taskset00:15:003
336697299229,10cyclictest3546982-21sleep21:30:013
3366972992219,1cyclictest0-21swapper/322:50:013
3366972992219,1cyclictest0-21swapper/322:50:003
3366972992219,1cyclictest0-21swapper/322:25:003
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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