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2026-03-27 - 03:59
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackeslot8.osadl.org (updated Fri Mar 27, 2026 00:43:57)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
387570321120,1sleep00-21swapper/023:24:090
3548160992724,1cyclictest0-21swapper/321:45:003
3548160992522,1cyclictest0-21swapper/300:10:003
3548160992320,1cyclictest0-21swapper/323:40:183
3548160992320,1cyclictest0-21swapper/321:30:213
3548160992219,1cyclictest0-21swapper/323:05:173
3548160992219,1cyclictest0-21swapper/319:50:013
3548160992218,2cyclictest3914437-21turbostat23:50:003
3548160992118,1cyclictest0-21swapper/323:35:183
3548160992118,1cyclictest0-21swapper/322:25:013
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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