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2025-12-13 - 20:25
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackeslot8.osadl.org (updated Sat Dec 13, 2025 12:43:53)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2825562992119,1cyclictest0-21swapper/311:20:013
2825562992018,1cyclictest0-21swapper/311:25:013
2825562991916,1cyclictest0-21swapper/308:55:013
2825562991916,1cyclictest0-21swapper/308:10:013
282556299190,5cyclictest3221791-21turbostat12:20:003
28188762190,3sleep30-21swapper/307:05:013
2825562991815,1cyclictest0-21swapper/309:00:013
282556299181,13cyclictest3005723-21taskset09:28:533
282556299181,13cyclictest2917009-21turbostat08:20:003
2825562991714,1cyclictest0-21swapper/312:25:183
2825562991714,1cyclictest0-21swapper/307:38:413
282556299171,12cyclictest3238696-21chrt12:30:173
282556299171,12cyclictest3087959-21taskset10:30:243
282556299171,12cyclictest3025072-21taskset09:45:113
282556299171,12cyclictest3024848-21sleep09:45:003
282556299171,12cyclictest2999215-21taskset09:21:323
282556299171,12cyclictest2934380-21taskset08:30:193
282556299171,12cyclictest2852692-21taskset07:26:153
282556299170,13cyclictest3114314-21chrt10:55:123
282556299170,12cyclictest2917244-21taskset08:20:013
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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