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2025-12-14 - 09:57
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackeslot8.osadl.org (updated Sun Dec 14, 2025 00:43:54)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
243300021230,3sleep2217-21plymouthd19:25:212
2405966992623,1cyclictest0-21swapper/322:20:003
240596699221,18cyclictest2800181-21turbostat00:15:013
2405966992017,1cyclictest0-21swapper/319:25:143
240596699201,15cyclictest2826060-21taskset00:35:143
2405966991916,1cyclictest0-21swapper/321:55:173
2405966991916,1cyclictest0-21swapper/321:40:213
2405966991916,1cyclictest0-21swapper/320:43:323
240596699191,13cyclictest2813270-21chrt00:25:123
240596699191,13cyclictest2787330-21taskset00:05:013
2405966991816,1cyclictest0-21swapper/319:50:013
2405966991815,1cyclictest0-21swapper/319:50:183
240596699181,13cyclictest2755616-21taskset23:40:123
240596699181,13cyclictest2549551-21turbostat21:00:003
240596699181,13cyclictest2412344-21taskset19:15:003
27560422171,13sleep22756979-21irqstats23:40:162
2405966991714,1cyclictest0-21swapper/323:25:173
2405966991714,1cyclictest0-21swapper/320:50:173
2405966991714,1cyclictest0-21swapper/320:45:163
2405966991714,1cyclictest0-21swapper/320:25:213
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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