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2025-12-18 - 21:28
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackeslot8.osadl.org (updated Thu Dec 18, 2025 12:43:54)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2688963992623,1cyclictest0-21swapper/308:35:013
268896399241,14cyclictest3080008-21taskset12:15:003
2688963992318,3cyclictest0-21swapper/310:55:003
2688963992219,1cyclictest0-21swapper/311:30:013
2688963992218,1cyclictest0-21swapper/312:30:003
2688963992118,1cyclictest0-21swapper/309:44:593
2688963992017,1cyclictest0-21swapper/309:54:593
2688963992017,1cyclictest0-21swapper/307:10:103
2688963991815,1cyclictest0-21swapper/311:15:253
2688963991815,1cyclictest0-21swapper/309:55:163
268896399181,13cyclictest2939330-21chrt10:25:123
268896399181,13cyclictest2855991-21chrt09:16:283
268896399181,13cyclictest2754437-21turbostat08:00:013
268896399180,13cyclictest2716593-21taskset07:30:013
268896399177,6cyclictest27480092sleep307:54:233
268896399176,7cyclictest27661882sleep308:05:213
2688963991714,1cyclictest0-21swapper/309:20:163
268896399171,13cyclictest3104534-21taskset12:30:193
268896399171,12cyclictest3028090-21turbostat11:35:013
268896399171,12cyclictest2964303-21taskset10:44:553
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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