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2026-01-02 - 17:17
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackeslot8.osadl.org (updated Fri Jan 02, 2026 12:43:54)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
109223621080,1sleep00-21swapper/008:30:150
985933992717,7cyclictest1271384-21sleep10:50:003
985933992118,1cyclictest0-21swapper/309:35:013
985933992118,1cyclictest0-21swapper/308:55:013
98593399201,14cyclictest1155603-21taskset09:20:123
985933991916,1cyclictest0-21swapper/312:10:243
985933991916,1cyclictest0-21swapper/311:45:003
985933991916,1cyclictest0-21swapper/310:05:203
98593399191,13cyclictest1304134-21taskset11:15:013
98593399191,13cyclictest1026846-21taskset07:40:003
98593399182,12cyclictest1001016-21turbostat07:20:003
985933991815,1cyclictest0-21swapper/312:30:183
985933991815,1cyclictest0-21swapper/310:30:153
985933991815,1cyclictest0-21swapper/309:45:183
985933991815,1cyclictest0-21swapper/309:00:003
985933991815,1cyclictest0-21swapper/308:25:003
985933991812,3cyclictest986501-21chrt07:10:163
98593399181,12cyclictest1001252-21taskset07:20:023
98593399180,14cyclictest1013109-21chrt07:25:223
98593399180,13cyclictest1226518-21taskset10:15:023
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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