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2025-11-29 - 06:23
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackeslot8.osadl.org (updated Sat Nov 29, 2025 00:43:56)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
260514699231,15cyclictest2807059-21taskset21:40:013
2605146992118,1cyclictest0-21swapper/323:30:013
2605146992118,1cyclictest0-21swapper/322:05:003
260514699211,15cyclictest3009986-21taskset23:45:123
2605146992017,1cyclictest0-21swapper/321:05:153
2605146992014,3cyclictest2782631-21turbostat21:25:003
260514699201,13cyclictest2968889-21taskset23:19:563
2605146991916,1cyclictest0-21swapper/321:15:003
260514699191,13cyclictest3017878-21chrt23:50:023
260514699191,13cyclictest2904221-21taskset22:40:003
260514699182,6cyclictest2823205-21turbostat21:50:003
2605146991816,1cyclictest0-21swapper/322:10:193
2605146991815,1cyclictest0-21swapper/323:00:243
2605146991815,1cyclictest0-21swapper/321:15:213
2605146991815,1cyclictest0-21swapper/320:45:173
2605146991815,1cyclictest0-21swapper/319:50:003
260514699181,13cyclictest3066053-21turbostat00:20:003
260514699181,13cyclictest2953157-21taskset23:10:133
260514699181,12cyclictest3042063-21taskset00:05:003
260514699178,6cyclictest29520352sleep323:08:513
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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