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2026-01-31 - 02:44
[ 290.152] (II) VESA: driver for VESA chipsets: vesa

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #e, slot #8

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackeslot8s.osadl.org (updated Fri Jan 30, 2026 12:43:50)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
10370759913710,1367cyclictest11103982sleep33
10370759911740,1170cyclictest13163192sleep33
10370759911740,1170cyclictest13163192sleep33
1037075994241,420cyclictest1174570-21turbostat3
14389862320,1sleep20-21swapper/22
1037075992522,1cyclictest0-21swapper/33
1037075991916,1cyclictest0-21swapper/33
1037075991816,0cyclictest0-21swapper/33
103707599176,8cyclictest1043454-21turbostat3
1037075991714,1cyclictest0-21swapper/33
1037075991714,1cyclictest0-21swapper/33
1037075991713,2cyclictest1412961-21turbostat3
103707599166,7cyclictest13285352sleep33
1037075991613,1cyclictest0-21swapper/33
103707599161,12cyclictest1355181-21turbostat3
103707599161,11cyclictest1071238-21turbostat3
301798150,12rtkit-daemon492-21gmain0
103707599158,4cyclictest1168151-21turbostat3
1037075991513,1cyclictest0-21swapper/33
1037075991512,1cyclictest0-21swapper/33
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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