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2026-09-10 - 18:47

OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #e, slot #8

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8 
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Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackeslot8s.osadl.org (updated Thu Sep 10, 2026 12:43:53)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
40796421250,2sleep0407954-21ntpq0
2085982390,1sleep00-21swapper/00
2633492350,1sleep0221rcuc/00
3959812310,1sleep30-21swapper/33
2705032300,2sleep135-21ksoftirqd/11
4193594992724,1cyclictest0-21swapper/33
1167512270,2sleep00-21swapper/00
2169262250,15sleep014-21ksoftirqd/00
4193594992421,1cyclictest0-21swapper/33
419359499201,14cyclictest446609-21taskset3
419359499201,14cyclictest446609-21taskset3
419359499192,11cyclictest357736-21taskset3
4193594991916,1cyclictest0-21swapper/33
4193594991916,1cyclictest0-21swapper/33
4193594991916,1cyclictest0-21swapper/33
419359499187,7cyclictest27289-21turbostat3
419359499182,12cyclictest0-21swapper/33
4193594991816,1cyclictest0-21swapper/33
4193594991815,1cyclictest0-21swapper/33
4193594991815,1cyclictest0-21swapper/33
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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