OSADL QA Farm on Real-time of Mainline Linux

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Default latency plot of shadow in rack #e, slot #8

Rack #0/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #1/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #2/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #3/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #4/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #5/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #6/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #7/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #8/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #9/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #a/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #b/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #c/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #d/#0 #1 #2 #3 #4 #5 #6 #7 #8 -
Rack #e/#0 #1 #2 #3 #4 #5 #6 #7 #8 - Rack #f/#0 #1 #2 #3 #4 #5 #6 #7 #8
Special All - All RT - Optimization - Ethernet - Thumbnails

Click here to display the system's profile data.

Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.
Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system

Characteristics of the 50 highest latencies:

System rackeslot8s.osadl.org (updated Thu Sep 18, 2025 12:43:49)
Delayed (victim)					Switcher (culprit)			Timestamp	CPU
PID	Prio	Total latency (µs)	T^(,W^*) latency (µs)	Cmd	PID	Prio	Cmd	Timestamp	CPU
596565	99	758	752,5	cyclictest	729062	-21	kworker/3:2+events	10:04:29	3
596563	99	747	744,2	cyclictest	1651680	-21	kworker/2:3+events	07:39:44	2
596565	99	746	743,2	cyclictest	729062	-21	kworker/3:2+events	11:11:46	3
596565	99	746	742,3	cyclictest	990755	-21	kworker/3:0+events	12:28:43	3
596565	99	746	742,3	cyclictest	589941	-21	kworker/3:0+events	08:26:37	3
596565	99	744	740,3	cyclictest	729062	-21	kworker/3:2+events	10:57:51	3
596565	99	744	739,4	cyclictest	729062	-21	kworker/3:2+events	09:15:42	3
596565	99	742	739,2	cyclictest	589941	-21	kworker/3:0+events	08:16:47	3
596565	99	742	738,3	cyclictest	729062	-21	kworker/3:2+events	11:26:03	3
596563	99	741	738,2	cyclictest	1651680	-21	kworker/2:3+events	08:43:22	2
596559	99	741	730,5	cyclictest	545638	-21	kworker/1:0+events	10:30:20	1
596563	99	740	734,5	cyclictest	1651680	-21	kworker/2:3+events	08:54:27	2
596565	99	739	736,2	cyclictest	729062	-21	kworker/3:2+events	09:06:17	3
596565	99	739	735,3	cyclictest	791526	-21	turbostat	09:49:55	3
596565	99	739	735,3	cyclictest	729062	-21	kworker/3:2+events	11:02:21	3
596556	99	739	735,3	cyclictest	648131	-21	kworker/0:0+events	07:55:22	0
596563	99	736	730,5	cyclictest	1651680	-21	kworker/2:3+events	08:48:04	2
596565	99	735	730,4	cyclictest	729062	-21	kworker/3:2+events	10:20:20	3
596563	99	731	723,7	cyclictest	1651680	-21	kworker/2:3+events	07:30:20	2
596565	99	729	725,3	cyclictest	729062	-21	kworker/3:2+events	12:08:22	3
596565	99	728	724,3	cyclictest	990755	-21	kworker/3:0+events	12:30:30	3
596559	99	726	720,5	cyclictest	545638	-21	kworker/1:0+events	07:10:41	1
596565	99	725	721,3	cyclictest	729062	-21	kworker/3:2+events	10:37:51	3
596563	99	724	720,3	cyclictest	1651680	-21	kworker/2:3+events	10:25:52	2
596563	99	723	718,4	cyclictest	1651680	-21	kworker/2:3+events	07:28:05	2
596559	99	721	716,4	cyclictest	545638	-21	kworker/1:0+events	11:30:21	1
596565	99	720	717,2	cyclictest	589941	-21	kworker/3:0+events	08:56:48	3
596563	99	720	716,3	cyclictest	1651680	-21	kworker/2:3+events	07:17:42	2
596556	99	719	714,4	cyclictest	642177	-21	turbostat	07:49:55	0
596563	99	718	714,3	cyclictest	1651680	-21	kworker/2:3+events	07:23:36	2
596565	99	714	711,2	cyclictest	760432	-21	turbostat	09:24:55	3
596565	99	714	711,2	cyclictest	729062	-21	kworker/3:2+events	12:01:30	3
596565	99	713	710,2	cyclictest	729062	-21	kworker/3:2+events	12:16:13	3
596559	99	713	710,2	cyclictest	545638	-21	kworker/1:0+events	11:36:50	1
596559	99	712	709,2	cyclictest	545638	-21	kworker/1:0+events	09:30:22	1
596559	99	711	709,1	cyclictest	545638	-21	kworker/1:0+events	09:49:06	1
596556	99	711	707,3	cyclictest	760260	-21	kworker/0:2+events	09:21:54	0
596565	99	709	704,4	cyclictest	589941	-21	kworker/3:0+events	08:10:21	3
596565	99	708	703,4	cyclictest	735259	-21	turbostat	09:04:55	3
596559	99	707	704,2	cyclictest	545638	-21	kworker/1:0+events	11:42:54	1
596559	99	705	701,3	cyclictest	916313	-21	turbostat	11:29:55	1
596559	99	705	701,3	cyclictest	545638	-21	kworker/1:0+events	12:36:45	1
596556	99	702	692,5	cyclictest	648131	-21	kworker/0:0+events	07:51:23	0
596559	99	700	696,3	cyclictest	545638	-21	kworker/1:0+events	09:44:12	1
596565	99	697	692,4	cyclictest	729062	-21	kworker/3:2+events	09:55:22	3
596565	99	696	693,2	cyclictest	589941	-21	kworker/3:0+events	08:30:44	3
596559	99	696	692,3	cyclictest	545638	-21	kworker/1:0+events	09:36:29	1
596565	99	694	691,2	cyclictest	589941	-21	kworker/3:0+events	08:05:23	3
596565	99	693	690,2	cyclictest	847658	-21	turbostat	10:34:56	3
596565	99	693	690,2	cyclictest	729062	-21	kworker/3:2+events	10:08:48	3
^Timer ^*Wakeup (latency=timer+wakeup+contextswitch)


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This page was last modified on 2022-03-28 - 20:20