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2026-02-15 - 07:09
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rackfslot0.osadl.org (updated Sun Feb 15, 2026 00:54:17)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
19464599917682,66cyclictest2218168-21kworker/u64:1+efi_rts_wq23:10:175
1946464991621,90cyclictest0-21swapper/1821:50:1710
19464779916189,11cyclictest0-21swapper/2921:35:1722
19464649916083,7cyclictest0-21swapper/1820:40:1410
19464249916089,9cyclictest0-21swapper/321:35:1723
19464759915977,55cyclictest2218168-21kworker/u64:1+efi_rts_wq23:50:1620
19464759915977,55cyclictest2218168-21kworker/u64:1+efi_rts_wq23:50:1620
19464719915987,45cyclictest0-21swapper/2321:48:1116
19464719915983,46cyclictest2218168-21kworker/u64:1+efi_rts_wq22:40:1616
19464719915983,46cyclictest2218168-21kworker/u64:1+efi_rts_wq22:40:1516
19464599915985,49cyclictest0-21swapper/1321:30:165
19464599915985,49cyclictest0-21swapper/1321:30:165
19464759915884,53cyclictest2218168-21kworker/u64:1+efi_rts_wq23:55:1820
19464759915884,53cyclictest2218168-21kworker/u64:1+efi_rts_wq23:55:1720
194643799157109,36cyclictest0-21swapper/620:12:5028
194643799157109,36cyclictest0-21swapper/620:12:4928
19464199915784,49cyclictest0-21swapper/121:35:171
19464689915681,9cyclictest0-21swapper/2000:00:1613
19464789915580,59cyclictest0-21swapper/3023:25:1624
19464789915580,59cyclictest0-21swapper/3023:25:1624
19464219915585,68cyclictest0-21swapper/200:15:1712
19464199915569,3cyclictest0-21swapper/121:45:161
19464779915480,10cyclictest0-21swapper/2900:20:1722
194647799154132,2cyclictest0-21swapper/2900:00:1622
19464629915469,73cyclictest0-21swapper/1622:48:248
19464579915377,10cyclictest0-21swapper/1100:20:173
19464779915269,7cyclictest0-21swapper/2922:10:1522
19464689915280,6cyclictest0-21swapper/2020:40:1413
194647699151118,6cyclictest0-21swapper/2800:15:1721
19464759915182,66cyclictest2218168-21kworker/u64:1+efi_rts_wq19:50:1620
19464759915182,66cyclictest2218168-21kworker/u64:1+efi_rts_wq19:50:1620
19464709915186,46cyclictest0-21swapper/2220:17:5115
19464689915176,3cyclictest0-21swapper/2021:50:1613
19464709915064,76cyclictest0-21swapper/2200:25:1715
19464379915076,5cyclictest0-21swapper/620:40:1428
19464789914970,58cyclictest0-21swapper/3023:20:1624
1946475991490,89cyclictest0-21swapper/2721:30:1620
1946475991490,89cyclictest0-21swapper/2721:30:1620
19464719914981,42cyclictest0-21swapper/2321:30:1716
19464719914981,42cyclictest0-21swapper/2321:30:1716
194645599149126,14cyclictest0-21swapper/1020:12:492
194645599149126,14cyclictest0-21swapper/1020:12:492
19464799914885,59cyclictest0-21swapper/3100:15:1825
1946479991480,1cyclictest0-21swapper/3100:25:1825
19464599914879,46cyclictest0-21swapper/1323:55:185
19464599914879,46cyclictest0-21swapper/1323:55:175
19464199914866,10cyclictest2218168-21kworker/u64:1+efi_rts_wq20:40:141
19464789914738,24cyclictest0-21swapper/3000:00:1724
19464769914775,7cyclictest0-21swapper/2800:00:1621
19464759914782,52cyclictest0-21swapper/2719:25:1720
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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