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2025-05-02 - 12:45
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Characteristics of the 50 highest latencies:
System rackfslot0.osadl.org (updated Thu May 01, 2025 12:55:33)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
37315529917872,82cyclictest0-21swapper/312:00:1623
37315419916586,10cyclictest0-21swapper/008:50:150
37315419916586,10cyclictest0-21swapper/008:50:150
37315649916281,58cyclictest0-21swapper/1507:20:167
37315649916281,58cyclictest0-21swapper/1507:20:167
37315649916279,60cyclictest0-21swapper/1511:40:177
37315539916278,72cyclictest2960058-21kworker/u64:0+efi_rts_wq09:30:1526
37315829916178,68cyclictest0-21swapper/3109:30:1625
37315809916184,12cyclictest0-21swapper/2911:35:1822
3731546991611,95cyclictest2960058-21kworker/u64:0+efi_rts_wq09:50:181
3731546991611,95cyclictest2960058-21kworker/u64:0+efi_rts_wq09:50:181
37315769916088,43cyclictest0-21swapper/2708:50:1420
37315769916088,43cyclictest0-21swapper/2708:50:1420
37315769916077,15cyclictest0-21swapper/2712:20:1620
37315769916077,15cyclictest0-21swapper/2712:20:1620
37315719916077,77cyclictest0-21swapper/2208:55:1815
37315719916077,77cyclictest0-21swapper/2208:55:1815
37315569916078,60cyclictest0-21swapper/711:40:1729
37315769915983,9cyclictest0-21swapper/2710:40:1820
37315659915981,56cyclictest0-21swapper/1611:40:188
37315749915786,11cyclictest0-21swapper/2511:35:1818
37315809915686,10cyclictest0-21swapper/2912:20:1722
37315809915686,10cyclictest0-21swapper/2912:20:1722
37315769915574,12cyclictest0-21swapper/2708:45:1620
37315769915574,12cyclictest0-21swapper/2708:45:1620
37315829915475,54cyclictest0-21swapper/3108:35:1625
37315829915475,54cyclictest0-21swapper/3108:35:1625
37315659915482,57cyclictest2960058-21kworker/u64:0+efi_rts_wq07:20:158
37315659915482,57cyclictest2960058-21kworker/u64:0+efi_rts_wq07:20:158
37315589915376,10cyclictest0-21swapper/908:45:1731
37315589915376,10cyclictest0-21swapper/908:45:1731
373156899152117,12cyclictest0-21swapper/1910:55:1811
37315669915284,9cyclictest0-21swapper/1708:45:179
37315669915284,9cyclictest0-21swapper/1708:45:179
37315589915276,8cyclictest0-21swapper/911:35:1831
37315569915270,53cyclictest2960058-21kworker/u64:0+efi_rts_wq12:35:1629
37315569915270,53cyclictest2960058-21kworker/u64:0+efi_rts_wq12:35:1629
37315769915174,10cyclictest0-21swapper/2711:35:1720
373157299151124,10cyclictest0-21swapper/2309:15:1916
37315659915179,59cyclictest2960058-21kworker/u64:0+efi_rts_wq07:35:188
37315659915179,59cyclictest2960058-21kworker/u64:0+efi_rts_wq07:35:188
37315559915182,6cyclictest0-21swapper/608:50:1428
37315559915182,6cyclictest0-21swapper/608:50:1428
37315559915181,44cyclictest0-21swapper/608:10:1828
37315469915182,3cyclictest0-21swapper/108:10:181
37315719914972,52cyclictest0-21swapper/2208:35:1715
37315719914972,52cyclictest0-21swapper/2208:35:1715
37315629914976,65cyclictest0-21swapper/1308:55:185
37315629914976,65cyclictest0-21swapper/1308:55:185
37315589914977,5cyclictest0-21swapper/909:45:1631
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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