You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-01-13 - 07:56
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot4.osadl.org (updated Tue Jan 13, 2026 00:45:25)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2411023660,3sleep117641-21cyclictest21:10:121
337723440,2sleep1191ksoftirqd/120:05:161
762123410,1sleep14514-21kworker/u8:1920:15:371
1929723380,1sleep218315-21kworker/u8:422:10:112
1929723380,1sleep218315-21kworker/u8:422:10:102
324223320,4sleep23241-21ssh22:45:132
1733523150,2sleep20-21swapper/219:07:192
682923140,2sleep10-21swapper/121:41:521
967923130,2sleep20-21swapper/200:09:062
292923080,2sleep10-21swapper/123:54:441
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional