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2025-12-11 - 20:44
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Data to construct the above plot have been generated using the RT test utility cyclictest.

Total number of samples: 100 million
Resolution of latency scale: reduced 
Duration: 5 hours, 33 minutes
Compare latency of primary with shadow system
Characteristics of the highest latencies:
System rackfslot5.osadl.org (updated Thu Dec 11, 2025 15:37:10)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1995991014910087,56cyclictest12328-21kworker/0:6+events15:34:150
1998991010610094,8cyclictest0-21swapper/315:34:153
19979999589948,5cyclictest0-21swapper/215:34:162
19969999509941,4cyclictest0-21swapper/115:34:151
199799740726,8cyclictest0-21swapper/215:14:032
199799740726,8cyclictest0-21swapper/215:14:022
199699731719,5cyclictest0-21swapper/115:14:021
199699731719,5cyclictest0-21swapper/115:14:021
199799722708,8cyclictest0-21swapper/214:41:092
199799714701,7cyclictest0-21swapper/214:52:062
199699711701,5cyclictest0-21swapper/114:41:081
199799709697,7cyclictest0-21swapper/215:03:042
199699705694,6cyclictest0-21swapper/114:52:061
199699700690,5cyclictest0-21swapper/115:03:051
199799691679,7cyclictest0-21swapper/214:30:102
199599687665,17cyclictest23386-21kworker/0:3+events_freezable_power_15:14:030
199599687665,17cyclictest23386-21kworker/0:3+events_freezable_power_15:14:030
199699682672,5cyclictest0-21swapper/114:30:111
199799680668,7cyclictest0-21swapper/215:25:002
199899679672,2cyclictest0-21swapper/315:14:023
199899679672,2cyclictest0-21swapper/315:14:023
199699672661,5cyclictest0-21swapper/115:25:011
199599671647,19cyclictest23386-21kworker/0:3+events_freezable_power_14:41:080
199899662654,3cyclictest0-21swapper/314:41:083
199599659640,14cyclictest17933-21kworker/0:4+events_freezable_power_14:52:060
199899656647,5cyclictest0-21swapper/314:52:063
199599651635,11cyclictest9379-21kworker/0:5+events_freezable_power_15:03:040
199899649642,3cyclictest0-21swapper/315:03:043
199599634618,11cyclictest17933-21kworker/0:4+events_freezable_power_14:30:100
199899631624,3cyclictest0-21swapper/314:30:103
199599624607,12cyclictest12328-21kworker/0:6+events_freezable_power_15:25:000
199899621614,3cyclictest0-21swapper/315:25:013
199599651,5cyclictest11603-21ntpq15:05:550
199599642,5cyclictest14155-21ntpq15:16:010
199599613,5cyclictest16710-21ntp_states15:26:020
1998995037,9cyclictest0-21swapper/315:05:583
1998995036,9cyclictest0-21swapper/315:15:403
1997995042,5cyclictest0-21swapper/215:26:042
1998994936,8cyclictest0-21swapper/315:25:303
199599493,42cyclictest3944-21ntpq14:35:410
199599483,5cyclictest6465-21ntpq14:45:420
1997994739,5cyclictest0-21swapper/215:05:562
199599472,5cyclictest9348-21grep14:55:530
1997994638,5cyclictest0-21swapper/215:15:182
199699452,5cyclictest0-21swapper/114:55:381
199699442,5cyclictest0-21swapper/114:35:401
1996994235,4cyclictest0-21swapper/115:26:051
199699422,5cyclictest0-21swapper/115:08:161
199699412,5cyclictest0-21swapper/115:18:341
1998994023,11cyclictest0-21swapper/314:35:433
1998993924,10cyclictest0-21swapper/314:45:183
199599383,5cyclictest1982-21munin-run14:30:010
1997993628,5cyclictest0-21swapper/214:55:352
1998993522,8cyclictest0-21swapper/315:00:023
1997993426,5cyclictest0-21swapper/214:45:172
1997993426,5cyclictest0-21swapper/214:35:362
199799322,27cyclictest17592irq/55-edma2-chan7-tx14:30:032
199699313,5cyclictest0-21swapper/114:45:291
199699302,5cyclictest0-21swapper/114:30:041
1998992516,5cyclictest0-21swapper/314:30:043
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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