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2026-01-04 - 06:55
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Sun Jan 04, 2026 00:46:08)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2266945999112,78cyclictest0-21swapper/022:50:160
2266949995838,2cyclictest2381732-21systemctl22:30:232
2266949995213,38cyclictest0-21swapper/222:45:272
2266945995233,19cyclictest0-21swapper/019:45:170
2266945995112,39cyclictest0-21swapper/000:35:170
2266949995030,19cyclictest0-21swapper/223:56:152
2266949995030,19cyclictest0-21swapper/223:52:172
2266949995030,19cyclictest0-21swapper/223:46:352
2266949995030,19cyclictest0-21swapper/223:42:072
2266949995030,19cyclictest0-21swapper/223:38:272
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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