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2026-07-16 - 06:04
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Thu Jul 16, 2026 00:46:07)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
225370199791,59cyclictest2338592-21chrt21:42:261
2253701997436,19cyclictest2416329-21aten2.4_rfpower00:05:121
2253701997012,39cyclictest2322581-21kworker/u32:5+events_unbound21:15:211
225370199689,59cyclictest2435057-21sshd00:38:301
2253701996811,38cyclictest0-21swapper/119:37:131
2253712996325,38cyclictest0-21swapper/300:30:143
225370199633,59cyclictest2424722-21/usr/sbin/munin00:20:161
225370199591,39cyclictest2350676-21kworker/u32:4+events_unbound22:35:091
225370199580,39cyclictest2392251-21fw_packets23:20:141
225370199580,39cyclictest2335572-21/usr/sbin/munin21:35:251
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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