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2026-06-24 - 10:10
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Wed Jun 24, 2026 00:46:13)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
354372099118116,1cyclictest0-21swapper/200:05:002
3543724998786,1cyclictest0-21swapper/600:05:006
3543719996951,18cyclictest331ktimers/119:50:151
3543720996864,3cyclictest0-21swapper/220:25:142
354372199550,15cyclictest0-21swapper/322:05:153
3543723995214,19cyclictest0-21swapper/523:55:175
3543721995233,19cyclictest0-21swapper/320:15:143
3543724995112,39cyclictest0-21swapper/619:25:176
3543722995118,14cyclictest0-21swapper/420:18:364
3543721995113,19cyclictest0-21swapper/320:30:173
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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