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2026-05-15 - 08:24
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Fri May 15, 2026 00:46:13)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
909287995011,39cyclictest0-21swapper/619:50:166
909287994911,19cyclictest0-21swapper/600:25:166
909285994729,18cyclictest0-21swapper/422:45:174
909285994729,18cyclictest0-21swapper/422:45:174
90928699446,19cyclictest0-21swapper/522:55:165
909286994225,17cyclictest0-21swapper/521:10:175
909284994223,0cyclictest781-21mta-sts-daemon00:25:233
90928699412,19cyclictest0-21swapper/523:35:185
90928699402,19cyclictest0-21swapper/519:50:165
909284994020,1cyclictest511ktimers/321:03:413
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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