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2026-05-16 - 10:41
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Sat May 16, 2026 00:46:11)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
211746399600,60cyclictest0-21swapper/420:04:194
2117461995333,19cyclictest411rcuc/200:35:172
2117465995113,19cyclictest0-21swapper/622:15:176
2117465995113,19cyclictest0-21swapper/620:10:156
2117461995113,19cyclictest0-21swapper/222:05:162
2117468995012,19cyclictest0-21swapper/721:50:157
2117465995012,19cyclictest0-21swapper/622:50:156
2117461995012,38cyclictest0-21swapper/219:15:172
2117461995012,19cyclictest0-21swapper/223:30:162
2117463994930,19cyclictest0-21swapper/421:47:064
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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