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2026-08-18 - 17:57
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Tue Aug 18, 2026 12:46:10)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3254672996829,39cyclictest0-21swapper/107:45:171
3254674996663,2cyclictest874-21mta-sts-daemon08:05:003
325467499611,59cyclictest3282346-21kworker/3:008:20:063
3254673995411,19cyclictest0-21swapper/208:10:152
3254675995333,19cyclictest0-21swapper/410:58:004
3254675995313,39cyclictest0-21swapper/411:45:584
3254675995313,39cyclictest0-21swapper/411:08:584
3254675995313,39cyclictest0-21swapper/410:50:384
3254675995313,39cyclictest0-21swapper/409:36:274
3254675995313,39cyclictest0-21swapper/409:12:194
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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