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2026-05-03 - 12:14
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Sun May 03, 2026 00:46:10)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
31944379911534,59cyclictest3215211-21fschecks_count19:45:164
319443799879,59cyclictest3355992-21ntpq00:00:194
3194437997538,18cyclictest591rcuc/420:00:134
3194437997536,38cyclictest3255214-21kworker/4:221:15:084
3194437997536,38cyclictest3255214-21kworker/4:221:15:084
3194437997518,38cyclictest776-21dbus-daemon00:34:594
3194437997517,39cyclictest3320161-21ntpq22:55:194
3194437997515,39cyclictest3340510-21taskset23:34:244
3194437997113,39cyclictest3189210-21kworker/u32:1+events_unbound19:25:244
3194437997032,18cyclictest0-21swapper/422:52:234
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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