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2026-08-21 - 08:45
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Fri Aug 21, 2026 00:46:10)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3925930997114,38cyclictest0-21swapper/321:45:173
3925932996041,0cyclictest0-21swapper/522:01:345
3925934995921,19cyclictest870-21mta-sts-daemon21:10:167
3925927995738,19cyclictest251irq_work/019:55:170
3925930995633,19cyclictest0-21swapper/320:00:163
3925932995314,39cyclictest0-21swapper/520:56:445
3925932995313,39cyclictest4107418-21munin-run00:40:015
3925932995313,39cyclictest3922865-21kworker/5:1+mm_percpu_wq19:21:185
3925932995313,39cyclictest0-21swapper/523:01:175
3925931995314,20cyclictest0-21swapper/420:55:154
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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