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2026-07-16 - 18:37
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Thu Jul 16, 2026 12:46:13)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
69491399723,2cyclictest0-21swapper/507:35:165
69491499610,1cyclictest191rcu_preempt08:05:186
694915996036,23cyclictest7722052sleep709:30:097
694915996020,39cyclictest0-21swapper/710:23:557
694915995836,21cyclictest871ktimers/708:29:557
694915995835,22cyclictest101550irq/39-eno2-TxRx-007:39:577
694915995820,19cyclictest861rcuc/708:00:157
694915995819,39cyclictest0-21swapper/710:52:287
694915995819,39cyclictest0-21swapper/710:36:377
694915995819,38cyclictest0-21swapper/712:05:097
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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