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2026-07-31 - 00:22
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Thu Jul 30, 2026 12:46:05)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3724826997673,2cyclictest871-21mta-sts-daemon12:05:122
3724824997414,20cyclictest3819006-21if_err_eno209:55:160
3724824997113,39cyclictest2593227-21kworker/0:2+ice08:08:150
372483099680,68cyclictest0-21swapper/612:35:146
3724824996728,39cyclictest0-21swapper/010:16:340
3724824996628,38cyclictest0-21swapper/011:40:310
3724824996628,38cyclictest0-21swapper/010:45:070
3724824996628,38cyclictest0-21swapper/010:08:180
3724824996426,38cyclictest0-21swapper/009:25:070
3724824996122,39cyclictest0-21swapper/012:33:590
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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