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2026-06-01 - 01:36
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Sun May 31, 2026 12:46:11)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
64182699135134,0cyclictest799678-21telnet11:55:123
6418269910830,59cyclictest733411-21systemctl09:55:013
641826999718,59cyclictest668254-21ntpq07:55:213
641826999234,39cyclictest690363-21ntpq08:35:193
641826999214,59cyclictest739032-21kworker/u32:5+events_unbound10:18:433
641828999113,19cyclictest0-21swapper/508:50:165
641826999012,59cyclictest754905-21kworker/u32:1+events_unbound10:39:433
64182899855,79cyclictest0-21swapper/508:55:175
641826997638,19cyclictest511ktimers/310:49:023
641826997637,38cyclictest723596-21ntp_kernel_pll_09:35:203
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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