You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-08-03 - 07:22
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Mon Aug 03, 2026 00:46:06)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
116443199990,19cyclictest0-21swapper/520:15:165
1164431999878,19cyclictest0-21swapper/523:15:165
116443099825,58cyclictest1332963-21latency_hist00:15:004
1164432997354,19cyclictest0-21swapper/600:35:196
1164430997032,19cyclictest872-21mta-sts-daemon19:16:004
1164428996910,19cyclictest0-21swapper/220:55:182
1164430996829,39cyclictest0-21swapper/422:39:474
1164430996729,38cyclictest0-21swapper/423:15:514
1164430996728,39cyclictest0-21swapper/400:35:434
1164430996627,39cyclictest0-21swapper/420:28:114
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional