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2026-09-03 - 21:27
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Thu Sep 03, 2026 12:46:15)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
4180771995214,19cyclictest0-21swapper/212:00:162
4180770995214,2cyclictest873-21mta-sts-daemon11:36:301
4180772994930,19cyclictest0-21swapper/307:25:173
4180771994930,19cyclictest0-21swapper/210:55:142
418077599468,38cyclictest0-21swapper/607:20:156
418077299468,38cyclictest0-21swapper/311:30:193
4180772994628,18cyclictest0-21swapper/311:10:153
4180771994627,19cyclictest0-21swapper/212:25:152
418077099466,39cyclictest0-21swapper/111:49:221
418077099466,39cyclictest0-21swapper/111:00:171
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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