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2026-06-15 - 05:49
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Mon Jun 15, 2026 00:46:12)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2152948999314,59cyclictest2219679-21hddtemp_smartct21:10:153
2152948997918,39cyclictest2257745-21wc22:20:133
215294899790,59cyclictest2322710-21sed00:15:233
2152948997718,39cyclictest2255333-21awk22:15:143
2152948997639,18cyclictest511ktimers/321:00:473
2152948997335,19cyclictest511ktimers/322:52:343
2152948997129,39cyclictest2188561-21latency_hist20:15:023
215294899689,58cyclictest2162723-21ldconfig19:25:173
2152948996728,3cyclictest5150ktimers/320:36:213
2152948996728,39cyclictest0-21swapper/320:29:143
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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