You are here: Home / Projects / OSADL QA Farm Real-time / Latency plots / 
2025-08-27 - 05:44
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Wed Aug 27, 2025 00:46:14)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1422430997333,19cyclictest1481488-21taskset20:54:440
1422430997314,58cyclictest0-21swapper/021:47:200
1422430997234,38cyclictest101850irq/40-eno2-TxRx-119:37:040
1422430997233,19cyclictest0-21swapper/019:11:120
1422430997233,19cyclictest0-21swapper/000:23:390
1422430997133,19cyclictest0-21swapper/021:15:100
1422430997132,39cyclictest0-21swapper/019:22:160
1422430997112,39cyclictest1590288-21awk00:05:150
1422434997012,39cyclictest591rcuc/423:25:204
1422430997031,19cyclictest0-21swapper/020:00:360
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional