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2026-07-13 - 18:13
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Mon Jul 13, 2026 12:46:05)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1803532991660,165cyclictest0-21swapper/510:40:095
1803531999537,19cyclictest191rcu_preempt07:30:164
1803527997111,59cyclictest0-21swapper/008:35:160
180353399613,39cyclictest0-21swapper/607:40:166
1803530995839,19cyclictest0-21swapper/310:20:023
1803533995618,38cyclictest0-21swapper/610:30:166
1803533995314,39cyclictest0-21swapper/608:45:176
1803532995214,19cyclictest0-21swapper/508:35:155
1803527995112,39cyclictest0-21swapper/008:20:160
180352799510,50cyclictest0-21swapper/010:05:130
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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