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2026-06-14 - 04:15
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Sun Jun 14, 2026 00:46:08)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1022667995233,19cyclictest0-21swapper/721:46:447
1022667994830,18cyclictest0-21swapper/721:06:527
102266799400,21cyclictest1158361-21taskset23:15:127
1022667993718,19cyclictest0-21swapper/723:50:007
1022667993615,2cyclictest1022659-21cyclictest22:12:567
102266199360,17cyclictest0-21swapper/122:10:131
1022663993535,0cyclictest1044507-21kworker/3:1+events21:40:123
102266299350,35cyclictest0-21swapper/221:40:172
102266299350,35cyclictest0-21swapper/220:30:142
102266299350,15cyclictest0-21swapper/220:50:172
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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