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2026-07-30 - 11:15
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Thu Jul 30, 2026 00:46:11)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
10926759919615,180cyclictest0-21swapper/520:40:185
1092672991870,185cyclictest0-21swapper/219:50:132
1092673995131,19cyclictest0-21swapper/320:11:363
1092675994444,0cyclictest90050irq/62-eno6-TxRx-020:12:555
1092673994219,3cyclictest1086-21runrttasks23:30:203
1092670994040,0cyclictest1200712-21systemctl22:25:020
1092673993939,0cyclictest0-21swapper/322:50:013
109267399391,37cyclictest90650irq/68-eno6-TxRx-623:00:023
109267199390,19cyclictest0-21swapper/100:10:161
1092670993921,0cyclictest0-21swapper/022:25:160
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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