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2026-04-18 - 16:07
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Sat Apr 18, 2026 12:46:15)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3508939911456,39cyclictest355544-21threads07:15:225
350893998524,59cyclictest362157-21dpkg07:30:135
350893997618,39cyclictest1086-21runrttasks08:23:225
350893997537,38cyclictest350887-21cyclictest11:10:095
350893997114,38cyclictest400992-21head08:40:115
350893996910,40cyclictest521619-21cpuspeed12:20:135
350893996223,39cyclictest776-21dbus-daemon11:30:005
350893996223,39cyclictest0-21swapper/510:53:035
350893996121,39cyclictest0-21swapper/508:49:565
35089399602,39cyclictest358813-21taskset07:23:055
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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