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2026-07-12 - 15:29
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Sun Jul 12, 2026 00:46:17)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2290327991680,167cyclictest0-21swapper/422:10:094
22903299911414,99cyclictest0-21swapper/621:00:166
2290326997555,1cyclictest511ktimers/319:22:413
2290326997555,1cyclictest511ktimers/319:22:403
229032699656,39cyclictest0-21swapper/319:27:363
229032699613,39cyclictest2376958-21kworker/u32:0+events_unbound22:19:213
229032699613,39cyclictest0-21swapper/322:36:493
229032699612,59cyclictest2400942-21kworker/u32:3+events_unbound23:09:463
2290328996019,41cyclictest0-21swapper/519:55:175
2290325996023,18cyclictest421ktimers/220:20:172
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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