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2026-05-30 - 17:40
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Sat May 30, 2026 12:46:14)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
374166199729,19cyclictest0-21swapper/111:45:141
374166299590,59cyclictest0-21swapper/211:00:152
3741661995614,19cyclictest0-21swapper/110:35:171
3741660995313,39cyclictest0-21swapper/012:35:150
3741667995213,39cyclictest0-21swapper/712:10:167
3741663995211,40cyclictest3861974-21chrt10:46:513
3741660995214,19cyclictest0-21swapper/008:20:150
3741666995113,19cyclictest0-21swapper/611:50:176
3741663995151,0cyclictest0-21swapper/307:50:183
3741663995131,19cyclictest3788684-21/usr/sbin/munin08:35:143
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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