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2026-06-02 - 16:07
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Tue Jun 02, 2026 12:46:12)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2793394997719,38cyclictest2838727-21cat08:30:153
2793394997537,38cyclictest876-21mta-sts-daemon12:10:163
2793394997315,39cyclictest2828061-21ld08:10:183
2793394997315,39cyclictest2828061-21ld08:10:183
2793394997234,38cyclictest0-21swapper/307:17:003
2793394997214,39cyclictest2819918-21awk07:55:213
2793394997012,39cyclictest0-21swapper/311:42:203
2793394996931,38cyclictest0-21swapper/312:28:043
2793394996627,39cyclictest0-21swapper/311:29:203
2793394996325,19cyclictest0-21swapper/310:38:563
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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