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2026-04-13 - 01:34
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Sun Apr 12, 2026 12:46:11)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1536331992010,192cyclictest0-21swapper/109:15:111
1536336998426,18cyclictest191rcu_preempt07:40:156
1536331996830,38cyclictest0-21swapper/112:39:391
1536331996829,39cyclictest0-21swapper/111:34:071
1536331996426,38cyclictest0-21swapper/107:39:331
1536331996425,39cyclictest0-21swapper/110:45:031
1536331995618,19cyclictest1661561-21ntpq10:55:191
1536332995314,39cyclictest0-21swapper/211:15:162
1536331995335,18cyclictest0-21swapper/109:37:471
1536332995214,19cyclictest0-21swapper/208:55:162
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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