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2026-07-18 - 05:27
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Sat Jul 18, 2026 00:46:12)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
236269991470,1cyclictest0-21swapper/723:30:127
236266998787,0cyclictest0-21swapper/422:53:504
236269998425,59cyclictest0-21swapper/719:35:157
236266997134,18cyclictest243361-21gcc19:20:204
236266996929,39cyclictest0-21swapper/423:07:504
236262996911,39cyclictest364231-21kworker/0:1+events00:05:160
236266996830,19cyclictest0-21swapper/419:19:304
23626699635,39cyclictest0-21swapper/421:16:114
23626699623,19cyclictest0-21swapper/419:13:134
23626699613,19cyclictest0-21swapper/422:36:414
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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