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2026-08-07 - 20:42
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Fri Aug 07, 2026 12:46:12)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3906713991770,176cyclictest0-21swapper/309:15:093
3906713997214,39cyclictest4016832-21perf10:30:003
390671399699,59cyclictest3923664-21aten2.4_rfpower07:40:133
390671499688,59cyclictest0-21swapper/408:45:164
3906713996829,38cyclictest3949833-21sed08:25:253
3906713996728,2cyclictest0-21swapper/308:00:343
3906713996710,38cyclictest0-21swapper/308:19:113
3906713996628,38cyclictest0-21swapper/309:27:463
390671399645,40cyclictest3910578-21if_enxbe3af2b6007:15:163
3906713996021,38cyclictest3950795-21/usr/sbin/munin08:30:203
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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