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2026-04-19 - 18:16
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Sun Apr 19, 2026 12:46:08)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
15324789911355,38cyclictest1676619-21cat11:30:173
15324789911314,79cyclictest1710778-21sshd12:31:533
1532478999617,60cyclictest1682745-21ntpq11:40:193
1532478997537,19cyclictest1554502-21systemctl07:50:033
1532482997314,19cyclictest0-21swapper/707:40:157
1532478997334,38cyclictest1653838-21systemd-run10:50:013
1532478997315,39cyclictest1565433-21systemd-run08:10:003
1532478997313,59cyclictest1572588-21ntpq08:20:213
1532478997249,19cyclictest0-21swapper/311:00:153
1532478997235,18cyclictest1569435-21if_err_eno608:15:163
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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