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2026-08-17 - 06:16
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Mon Aug 17, 2026 00:46:07)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3697816997538,18cyclictest3697814-21cyclictest22:06:221
369781699740,74cyclictest0-21swapper/120:04:041
3697815997214,58cyclictest3792584-21chrt22:00:160
3697816996224,19cyclictest3700499-21latency_hist19:15:011
369781699613,39cyclictest0-21swapper/119:18:181
3697817996041,19cyclictest0-21swapper/220:55:172
369781699601,40cyclictest3835582-21gdbus23:20:001
3697816995936,19cyclictest331ktimers/120:20:011
369781699590,39cyclictest0-21swapper/122:16:341
3697816995738,1cyclictest101750irq/41-eno2-TxRx-221:10:141
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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