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2026-06-10 - 00:20
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Tue Jun 09, 2026 12:46:09)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
22133089911557,57cyclictest2351429-21kworker/u32:2+events_unbound11:30:134
2213308991121,1cyclictest0-21swapper/412:25:124
221329199850,1cyclictest0-21swapper/012:25:120
2213308998325,39cyclictest2370116-21kworker/4:212:15:064
221330899780,59cyclictest2293512-21sed09:35:014
2213308997435,39cyclictest874-21mta-sts-daemon09:40:154
2213308997133,19cyclictest601ktimers/407:30:294
2213308997131,19cyclictest0-21swapper/411:28:344
2213308997030,19cyclictest0-21swapper/412:10:464
2213308996829,39cyclictest2234371-21open_inodes07:45:214
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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