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2026-08-28 - 22:03
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Fri Aug 28, 2026 12:46:12)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1781142997840,38cyclictest0-21swapper/507:30:155
1781138996325,38cyclictest0-21swapper/112:10:151
1781144995415,19cyclictest0-21swapper/708:50:177
178113899540,35cyclictest0-21swapper/108:50:181
178114199530,12cyclictest1852737-21/usr/sbin/munin09:20:154
1781143995234,18cyclictest0-21swapper/611:40:146
1781137995113,19cyclictest0-21swapper/009:15:160
1781142994911,19cyclictest0-21swapper/508:45:165
1781144994810,19cyclictest0-21swapper/708:25:177
1781144994810,19cyclictest0-21swapper/708:25:177
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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