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2026-06-19 - 01:33
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Thu Jun 18, 2026 12:46:11)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
397651299960,96cyclictest0-21swapper/512:05:165
3976511996710,38cyclictest4064857-21kworker/0:110:07:034
397651199635,39cyclictest3993508-21kworker/u32:3+events_unbound07:54:534
397651299590,38cyclictest0-21swapper/509:05:155
3976510995536,19cyclictest0-21swapper/310:00:163
3976514995430,18cyclictest0-21swapper/710:05:167
3976510995315,19cyclictest0-21swapper/307:45:153
3976504995333,20cyclictest16-21ksoftirqd/011:30:160
3976514995214,19cyclictest0-21swapper/707:50:167
3976512995214,19cyclictest0-21swapper/509:40:165
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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