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2026-08-23 - 13:54
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Sun Aug 23, 2026 00:46:10)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
197728499624,39cyclictest2074283-21fschecks_time22:05:164
197728499624,19cyclictest0-21swapper/422:24:234
1977284996223,39cyclictest0-21swapper/422:19:024
1977284995922,18cyclictest2013860-21diskstats20:15:144
197728499580,39cyclictest2006376-21ntpq20:00:204
1977283995719,18cyclictest0-21swapper/300:30:163
1977284995618,19cyclictest2138060-21memory00:00:224
1977284995617,19cyclictest2042737-21chrt21:07:284
1977284995615,40cyclictest236199-21snmpd23:34:384
1977284995615,40cyclictest236199-21snmpd23:34:374
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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