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2026-04-29 - 06:47
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Wed Apr 29, 2026 00:46:11)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2632584991230,122cyclictest0-21swapper/600:10:126
2632578997051,19cyclictest0-21swapper/019:50:170
263258399540,54cyclictest0-21swapper/500:15:175
2632581995312,24cyclictest0-21swapper/320:46:443
2632583995214,19cyclictest0-21swapper/521:45:155
2632579995214,19cyclictest0-21swapper/100:05:161
2632583995113,38cyclictest0-21swapper/520:45:165
2632583995113,19cyclictest0-21swapper/519:40:155
2632582995113,19cyclictest0-21swapper/420:55:184
2632583995013,18cyclictest0-21swapper/523:35:165
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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