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2026-06-14 - 22:43
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Sun Jun 14, 2026 12:46:10)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3677211997512,24cyclictest0-21swapper/709:05:167
3677211997012,19cyclictest0-21swapper/707:25:167
3677210995535,19cyclictest870-21mta-sts-daemon07:10:156
3677210995212,39cyclictest0-21swapper/608:10:166
3677211995113,38cyclictest0-21swapper/711:30:147
3677211995113,19cyclictest0-21swapper/709:30:157
3677203995113,19cyclictest0-21swapper/008:00:180
3677210995013,18cyclictest0-21swapper/609:25:156
367720999507,19cyclictest0-21swapper/509:35:165
3677207995011,19cyclictest0-21swapper/309:30:163
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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