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2026-05-19 - 22:10
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Tue May 19, 2026 12:46:10)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
87180991230,2cyclictest0-21swapper/707:25:177
87170991022,99cyclictest0-21swapper/010:20:150
87178997354,19cyclictest0-21swapper/512:00:165
87175997030,39cyclictest236199-21snmpd07:41:283
87175996928,19cyclictest267164-21hddtemp_smartct12:35:173
8717599675,40cyclictest171257-21sed09:40:173
87175996525,39cyclictest0-21swapper/309:53:393
8717599646,19cyclictest0-21swapper/309:49:243
87175996363,0cyclictest0-21swapper/310:40:123
8717599623,40cyclictest90650irq/68-eno6-TxRx-611:25:113
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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