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2026-06-05 - 13:38
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Fri Jun 05, 2026 00:46:23)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
340240199106104,1cyclictest0-21swapper/723:20:117
3402396997354,19cyclictest0-21swapper/221:13:012
3402396997333,39cyclictest0-21swapper/220:35:542
3402396997254,18cyclictest0-21swapper/222:14:142
3402396997234,19cyclictest872-21mta-sts-daemon20:22:142
3402396997234,19cyclictest872-21mta-sts-daemon20:22:132
3402396997233,38cyclictest265-1kworker/2:1H+kblockd00:15:102
3402396997233,38cyclictest265-1kworker/2:1H+kblockd00:15:102
3402396997233,38cyclictest0-21swapper/200:29:302
3402396997233,0cyclictest0-21swapper/219:15:542
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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