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2026-08-07 - 05:34
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Fri Aug 07, 2026 00:46:09)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1244662991740,1cyclictest0-21swapper/321:00:123
124465999164162,1cyclictest0-21swapper/021:00:120
1244663999820,59cyclictest1409964-21taskset00:09:464
1244663999313,79cyclictest0-21swapper/422:10:164
1244663999032,39cyclictest1251128-21smartctl19:20:174
124466399824,59cyclictest1284806-21missed_timers20:20:174
1244663997416,39cyclictest1304485-21sed20:55:214
1244663997214,39cyclictest1319584-21cstates21:25:144
1244663997033,18cyclictest1378206-21chrt23:10:144
1244663997010,59cyclictest0-21swapper/422:07:054
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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