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2026-03-14 - 15:08
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Sat Mar 14, 2026 00:46:11)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
897630991160,17cyclictest0-21swapper/219:15:152
8976359910424,39cyclictest1086-21runrttasks00:15:407
897635999392,0cyclictest1029545-21users23:05:257
897635999011,39cyclictest1069171-21kworker/u32:1+events_unbound00:30:127
897635999011,39cyclictest1069171-21kworker/u32:1+events_unbound00:30:127
89763599813,59cyclictest941022-21ntp_states20:25:207
897635997739,19cyclictest101550irq/39-eno2-TxRx-023:10:127
897635997214,19cyclictest0-21swapper/719:22:067
897635997132,19cyclictest101550irq/39-eno2-TxRx-021:00:147
897635997113,39cyclictest968609-21pmu-power21:15:207
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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