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2026-08-20 - 13:35
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Thu Aug 20, 2026 00:46:10)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
280567899580,39cyclictest0-21swapper/320:35:153
2805675995319,15cyclictest0-21swapper/019:15:160
2805675995214,19cyclictest0-21swapper/000:00:190
2805681994911,19cyclictest0-21swapper/623:55:156
2805682994810,19cyclictest0-21swapper/722:25:147
280567899489,39cyclictest0-21swapper/319:25:173
2805675994810,19cyclictest0-21swapper/020:40:150
2805677994710,18cyclictest0-21swapper/222:10:162
2805678994628,18cyclictest0-21swapper/320:05:163
280568299445,39cyclictest0-21swapper/723:35:157
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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