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2026-08-24 - 11:48
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Mon Aug 24, 2026 00:46:10)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3027196995513,23cyclictest3171975-21ntpq23:30:214
3027193995515,39cyclictest0-21swapper/122:40:151
3027197995012,19cyclictest0-21swapper/523:25:135
302719399455,39cyclictest0-21swapper/120:40:161
3027198994425,0cyclictest3057811-21kworker/u32:0+events_unbound20:23:576
302719499434,39cyclictest0-21swapper/223:55:172
302719499423,39cyclictest0-21swapper/219:50:162
302719399424,19cyclictest0-21swapper/123:10:161
302719399413,19cyclictest0-21swapper/121:05:151
302719399411,38cyclictest0-21swapper/123:50:161
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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