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2026-07-02 - 06:08
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Thu Jul 02, 2026 00:46:11)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3786478995940,1cyclictest601ktimers/400:03:534
3786478995839,19cyclictest0-21swapper/422:29:574
3786483995738,19cyclictest70-21ksoftirqd/523:40:145
378647899550,18cyclictest0-21swapper/420:03:344
3786483995435,19cyclictest0-21swapper/522:25:145
3786483995234,18cyclictest0-21swapper/522:49:165
3786483995234,0cyclictest0-21swapper/523:07:175
3786487995113,19cyclictest771rcuc/600:30:166
3786483995132,19cyclictest3822858-21kworker/u32:5+events_unbound20:55:085
3786483995112,19cyclictest191rcu_preempt00:25:235
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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