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2025-12-08 - 07:37
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Mon Dec 08, 2025 00:46:11)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1827157998911,59cyclictest1088-21runrttasks23:04:203
1827159998810,19cyclictest0-21swapper/520:40:215
1827159998810,19cyclictest0-21swapper/520:40:205
182715799878,59cyclictest1989677-21sed23:55:203
1827157998426,39cyclictest1088-21runrttasks22:24:353
1827157997860,18cyclictest0-21swapper/321:29:533
1827157997718,40cyclictest1949935-21meminfo22:45:193
1827157997618,38cyclictest1963145-21/usr/sbin/munin23:10:123
1827157997133,38cyclictest0-21swapper/320:40:043
1827157997133,38cyclictest0-21swapper/320:40:033
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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