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2026-06-25 - 04:42
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Thu Jun 25, 2026 00:46:22)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
41760999117117,0cyclictest0-21swapper/723:25:117
417605998911,0cyclictest0-21swapper/320:25:143
417606998829,40cyclictest776-21dbus-daemon20:25:014
41760699813,59cyclictest528978-21/usr/sbin/munin22:30:204
417606998123,39cyclictest574049-21grep23:55:014
41760699800,79cyclictest431421-21munin-run19:35:024
417606997839,38cyclictest1-21systemd23:30:014
417606997435,18cyclictest877-21mta-sts-daemon20:18:204
417606997435,18cyclictest877-21mta-sts-daemon20:18:194
417606997234,38cyclictest417601-21cyclictest19:27:434
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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