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2026-04-21 - 02:04
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Mon Apr 20, 2026 12:46:08)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
272638499750,16cyclictest0-21swapper/308:20:153
272638499632,21cyclictest0-21swapper/309:10:173
2726388995920,19cyclictest873-21mta-sts-daemon12:00:167
2726384995314,20cyclictest0-21swapper/307:20:163
2726388994728,19cyclictest0-21swapper/711:55:167
272638899468,19cyclictest0-21swapper/707:45:167
2726384994645,1cyclictest511ktimers/312:30:163
272638499457,19cyclictest0-21swapper/311:40:163
272638499456,39cyclictest0-21swapper/308:25:163
272638499446,19cyclictest0-21swapper/312:25:163
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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