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2026-06-28 - 04:56
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Sun Jun 28, 2026 00:46:18)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
36094159910829,39cyclictest3769410-21/usr/sbin/munin00:00:144
36094159910829,39cyclictest3769410-21/usr/sbin/munin00:00:134
3609415998627,20cyclictest3709656-21perl22:10:144
3609415997333,40cyclictest0-21swapper/419:35:394
3609415997314,19cyclictest3688608-21ps21:30:194
3609415996928,19cyclictest3721274-21ntp_states22:30:184
3609415996730,37cyclictest225-1kworker/4:1H+kblockd21:13:004
360941599601,20cyclictest3756025-21cpuspeed_turbos23:35:144
360941199602,39cyclictest16-21ksoftirqd/023:55:160
3609415995920,0cyclictest3687127-21systemctl21:30:024
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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