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2026-08-26 - 10:12
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Wed Aug 26, 2026 00:46:10)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1089574991380,1cyclictest0-21swapper/321:00:123
1089571997638,19cyclictest3444681-21sshd21:31:580
1089571997618,39cyclictest1103115-21munin-run19:34:590
108957899750,75cyclictest0-21swapper/721:25:177
1089571997557,18cyclictest101650irq/40-eno2-TxRx-122:55:170
1089571997517,39cyclictest101650irq/40-eno2-TxRx-121:35:130
1089571997437,18cyclictest101650irq/40-eno2-TxRx-121:00:130
1089571997335,19cyclictest101650irq/40-eno2-TxRx-120:45:180
1089571997335,19cyclictest101650irq/40-eno2-TxRx-120:35:220
1089571997335,19cyclictest101650irq/40-eno2-TxRx-120:35:220
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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