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2026-07-04 - 10:23
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Sat Jul 04, 2026 00:46:11)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
1762377991110,110cyclictest0-21swapper/619:45:166
1762377991110,110cyclictest0-21swapper/619:45:166
1762376998910,59cyclictest1869580-21sed22:25:025
1762376998910,40cyclictest1939100-21aten2.4_rfpower00:30:105
1762376997718,58cyclictest1861433-21sed22:10:015
1762376997416,39cyclictest1802882-21timerandwakeup20:20:225
1762376997213,40cyclictest236199-21snmpd19:56:165
1762376997032,38cyclictest0-21swapper/523:30:205
1762376996911,39cyclictest1934058-21cat00:20:125
1762376996911,39cyclictest1934058-21cat00:20:125
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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