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2026-08-04 - 18:20
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Tue Aug 04, 2026 12:46:05)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
750786997517,39cyclictest812048-21aten2.4-expect09:00:133
750786996930,19cyclictest0-21swapper/312:21:583
750786995836,19cyclictest0-21swapper/307:20:473
750786995718,19cyclictest874-21mta-sts-daemon10:26:193
750786995717,20cyclictest905460-21systemctl11:50:003
75078699570,38cyclictest876-21mta-sts-daemon08:34:323
750786995618,19cyclictest763580-21ntpq07:30:213
750786995617,19cyclictest1-21systemd10:25:013
750786995537,18cyclictest876-21mta-sts-daemon11:55:143
750786995533,19cyclictest0-21swapper/309:36:513
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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