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2026-07-21 - 06:48
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Tue Jul 21, 2026 00:46:11)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3601774998989,0cyclictest3753903-21kernelversion23:45:196
360177499802,59cyclictest3621471-21kworker/u32:1+events_unbound20:03:216
360177499780,61cyclictest0-21swapper/623:57:376
3601774997012,39cyclictest3661576-21sed20:55:256
3601774996911,39cyclictest1086-21runrttasks00:13:396
360177199699,59cyclictest0-21swapper/321:45:163
3601774996729,38cyclictest0-21swapper/620:10:136
360177499658,38cyclictest3618486-21kworker/u32:0+events_unbound22:30:236
360177499655,39cyclictest0-21swapper/621:26:026
3601774996547,18cyclictest0-21swapper/620:25:196
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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