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2026-03-26 - 23:32
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Thu Mar 26, 2026 12:46:10)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
16001159912225,0cyclictest0-21swapper/208:30:162
160011699108107,0cyclictest0-21swapper/309:00:113
1600116997436,19cyclictest1655460-21munin-run08:50:023
1600116997436,19cyclictest1622469-21munin-run07:50:023
1600116997316,38cyclictest1757503-21kworker/5:212:10:293
1600120997233,39cyclictest0-21swapper/707:50:157
1600116997132,38cyclictest511ktimers/309:39:543
1600116996810,39cyclictest1633636-21systemd-run08:10:023
160011699668,39cyclictest1691651-21hddtemp_smartct09:55:153
1600116996526,39cyclictest0-21swapper/308:04:013
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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