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2026-07-17 - 09:28
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Fri Jul 17, 2026 00:46:10)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
33281779913536,59cyclictest3374591-21taskset20:33:195
332817799929,83cyclictest0-21swapper/521:45:215
3328177997517,39cyclictest3418260-21awk21:50:255
3328177997517,19cyclictest3445759-21sed22:40:255
3328177997214,39cyclictest0-21swapper/521:11:515
3328177997133,38cyclictest0-21swapper/500:37:075
3328177996628,38cyclictest0-21swapper/522:00:585
3328177996627,20cyclictest3350997-21hddtemp_smartct19:50:155
332817799657,39cyclictest3500423-21ntp_states00:20:215
332817799635,39cyclictest3426521-21grep22:05:255
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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