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2026-09-05 - 16:07
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Sat Sep 05, 2026 12:46:13)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2257508991250,124cyclictest0-21swapper/511:00:155
225750499824,59cyclictest2435894-21chrt12:31:211
225750499790,39cyclictest2282184-21taskset07:53:521
2257504997436,19cyclictest101750irq/41-eno2-TxRx-210:31:581
225750499655,59cyclictest2288051-21systemctl08:05:001
2257504996426,19cyclictest0-21swapper/110:00:181
225750999624,19cyclictest0-21swapper/611:40:176
225750499612,39cyclictest0-21swapper/110:13:401
225750499600,40cyclictest2402927-21taskset11:32:031
2257504995920,38cyclictest101750irq/41-eno2-TxRx-212:00:171
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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