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2026-08-02 - 10:34
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Sun Aug 02, 2026 00:46:12)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
116675991840,183cyclictest0-21swapper/520:45:135
11667499106105,1cyclictest234098-21memory22:40:184
116674997819,19cyclictest0-21swapper/400:26:534
116674997818,59cyclictest181575-21ntpq21:05:204
116674997818,59cyclictest181575-21ntpq21:05:204
116673997820,19cyclictest191rcu_preempt00:00:183
116674997775,1cyclictest0-21swapper/419:10:024
116674997738,39cyclictest601ktimers/420:12:024
116674997719,19cyclictest191rcu_preempt19:45:124
116674997676,0cyclictest319-21ice-ptp-0000:f4:00.021:01:004
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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