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2026-04-21 - 17:53
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 10 highest latencies:
System rackfslot7.osadl.org (updated Tue Apr 21, 2026 12:46:13)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
396708999860,85cyclictest0-21swapper/111:25:171
3967098997233,38cyclictest0-21swapper/707:20:167
3967092997032,2cyclictest0-21swapper/309:16:003
396709299695,60cyclictest4114089-21python311:35:223
3967092996425,38cyclictest3970224-21aten2.4_rfpower07:15:133
396709299633,39cyclictest3968619-21gcc07:10:193
3967092996224,19cyclictest4033302-21cut09:10:133
3967092996224,19cyclictest4033302-21cut09:10:123
3967092996121,18cyclictest4092126-21awk10:55:233
3967092995714,20cyclictest4016831-21kworker/u32:4+ext4-rsv-conversion09:35:003
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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