You are here: Home / Technical Services / OSADL QA Farm Real-time / 
2026-03-03 - 13:30
[ 290.152] (II) VESA: driver for VESA chipsets: vesa
Click here to display the system's profile data or here to proceed to next system.
Click on a legend element to toggle display of that core, ctrl-click inverts display, shift-click enables all.

Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 100 highest latencies:
System rackfslot7.osadl.org (updated Tue Mar 03, 2026 00:46:12)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
3881367996829,20cyclictest3897298-21kworker/0:019:46:066
3881366996526,19cyclictest0-21swapper/523:25:155
388136199580,39cyclictest4008153-21cstates23:00:120
3881361995719,38cyclictest4061602-21irqstats00:35:160
3881361995719,38cyclictest4061602-21irqstats00:35:150
3881361995719,38cyclictest0-21swapper/020:07:080
3881361995417,2cyclictest171ktimers/000:06:230
3881364995311,19cyclictest0-21swapper/322:20:153
3881367995233,19cyclictest3906090-21kworker/6:020:10:086
3881366995214,38cyclictest0-21swapper/521:45:175
3881363995214,19cyclictest0-21swapper/222:00:152
3881362995213,38cyclictest0-21swapper/100:30:171
3881361995232,20cyclictest0-21swapper/021:06:070
3881367995112,20cyclictest0-21swapper/621:45:166
3881363995114,18cyclictest0-21swapper/219:50:152
3881362995132,19cyclictest0-21swapper/120:45:181
3881368995011,38cyclictest0-21swapper/722:40:167
3881367995031,19cyclictest4005049-21kworker/u32:0+flush-8:000:10:256
3881362995010,39cyclictest0-21swapper/123:10:141
3881368994912,18cyclictest0-21swapper/723:15:157
3881367994930,19cyclictest3381219-21kworker/u32:2+flush-8:019:40:066
3881363994911,19cyclictest0-21swapper/219:35:152
3881362994911,19cyclictest0-21swapper/121:00:171
388136799489,39cyclictest771rcuc/622:25:166
388136299479,19cyclictest0-21swapper/121:25:151
388136699468,19cyclictest0-21swapper/519:25:165
388136499467,39cyclictest0-21swapper/321:00:173
388136299466,39cyclictest0-21swapper/119:30:181
388136899456,39cyclictest0-21swapper/700:05:157
388136699457,19cyclictest0-21swapper/523:15:155
388136299457,19cyclictest0-21swapper/119:35:151
388136699446,19cyclictest0-21swapper/520:55:135
388136399445,19cyclictest0-21swapper/223:00:142
388136899435,19cyclictest0-21swapper/722:30:147
3881363994324,19cyclictest0-21swapper/221:20:162
3881366994224,18cyclictest0-21swapper/523:05:155
388136199420,39cyclictest3881142-21latency_hist19:10:030
388136799413,19cyclictest0-21swapper/622:40:176
3881366994121,20cyclictest0-21swapper/523:20:165
388136399413,19cyclictest0-21swapper/220:05:162
388136199410,38cyclictest3948717-21ntpq21:10:200
3881363994021,19cyclictest0-21swapper/200:10:162
388136299400,39cyclictest0-21swapper/119:15:161
388136199400,40cyclictest0-21swapper/019:25:310
388136199400,39cyclictest0-21swapper/022:09:470
388136199400,39cyclictest0-21swapper/019:13:590
388136199400,0cyclictest0-21swapper/023:53:130
388136199400,0cyclictest0-21swapper/021:24:060
388136199400,0cyclictest0-21swapper/000:20:090
388136299390,20cyclictest0-21swapper/123:30:171
3881361993920,19cyclictest171ktimers/021:04:220
3881361993919,20cyclictest0-21swapper/022:50:340
388136199390,20cyclictest3893809-21ntpq19:30:200
388136199390,20cyclictest0-21swapper/020:12:420
388136199390,19cyclictest0-21swapper/023:44:530
388136199390,19cyclictest0-21swapper/023:34:450
388136199390,19cyclictest0-21swapper/023:16:210
388136199390,19cyclictest0-21swapper/023:09:090
388136199390,19cyclictest0-21swapper/022:42:060
388136199390,19cyclictest0-21swapper/022:01:140
388136199390,19cyclictest0-21swapper/021:58:220
388136199390,19cyclictest0-21swapper/021:37:460
388136199390,19cyclictest0-21swapper/020:45:100
388136199390,19cyclictest0-21swapper/020:36:420
388136199390,19cyclictest0-21swapper/019:44:420
388136199390,19cyclictest0-21swapper/019:22:580
388136199390,19cyclictest0-21swapper/000:32:370
388136199390,0cyclictest0-21swapper/019:50:200
388136899380,19cyclictest0-21swapper/700:00:157
388136299380,19cyclictest0-21swapper/123:05:141
388136299380,19cyclictest0-21swapper/100:00:141
3881361993819,19cyclictest3883691-21kworker/0:2+ice19:38:210
3881361993819,19cyclictest0-21swapper/020:01:150
388136199380,38cyclictest0-21swapper/023:13:360
388136199380,38cyclictest0-21swapper/022:26:350
388136199380,19cyclictest4051938-21sshd00:18:310
388136199380,19cyclictest0-21swapper/023:25:170
388136199380,18cyclictest0-21swapper/023:35:180
388136199380,18cyclictest0-21swapper/021:32:540
388136199380,17cyclictest0-21swapper/019:45:160
3881367993717,20cyclictest3966812-21kworker/u32:0+events_unbound22:10:166
3881367993717,20cyclictest3911642-21kworker/6:1+events21:40:146
3881361993719,18cyclictest0-21swapper/019:58:360
3881361993719,0cyclictest0-21swapper/023:56:270
3881361993718,19cyclictest876-21mta-sts-daemon20:34:530
3881361993718,19cyclictest171ktimers/023:22:190
3881361993718,19cyclictest171ktimers/022:48:110
3881361993718,19cyclictest171ktimers/021:16:290
3881361993718,19cyclictest171ktimers/020:24:130
3881361993718,19cyclictest171ktimers/020:24:120
388136199370,37cyclictest0-21swapper/022:22:190
388136199370,37cyclictest0-21swapper/021:28:320
388136199370,37cyclictest0-21swapper/020:15:560
388136199370,37cyclictest0-21swapper/019:19:080
388136199370,18cyclictest0-21swapper/022:39:390
388136199370,17cyclictest0-21swapper/022:30:190
388136199370,17cyclictest0-21swapper/000:12:020
388136199370,17cyclictest0-21swapper/000:01:100
388136899360,17cyclictest0-21swapper/720:50:157
388136399360,17cyclictest0-21swapper/220:20:172
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

Valid XHTML 1.0 Transitional