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2026-09-06 - 14:07
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackfslot7.osadl.org (updated Sun Sep 06, 2026 00:46:11)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
72764999140137,1cyclictest52-21ksoftirqd/321:10:123
7276499910425,58cyclictest880936-21tr23:45:203
727649998932,38cyclictest743275-21timerandwakeup19:35:243
727649998931,39cyclictest752388-21systemctl19:55:023
727649998062,18cyclictest0-21swapper/319:42:043
72764899750,16cyclictest0-21swapper/200:15:152
72765199730,72cyclictest0-21swapper/521:10:125
727649997213,40cyclictest907486-21basename00:35:173
727649997113,39cyclictest899724-21sed00:20:203
727649997012,39cyclictest768508-21awk20:25:003
727649996949,20cyclictest800868-21ps21:20:243
727649996932,18cyclictest813315-21munin-plugin-st21:45:033
727649996930,39cyclictest0-21swapper/323:51:323
727649996830,38cyclictest0-21swapper/322:00:323
727649996829,39cyclictest0-21swapper/320:55:563
72765399678,19cyclictest0-21swapper/719:15:167
72764999677,59cyclictest851723-21sed22:55:023
727649996749,18cyclictest0-21swapper/321:30:203
727649996749,18cyclictest0-21swapper/321:30:203
727649996728,39cyclictest0-21swapper/320:54:123
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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