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2026-07-15 - 16:00
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackfslot7.osadl.org (updated Wed Jul 15, 2026 12:46:12)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
380366499165163,1cyclictest0-21swapper/011:50:120
3803670999273,19cyclictest0-21swapper/609:36:186
3803670999033,38cyclictest781ktimers/612:34:326
380367099823,59cyclictest3861163-21taskset08:51:386
3803670997315,39cyclictest3872713-21munin-run09:15:036
3803670997012,39cyclictest3944465-21gmain12:20:526
3803670997012,39cyclictest3944465-21gmain12:20:516
3803670996830,19cyclictest3850263-21chrt08:31:526
380366999679,39cyclictest0-21swapper/507:15:175
3803670996527,38cyclictest0-21swapper/610:45:456
380366599645,19cyclictest0-21swapper/108:10:161
380367099600,58cyclictest0-21swapper/607:10:136
3803670995918,19cyclictest1-21systemd11:10:006
3803670995917,19cyclictest3973700-21ntpq12:15:206
3803670995818,19cyclictest3947255-21munin-run11:29:596
3803670995719,19cyclictest3893190-21ntp_states09:50:216
3803670995717,40cyclictest3847423-21users08:25:246
3803670995717,19cyclictest3956531-21hddtemp_smartct11:45:156
3803670995717,19cyclictest3809031-21munin-run07:20:006
380367099570,57cyclictest0-21swapper/609:40:116
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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