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2026-04-06 - 10:41
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackfslot7.osadl.org (updated Mon Apr 06, 2026 00:46:13)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
401530499110110,0cyclictest4181756-21memory00:10:204
401530499868,59cyclictest4164665-21cat23:40:134
401530499846,59cyclictest4159739-21ntpq23:30:194
401530499801,59cyclictest4020496-21taskset19:18:154
4015304997333,39cyclictest6050ktimers/421:05:204
4015304997232,39cyclictest4041337-21strings19:55:174
4015304997231,19cyclictest4169716-21apt23:50:104
4015304997113,39cyclictest4072135-21cat20:50:234
4015304997031,19cyclictest0-21swapper/421:04:074
4015304997031,19cyclictest0-21swapper/421:04:074
4015304997031,19cyclictest0-21swapper/420:07:444
4015304997031,19cyclictest0-21swapper/419:43:404
4015304997030,39cyclictest0-21swapper/420:38:524
4015304996930,19cyclictest0-21swapper/422:49:494
4015304996829,19cyclictest0-21swapper/421:55:124
401530499679,39cyclictest4131961-21sed22:40:184
401530499678,39cyclictest4152277-21chrt23:19:044
4015304996526,19cyclictest877-21mta-sts-daemon22:58:514
4015304996426,19cyclictest362-21jbd2/sda2-820:45:164
4015304996425,39cyclictest0-21swapper/422:10:134
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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