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2025-09-18 - 20:22
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackfslot7.osadl.org (updated Thu Sep 18, 2025 12:46:12)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
207933799646,39cyclictest2096534-21kworker/u32:4+flush-8:008:48:444
2079337996122,38cyclictest2177804-21kworker/4:210:12:514
2079334995920,39cyclictest0-21swapper/111:00:151
2079337995718,19cyclictest191rcu_preempt12:00:154
207933599570,38cyclictest0-21swapper/210:32:512
2079334995537,18cyclictest0-21swapper/110:35:161
2079338995415,39cyclictest0-21swapper/508:40:165
2079337995414,20cyclictest0-21swapper/411:30:154
2079337995414,20cyclictest0-21swapper/411:30:154
2079334995416,19cyclictest872-21mta-sts-daemon08:35:161
2079338995113,19cyclictest0-21swapper/510:45:165
2079334995113,38cyclictest0-21swapper/111:05:171
2079338994930,18cyclictest873-21mta-sts-daemon07:25:215
2079335994931,18cyclictest0-21swapper/212:20:192
2079335994931,18cyclictest0-21swapper/208:45:402
2079335994931,18cyclictest0-21swapper/208:15:122
2079335994930,19cyclictest0-21swapper/209:50:232
2079334994930,19cyclictest0-21swapper/111:35:151
2079335994830,18cyclictest0-21swapper/210:23:112
2079335994830,18cyclictest0-21swapper/210:12:392
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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