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2026-08-21 - 22:38
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackfslot7.osadl.org (updated Fri Aug 21, 2026 12:46:17)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
235949799600,59cyclictest0-21swapper/512:03:055
235949799600,59cyclictest0-21swapper/512:03:045
235949799591,19cyclictest0-21swapper/511:52:245
235949799591,19cyclictest0-21swapper/511:52:245
2359492995352,1cyclictest171ktimers/008:40:150
2359496995214,19cyclictest0-21swapper/411:15:144
2359498995112,38cyclictest0-21swapper/608:10:166
2359498995013,18cyclictest0-21swapper/611:55:196
2359498995013,18cyclictest0-21swapper/611:55:186
2359499994910,38cyclictest871ktimers/710:10:157
2359492994911,19cyclictest0-21swapper/009:10:140
2359492994911,19cyclictest0-21swapper/009:05:150
2359498994830,18cyclictest876-21mta-sts-daemon08:20:146
2359497994829,0cyclictest0-21swapper/508:20:025
235949699479,19cyclictest0-21swapper/411:45:174
2359499994627,19cyclictest101550irq/39-eno2-TxRx-009:00:167
2359496994627,18cyclictest0-21swapper/411:40:154
235949499463,19cyclictest0-21swapper/211:00:132
235949299468,19cyclictest0-21swapper/010:00:150
235949899457,19cyclictest0-21swapper/607:35:176
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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