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2026-04-26 - 02:35
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackfslot7.osadl.org (updated Sat Apr 25, 2026 12:46:12)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
518326998951,19cyclictest0-21swapper/210:00:162
51832499750,75cyclictest675967-21/usr/sbin/munin11:55:010
518326997314,58cyclictest0-21swapper/210:10:152
518324997032,19cyclictest0-21swapper/008:59:270
518326996527,38cyclictest411rcuc/208:35:162
51832499580,39cyclictest697258-21unixbench-2d12:30:230
51832499580,39cyclictest655446-21ld11:15:210
518324995739,0cyclictest0-21swapper/012:08:570
518324995739,0cyclictest0-21swapper/010:43:370
518324995739,0cyclictest0-21swapper/009:47:050
518324995739,0cyclictest0-21swapper/009:33:130
518324995719,19cyclictest644349-21meminfo10:55:170
518324995637,19cyclictest31750irq/70-ice-0000:f4:00.0:misc08:35:370
518324995619,18cyclictest0-21swapper/010:31:530
518324995619,18cyclictest0-21swapper/010:31:530
518324995537,18cyclictest251irq_work/012:35:130
518324995537,0cyclictest0-21swapper/007:59:210
518324995517,19cyclictest622026-21awk10:15:170
518324995517,19cyclictest31750irq/70-ice-0000:f4:00.0:misc11:10:170
518324995516,39cyclictest648487-21sed11:05:010
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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