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2025-12-19 - 08:56
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackfslot7.osadl.org (updated Fri Dec 19, 2025 00:46:07)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
2037183991270,126cyclictest0-21swapper/723:28:377
2037179998628,19cyclictest876-21mta-sts-daemon22:20:063
2037177998682,4cyclictest776-21dbus-daemon22:20:011
203717699860,86cyclictest0-21swapper/023:28:370
2037179998345,19cyclictest2202792-21/usr/sbin/munin00:00:203
2037179998079,1cyclictest2148517-21expr22:25:143
2037179997637,38cyclictest2102696-21/usr/sbin/munin21:05:143
2037179997517,39cyclictest501rcuc/319:25:173
2037179997416,39cyclictest2078922-21/usr/sbin/munin20:20:243
2037179997414,58cyclictest2101407-21sed21:00:243
2037179997333,19cyclictest2119433-21/usr/sbin/munin21:35:133
2037179997233,39cyclictest0-21swapper/323:35:083
2037179997214,39cyclictest2190398-21kworker/u32:4+events_unbound23:40:183
2037179997132,39cyclictest0-21swapper/320:29:313
2037179997131,39cyclictest0-21swapper/323:48:063
2037179997131,39cyclictest0-21swapper/322:57:423
2037179997131,39cyclictest0-21swapper/322:14:243
2037179997113,58cyclictest2111670-21tail21:20:163
2037179997113,19cyclictest191rcu_preempt21:30:123
2037179997112,39cyclictest2167678-21kworker/u32:4+events_unbound23:15:083
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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