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2026-01-09 - 13:42
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Data to construct the above plot have been generated using the RT test utility cyclictest.
Unexpectedly long latencies may be caused by SMIs
Total number of samples: 100 million
Resolution of latency scale: normal
Duration: 5 hours, 33 minutes, lowest P state: performance
Compare latency of primary with shadow system
Characteristics of the 20 highest latencies:
System rackfslot7.osadl.org (updated Fri Jan 09, 2026 00:46:09)
Delayed (victim)Switcher (culprit)TimestampCPU
PIDPrioTotal
latency
(µs)
T*(,W**)
latency
(µs)
CmdPIDPrioCmd
455649997355,0cyclictest0-21swapper/023:41:370
455649997354,0cyclictest0-21swapper/021:11:130
455649997334,19cyclictest557381-21kworker/0:0+ice22:17:210
455649997334,19cyclictest520526-21kworker/0:0+ice21:17:370
455649997334,19cyclictest460931-21kworker/0:0+ice19:43:450
455649997132,19cyclictest580440-21kworker/0:1+ice23:28:490
455649997132,19cyclictest557381-21kworker/0:0+ice22:29:050
455649997032,19cyclictest548932-21kworker/0:1+ice22:01:210
455649995656,0cyclictest0-21swapper/020:50:570
455649995537,0cyclictest0-21swapper/021:49:370
455649995436,0cyclictest0-21swapper/022:13:050
455651995314,39cyclictest0-21swapper/221:20:162
455658995233,19cyclictest0-21swapper/722:35:157
455651995213,39cyclictest0-21swapper/223:20:132
455649995233,0cyclictest0-21swapper/022:42:570
455658995113,18cyclictest0-21swapper/723:55:157
455656995113,19cyclictest0-21swapper/623:30:156
455656995113,19cyclictest0-21swapper/621:10:146
455651995114,18cyclictest0-21swapper/222:00:152
455651995113,19cyclictest0-21swapper/219:20:152
*Timer  **Wakeup  (latency=timer+wakeup+contextswitch)

 

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